JPH11338644A - Disk controller and storage medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a disk controller which realizes data transfer that efficient ly performs batch writing in an uncontinuous area of a disk drive. SOLUTION: When this disk controller 102 writes data in plural uncontinuous segments, it transfers a list having a logical block address of a disk drive on which the data are written and the dimension of the data as its elements to this disk drive with respect to the data. Thus, it is possible to collectively write data in plural uncontinuous segments without issuing write requests for the number of segments. Also, data transfer efficiency is improved because a large bit map table does not have to be transferred.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk controller and a disk device having a cache memory, and more particularly to data transfer between the disk controller and the disk device.

[0002]

2. Description of the Related Art In a conventional disk controller, a cache memory for temporarily storing data to be written to a disk device and data to be read from a disk device is provided, and write data from a host device is stored in a cache memory in the disk controller. A write-back cache system is known in which writing is completed only by writing, and the data is later written to a disk device. This technique is disclosed in, for example, Japanese Patent Application Laid-Open No. 55-154650.

Further, when performing the write-back cache method, when a plurality of discontinuous data blocks exist in a segment which is a management unit of the cache memory of the disk control device, a bit map is added and transferred. Therefore, there is a data transfer method of writing data by one write request. This technology is disclosed in
28261.

[0004] Here, the bit map is obtained by allocating continuous bits to a plurality of continuous data blocks in the disk. For example, when 1 bit is allocated to a 512-byte block, a bitmap having a size of 65536/512 = 128 bits = 16 bytes is required to represent 65536 bytes of data.

[0005]

The above-described method of transferring a bitmap is effective for write data having high randomness.

However, when writing data to a disk device, data is often written over a plurality of discontinuous segments. In such a case, in the method of transferring the bitmap described above, it is necessary to issue write requests for the number of segments. Also, in order to cover all the logical addresses of the disk device, a very large bitmap table must be created and transferred.
ineffective. Furthermore, with the recent increase in the capacity of disk devices, the range of discrete data to be handled is considered to be expanded, so that it is necessary to use a larger bitmap.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a disk control device and a storage device capable of efficiently performing batch writing in a discontinuous area of a disk device.

[0008]

In order to achieve the above object, a disk control apparatus according to the present invention, when writing data to a plurality of discontinuous areas in a disk device, sets each of the plurality of areas into a plurality of areas. The address and the size of the data to be written in the area are transferred to the disk device. More specifically, the disk control device of the present invention, when writing data to a plurality of discontinuous segments, sets the logical block address of each segment of the plurality of discontinuous segments and the size of the data to be written to the segment. Is created, and the list is transferred to the disk device. Since the data is written into a plurality of discontinuous segments, there will be a plurality of elements in the list. The disk device stores the transferred list in an internal memory and waits for the next request. Following the transfer of the list, the disk controller transfers the data to be written to the plurality of discontinuous segments to the disk device. At this time, the address specifies the logical block address of the head data of the list (data written to one segment), the transfer size specifies the total number of transfer blocks of all data in the write list, and the data is described in the list. Are transferred in the order specified. The disk device receives the list and the data, stores the list in the memory in the disk device, stores the data in the cache memory in the disk device, and determines the position from the address of the first data in the list based on the write list transmitted immediately before. Start. After the positioning, the data described in the list is read from the cache memory in the disk device according to the data size indicated in the list,
Write to disc. The positioning of the other data described in the list is similarly started, and after the positioning, the data is written to the disk. The requests described in the list are sequentially and sequentially processed as described above, and when all the data has been written, the end is reported to the disk controller.

According to the present invention, as described above, when data is collectively written to a plurality of discontinuous areas of a disk drive, the address of each area of the plurality of areas and the size of the data to be written to the area are determined. Is transferred to the disk device, it is not necessary to issue write requests for the number of the plurality of areas. In addition, since it is not necessary to transfer a large bitmap table, data transfer efficiency is improved.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the storage device of the present invention. In this embodiment, a case will be described in which a magnetic disk device (hereinafter, a disk device) is used as a storage device, and a SCSI bus is used as an interface for connecting the disk device and a disk control device. However, as a storage device, DV
It is also possible to connect a device other than the magnetic disk device, such as a D-RAM, and use an interface other than the SCSI bus as the interface.

As shown in FIG. 1, the storage device of this embodiment includes a disk controller 102, a disk device 110, and a SCSI bus 109 which is an interface connecting the disk controller 102 and the disk device 110. It is configured.

A disk controller 102 controls a SCSI bus 109 for controlling a SCSI bus 109, a higher-level interface circuit 103 for controlling an interface with a higher-level device 101, a microprocessor 104, and controls the disk controller. Memory 105 storing microprograms and control information in the disk controller, a cache memory 106 for temporarily storing transfer data between the host device 101 and the disk device 110, and an internal bus 107 connecting these circuits.
It has.

When a write command for writing data is issued from the host device 101, the microprocessor 104 stores the write data in the cache memory 106. The microprocessor 104 analyzes the write command, calculates a disk device 110 in which the write data is stored, a logical block address as a logical address on the SCSI bus, and a logical block length as a data transfer length. Disk unit 11
SCSI bus control circuit 108 of SCSI bus 109 to which 0 is connected
Is used to write the data.

Hereinafter, the write process of the present invention will be described with reference to FIGS.
This will be described in detail with reference to FIG. Note that the write processing of the present invention is referred to as wrist write.

FIG. 2 shows an example of data and control information of the disk control device in FIG.

The write data 201 written from the host device 101 is stored in the cache memory 106, and the cache address and cache size of the write data 201 in the cache memory 106 and the disk device 11
The logical address and logical block length in 0 are stored in the memory 105
Is stored in the disk device request queue 202. One disk device request queue 202 exists in each disk device 110. Also, the disk device 110 is stored in the memory 105.
Bus control circuit when actually issuing a write request
A data transfer list 203 for storing information in a cache used by 108 and a SCSI transfer list 204 to be transmitted to the disk device 110 together with a command on the SCSI bus 109 are stored. Also, the data transfer list 2 is stored in the memory 105.
03, a list data size 206 storing the transfer length of the list being created used by the microprocessor 104 when creating the SCSI transfer list 204, a list request number 207 indicating the number of requests in the list, and a disk device request queue 202. A maximum list request number 205 indicating the maximum number of requests that can be stored in the list is stored. The maximum list request number 205 is
When the microprocessor 104 starts up, the microprocessor 104
08 and received from the disk device 110 via the SCSI bus 109. When the list is created, the maximum list data size 208 indicating the maximum size of data that can be transferred at one time is stored in the memory 1.
It is kept in 05.

FIG. 3 shows an example of the configuration of the disk device 110 in FIG. Each of the disk devices 110 in FIG. 1 has the configuration in FIG.

The disk device 110 includes a disk control unit 301,
A disk 311 for storing data and an actuator 310 for reading / writing the disk 313 are provided.

The disk device 110 includes a disk controller 102
That controls the SCSI bus 109, which is an interface with the
The I bus control circuit 302, a microprocessor 303 for controlling the entire disk device 110, a memory 304 for storing control information such as a microprogram of the microprocessor 303 and a SCSI transfer list, etc., between the disk control device 102 and the disk 311. A cache memory 312 for temporarily storing transferred data and an internal bus 307 for connecting each circuit are provided.

This embodiment is characterized in that a SCSI transfer list 305 is held in a memory 304, and write data 313 in a physically distant area on a disk 311 can be received in one data transfer. The cache memory 312 stores the write data 313 transferred from the disk control device 102. Write data 313 in the cache memory 312
Is written to the continuous area in the same manner as when writing by a normal write command.

FIG. 4 shows an embodiment of an operation code for wrist write. Since the wrist write is not supported by the SCSI standard, a vendor-specific 0xC0 is used as the wrist write operation code. As the operation code, any value can be used as long as the operation code uses a code unique to the vendor and does not overlap with the existing code.
Byte 0 stores a list write command 401. In this embodiment, 0xC0 is stored. Byte 1 bits 5-7
Indicates the LUN 402 that issues the command. Bytes 2 to 4 store a parameter list length 403 indicating the length of the parameter list to be transferred subsequently in bytes. Byte 5 indicates the control byte 404. Bit 0 of byte 5 is used to link commands as specified in the SCSI bus standard.
Link 406 is stored (1 is stored in this embodiment). bit
1 indicates a Flag 405, and 1 is stored in this embodiment.

FIG. 5 is an example of a parameter list transferred together with the list write command of FIG. Byte 0
3 stores the logical block address [0] 501 of the 0th element. In bytes 4 to 5, the transfer data length [0] 502 of the 0th element is stored in the number of blocks. Similarly, up to the (n-1) th element is stored. Therefore, the list data shown in FIG. 5 is 6n-byte data.

FIG. 6 shows an example of a write command transferred after the list write. Bytes 0 to 1 are set in the same manner as a normal write command of the SCSI standard. Bytes 2 to 5 store the logical block address 603 of the 0th element in this embodiment. Bytes 7 to 8 indicate the transfer data length 603, and store the sum of the data lengths of all elements of the data as a block length. Byte 9 indicates a control byte 605, and a command is linked as indicated in the SCSI bus standard. Since this is the last of this write command, bit 0 is Link 607 and 1 is stored in this embodiment. Bit 1 indicates Flag 606, and stores 0 in this embodiment.

FIG. 7 is a flowchart showing the operation at the time of writing data from the higher-level device 101 to the disk control device 102 in this embodiment. Hereinafter, a description will be given using the flowchart of FIG. 6 assuming that the disk control device 102 of FIG. First, the disk controller 10
The higher-level device 101 in the higher-level device interface circuit 103 in 2
Receives the write command issued by the microprocessor 104 and the microprocessor 104 analyzes the write command (701). The microprocessor 104 checks whether the necessary area can be prepared in the cache memory 106 based on the address and the transfer size sent simultaneously with the write command (702). If a free area cannot be prepared in the cache memory 106, the microprocessor 104 notifies the host device 101 via the host interface circuit 103 that the write command cannot be accepted, and ends the processing (707). If an area can be prepared in the cache memory 106, an area having a size designated by the host device 101 is prepared (703). When an area necessary for storing data is prepared, the microprocessor 104 sends a data transfer request to the host device 101 via the host interface circuit 103, and writes the write data sent from the host device 101 to the cache memory 106. The data is stored in the free space prepared above (704). When the transfer of the write data is completed, the end of the write command is reported to the host device 101 by using the microprocessor 104 or the host device interface circuit 103 (see FIG.
05). Next, the microprocessor 104 analyzes the write command sent from the higher-level device 101, calculates a logical address and a logical block length in the disk device and the disk device in which the write data is stored, calculates the address stored in the cache memory 106, The size is stored in the disk device request queue 202 in the memory 105 (706).

FIG. 8 shows an operation of writing the write data 201 stored in the disk control device 102 to the disk device 110.

The microprocessor 104 in the disk controller 102 writes the write data 201 in the cache memory 106
When the write data 201 exceeds the predetermined amount or exceeds the predetermined time, the write data 201 is determined by the processing flow shown in FIG.
Is written to the corresponding disk device 110.

Hereinafter, the processing flow shown in FIG. 8 will be described.

To initialize the data to be used, the microprocessor 104 sets the list data size 206 and the number of list requests.
0 is stored in 207 (801). Next, the microprocessor 104
Searches the disk device request queue 202 (802). If there is a request in the queue, the current list data size 206, the transfer size of the first request in the request queue, and the list data size 206 are added, and the maximum list data size 2
Compare with 08 (803). If the request is smaller than the maximum list data size 208 or is the first request (the number of list requests 207 = 0), the microprocessor 104 extracts the request from the disk device request queue 202, and extracts the request from the data transfer list 203 and the SCSI. It is stored as the number-th element stored in the list request number 207 of the transfer list 204 (80
Four)). That is, if j (j is a non-negative integer) is stored in the list request number 207, the request is stored as the j-th element. In the storage in the data transfer list 203, the microprocessor 104 converts the cache size [j] of the disk device request queue 202 into the size [j] of the data transfer list 203,
This is performed by storing the cache address [j] of the disk device request queue 202 at the address [j] in the data transfer list. Here, j is a numerical value stored in the list request number 207. The storage in the SCSI transfer list 204 is performed by the microprocessor 104 by the disk device request queue 2.
02 logical address [j] to SCSI transfer list 204 logical address [j], logical block length of disk device request queue 202
This is performed by storing [j] in the logical block length [j] of the SCSI transfer list 204. Here, j is a numerical value stored in the list request number 207.

After storing the list, the microprocessor 104 increments the list request number 207 (80
Four). The microprocessor 104 has a data transfer list 203,
When a request is stored in the SCSI transfer list 204, the number of list requests 207
When compared with the maximum list number 207 and the maximum list number 207, the disk device request queue search process is terminated,
Repeat the disk device request queue search process (80
6).

After the disk device request queue search process is completed, the number of list requests 207 is decremented (807), and a command for the disk device 110 is issued (808). If the microprocessor 104 issues the command and terminates normally, the issued request (0
(From the 20th to the list request number 207-1) is deleted (80
9, 810). When the command issuance ends, the disk controller processing ends with the disk device request queue 202 remaining unchanged (809).

The command issuing process will be described with reference to FIGS. First, the microprocessor 104 checks whether the number of list requests 207 is greater than 1 (901). If the number of list requests 207 is 1, normal write processing is performed (901). If the number of list requests 207 is larger than 1, the following list write process is performed. It instructs the SCSI bus control circuit 108 of the SCSI bus 109 to which the disk device 110 issuing the instruction is connected to secure the SCSI bus 109. Specifically, SCSI bus arbitration is performed. When the SCSI bus is secured, the disk device 110 that issues the command is selected in the selection phase, the Identify message is transmitted as the first message in the message phase, and the process of issuing the SCSI command is performed.

The disk unit 110 receives the I
When the dentify message is received, the bus state is changed to a command phase, and the bus state is changed to a command phase for receiving a command from the disk device 102. Next, a list write command 400 is issued to the disk device 110 (903). The parameter list length 403 of the list write command 400 indicates the length of the parameter list 500 to be transferred next to the list write command 400. In this embodiment, since n (= 207 list requests) 207 write data are transferred, 6n bytes Becomes 1 is assigned to the 1st bit Fla for the 0th bit Link406 of the control byte 404 of the list write command 400.
g405 shows 1 to indicate that it is linked to the following write command. The disk device 110 is a SCSI bus control circuit 302
Then, the microprocessor 303 analyzes the list write command sent from the disk control device 102. Upon receiving the list write command 400, the microprocessor 303 instructs the SCSI bus control circuit 302 to change the state of the SCSI bus 109 to the data phase. In the data phase, the parameter list 500 is transferred (904). First, the microprocessor 104 is the SCSI to which the disk device 110 is connected.
The SCSI transfer list 204 in the memory 105 is stored in the SCSI bus control circuit 108 of the bus 109. When the SCSI bus control circuit 108 receives the SCSI transfer list 204, the SCSI transfer list 20 is transferred to the disk device 110 via the SCSI bus 108 as a parameter list 500.
Transfer 4. The parameter list 500 transferred via the SCSI bus 109 is stored in the SCSI bus control circuit 302, and the microprocessor 303 secures an area in the memory 304 by the parameter list length 403 described in the list write command 500. Store as SCSI transfer list 305 (100
2). The microprocessor 303 prepares the total area of the transfer block length in the SCSI transfer list 305 in the cache memory 306, calculates the address in the cache memory 306 where each element is stored, and calculates the cache memory address in the SCSI transfer list 305. (1003). SCSI transfer list 30
After the setting of the cache address of 5, the microprocessor 303 starts the operation of writing data to the disk 313. First, the microprocessor 303 sets the counter i in the memory 304 to 0, and without waiting for the data transfer, the read / write control circuit 3 via the hard disk control circuit 308.
09 is instructed to move the actuator 312 to the position of the logical address [0] (1004).

When the disk device 110 receives the list write command 4
Upon successfully receiving 00 and the parameter list 500, the microprocessor 303 changes the state of the SCSI bus to the message in phase, and sends a command complete message indicating that the command has been normally completed to the disk controller.
It instructs the SCSI bus control circuit 302 to transfer the data to 102. Then, the SCSI bus is changed to the command phase so that the subsequent write command is accepted.

When the microprocessor 104 receives the command complete message issued by the disk device 110 from the SCSI bus control circuit 108, the microprocessor 104 sends the SCS to the SCSI bus control circuit 108.
A write command 600 is issued to the disk device 110 via the I bus 109 (905). Here, the logical block address 603 of the write command 600 is the first logical block address of the SCSI transfer list 204, and the transfer data length 604 is the SCSI transfer list 204.
Is the total value of the transfer block length in Disk device 110
Receives the write command 600 and, if it can receive data, then makes the state of the SCSI bus a data out phase and receives data transfer. Microprocessor 104 is S
The transfer list 203 is set in the CSI control circuit 108 (906), and the write data 201 in the cache memory 106 is transferred to the disk device 110 via the SCSI bus 109 in the order shown in the transfer list 203 (907). The write data sent to the disk device via the SCSI bus 109 is stored in the free space of the cache memory 306 from the SCSI bus control circuit 302 according to the cache memory address in the SCSI transfer list 305 in the memory 305 at the instruction of the microprocessor 303. (1005). When all the data in the SCSI bus transfer list 204 has been transferred,
The bus control circuit changes the state of the SCSI bus 108 to the message in phase, and the SCSI bus control circuit 108
And disconnect the SCSI bus 109.

When the positioning of the actuator 312 to the logical address [0] is completed, the microprocessor 303 sets the cache memory address [0] and the logical block length [0] when the 0th data has been stored in the cache memory 306. The read / write control circuit 309 sends the data at the address to the hard disk control circuit 308 via the actuator 312.
Instruct 313 to write. If the write data 307 has not been transferred to the cache memory 306, the process waits until the write data 307 is stored in the cache memory 306, and after the write data 307 is stored, performs a write process to the disk 313 (1).
006). The end of data writing is reported from the read / write control circuit 309 to the microprocessor 304 via the hard disk control circuit 308. After the writing of the 0-th element is completed, the microprocessor 304 increments the counter i and compares it with the number of elements. If the counter i is smaller than the number of elements, the microprocessor 304 indicates the logical address [i] to the hard disk control circuit 308 next. And the hard disk control circuit 308
The actuator 312 via the read / write control circuit 309
Instructs to locate to the address (1007, 100
8, 1010). After the actuator 312 is positioned at the address, the microprocessor 304 sends the cache memory address [i] and the logical block length [i] to the hard disk control circuit 308, and the read / write control circuit 314 sends the data at the address to the hard disk control circuit 308 via the actuator. Instruct 313 to write (1006). Again, it is determined whether there is a request and the process is continued until all elements are written. After all the data has been written to the disk 313, the microprocessor 304 instructs the SCSI bus control circuit 302 to perform arbitration of the SCSI bus 109, secure the SCSI bus 109, and reselect the SCSI bus control circuit 108. After the SCSI bus control circuit 302 reports to the microprocessor 304 that the reselection was successful, the microprocessor 304
The status of the SI bus 109 is set to the message-in phase and Ident
issue a ify message to the SCSI bus control circuit 108, and
The status of the SI bus 109 is set to the status phase, and the normal end of the data transfer is transferred to the SCSI bus control circuit 108.
09 is changed to the message in phase and Command Co
A mplete message is issued to the SCSI bus control circuit 108 to instruct that the bus is finally disconnected and the end report is completed (90
8, 1010). When the disk device 110 notifies the microprocessor 104 of the disk control device 102 that the command has been completed (report of command complete), the processing for the write data [0] 201 to the write data [n-1] is completed.

As described above, the process of conventionally issuing a plurality of write commands and writing data is now completed with a single list write command, the processing overhead of the microprocessor 104 of the disk controller 102, and the usage rate of the SCSI bus 109. The use of list data for indicating discrete data makes it possible to process a wide range of write data.

In the present embodiment, an example has been described in which the position is set to the disk 311 in the disk device 110 and the writing is executed from the head of the SCSI transfer list 305.
It is also possible to write to the disc 311 in an order that minimizes the movement of the 310.

[0039]

As described above, according to the present invention, when data is collectively written to a plurality of discontinuous segments of a disk device, the data is written to the address of each segment of the plurality of segments and its area. Since the data size is transferred to the disk device, it is not necessary to issue write requests for the plurality of segments. In addition, since it is not necessary to transfer a large bitmap table, data transfer efficiency is improved. As a result, the utilization efficiency of the disk device is improved, and even in a disk control device that controls a large number of disk devices, the control overhead is reduced and the utilization efficiency is improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration example of a storage device according to the present invention.

FIG. 2 is a diagram showing a configuration example of a disk control device according to the present invention.

FIG. 3 is a diagram showing a configuration example of a disk device according to the present invention.

FIG. 4 is a diagram showing a description example of a SCSI command according to the present invention.

FIG. 5 is a diagram showing a description example of a parameter list according to the present invention.

FIG. 6 is a diagram showing a description example of a SCSI command according to the present invention.

FIG. 7 is a flowchart showing one operation of the disk control device according to the present invention.

FIG. 8 is a flowchart showing one operation of the disk control device according to the present invention.

FIG. 9 is a flowchart showing one operation of the disk control device according to the present invention.

FIG. 10 is a flowchart showing one operation of the disk device according to the present invention.

[Explanation of symbols]

101: Host device, 102: Disk control device, 103: Host interface circuit, 104: Microprocessor, 105
..Memory, 106 cache memory, 107 internal bus,
108: SCSI bus control circuit, 109: SCSI bus, 110: Disk device, 111: Data transfer list, 201: Write data, 202: Disk device request queue, 203 ... Data transfer list, 204: SCSI transfer list, 205: Maximum number of list requests, 206: List data size, 207: Number of list requests,
208: maximum list data size, 301: disk control unit, 302: SCSI bus control circuit, 303: microprocessor, 304: memory, 305: SCSI transfer list, 306 ...・ Counter i, 307 ・ ・ ・ Internal bus, 308 ・ ・ ・ Hard disk control circuit, 309 ・ ・ ・ Read / write control circuit, 310 ・ ・ ・ Actuator, 311 ・ ・ ・ Disk, 312 ・ ・ ・ Cache memory, 400 ・
..List write command, 500 ... parameter list, 60
0: Write command.

Claims (8)

[Claims] In a disk control device for transferring data sent from a higher-level device to a disk device, when writing data to a plurality of discontinuous regions of the disk device, an address of each region of the plurality of regions is written. A disk control device for transferring the size of data to be written to the area to the disk device. 2. A disk controller for transferring data sent from a higher-level device to a disk device, wherein when writing data to a plurality of discontinuous segments of the disk device, a logical block of each segment of the plurality of segments is written. A disk control device for transferring an address and the size of data to be written to the segment to the disk device. 3. A disk control device for transferring data sent from a higher-level device to a disk device, wherein when writing data to a plurality of discontinuous regions of the disk device, the data is written to the plurality of areas. A disk control device that creates a list including, as elements, the address of each area and the size of data to be written in the area, and transfers the list to the disk device. 4. The apparatus according to claim 3, wherein when the list is created, the elements are ordered, and data to be written to an area corresponding to the element is transferred to the disk device in accordance with the order. Disk control unit. 5. A storage device having a disk device and a disk control device for transferring data sent from a higher-level device to the disk device, wherein the disk control device stores data in a plurality of discontinuous areas of the disk device. When writing data, the address of each area of the plurality of areas and the size of data to be written to the area are transferred to the disk device, and the disk device transfers the address of each area and the data to be written to the area. A storage device for sequentially writing the data in a plurality of discontinuous areas according to the size. 6. The storage device according to claim 5, wherein said data is written to a plurality of discontinuous areas in an order such that movement of the actuator with respect to the disk is minimized. 7. A storage device comprising: a disk device; and a disk control device for transferring data sent from a higher-level device to the disk device, wherein the disk control device includes an address of each area of the plurality of areas, Using the size of data to be written in the area as an element, creating a list in which the elements are ordered, transferring the list to the disk device, the disk device stores data in an area corresponding to the element in accordance with the order. A storage device for writing the data. 8. A storage device comprising: a storage medium for storing data; and a control unit for performing a process of writing data sent from a higher-level device to the storage medium, wherein the control unit includes a non-contiguous storage medium for the storage medium. When writing data to a plurality of areas, a list is created with the address of each area of the plurality of areas and the size of data to be written to the area for the data, and the list is stored according to the list. A storage device, wherein data is collectively written to a plurality of discontinuous areas of a medium.