JPH11251567A - Photoelectric converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce fixed pattern noises. SOLUTION: This converter has a p-type semiconductor substrate 10, a first n-type impurity layer 11 formed on the entire p-type semiconductor substrate 10, second impurity layer 12 having an impurity concn. lower than that of the first n-type impurity layer 11 on the entire first n-type impurity layer 11, a plurality of p-type impurity regions 13 on the second n-type impurity layer 12 and a peripheral circuit region 21 constituted of field-effect transistors 16, 17 on the second n-type impurity layer 12. The impurity layers 11, 12 of the opposite conductivity type to the semiconductor substrate 10 are formed on the semiconductor substrate 10, and photodetector 20 is formed thereon. Due to a potential barrier defined by a p-n junction of the semiconductor substrate 1 and the impurity layers 11, 12, the mixing of stray carriers into the photodetector 20 is reduced and fixed pattern noises can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric conversion device, and more particularly to a photoelectric conversion device in which a peripheral circuit composed of a plurality of light receiving elements and a field effect transistor is formed on the same semiconductor substrate.

[0002]

2. Description of the Related Art In recent years, one-dimensional and two-dimensional photoelectric conversion devices in which a light receiving element and peripheral circuits for performing signal processing and control are integrated on the same semiconductor substrate have been actively developed.

FIG. 2 is a schematic plan view showing an example of a photoelectric conversion device in which a light receiving element and peripheral circuits are integrated on the same semiconductor substrate. In the figure, 10 is a p-type semiconductor substrate, 20 is a light receiving element, 21 is a peripheral circuit, and 22 is a pad. The peripheral circuit 21 is constituted by a CMOS circuit.

In a MOS transistor, when a voltage is applied between the drain and source in a state where a channel is formed by applying a voltage to the gate, an electric field is concentrated near the drain end of the channel, and a new ion is formed by impact ionization. Electron-hole pairs may be generated. Most of the carriers generated by impact ionization become substrate currents, but some recombine, accompanied by light emission. Due to this light emission, new electron-hole pairs are generated in the semiconductor substrate and become stray carriers that diffuse into the semiconductor substrate. When the stray carrier reaches the light receiving element, a false signal is generated in addition to the original optical signal, which causes fixed pattern noise (FPN) in the photoelectric conversion device.

On the other hand, stray carriers are generated when a pn junction diode used for a protection circuit is instantaneously forward biased due to ringing or noise in addition to a MOS transistor, and charges injected into a semiconductor substrate become stray carriers. There is.

In order to suppress the fixed pattern noise due to such stray carriers, a solid-state image pickup device having a photoelectric conversion unit, a charge transfer unit, and an output unit provided on a semiconductor substrate having a minority carrier annihilation region (Japanese Patent Publication No. Hei 7-114267). And the like have been proposed.

FIG. 3 is a sectional structural view of the photoelectric conversion device disclosed in the above publication. The minority carrier annihilation region 7 is formed inside the semiconductor substrate 11 by an intrinsic gettering method (I
The active layer 8 is formed by a crystal defect layer or a high impurity concentration region according to the G method) and epitaxial growth thereon. Further, an impurity region 5 having a conductivity type opposite to that of the semiconductor substrate and reaching the minority carrier annihilation region 7 is formed so as to surround the photoelectric conversion portion, so that stray carriers do not reach the photoelectric conversion portion.

[0008]

The generation of spurious signals due to stray carriers entering the light receiving element cannot be ignored with respect to the signal level as the light receiving element becomes more sensitive.

However, a method of reducing stray carriers by a process technology such as an intrinsic gettering (IG) process as disclosed in the above publication leads to an increase in manufacturing cost and a decrease in throughput.

An object of the present invention is to provide a photoelectric conversion device in which a light receiving element and a peripheral circuit are integrated on the same semiconductor substrate, and an optical signal of the light receiving element among stray carriers generated in the peripheral circuit. An object of the present invention is to provide a photoelectric conversion device in which holes of the same conductivity type are prevented from being mixed into a light receiving element by a potential barrier by a pn junction, and fixed pattern noise caused by mixing of stray carriers is suppressed.

[0011]

In order to solve the above-mentioned problems, a photoelectric conversion device according to the present invention comprises a p-type semiconductor substrate and a first n-type impurity formed on the entire surface of the p-type semiconductor substrate. A layer and an entire surface on the first n-type impurity layer,
A second impurity layer having an impurity concentration lower than that of the first n-type impurity layer; a plurality of p-type impurity regions formed on the surface of the second n-type impurity layer; And a peripheral circuit region formed of a field-effect transistor formed in the layer.

[0012]

According to the above means, an impurity layer of the opposite conductivity type to the semiconductor substrate is formed on the semiconductor substrate, and a light receiving element is formed thereon, whereby a potential barrier by a pn junction between the semiconductor substrate and the impurity layer is provided. It is possible to reduce mixing of stray carriers into the light receiving element and reduce fixed pattern noise.

In consideration of the diffusion length of minority carriers, holes have a shorter diffusion length than electrons. Therefore, by forming the layer forming the light receiving element to be n-type, stray carriers generated in the peripheral circuit can be obtained. Are difficult to reach the light receiving element, which is effective in reducing fixed pattern noise due to the mixing of stray carriers.

Further, a potential barrier is formed by surrounding the p-type impurity region serving as a light receiving element with an n-type barrier region having a higher impurity concentration than the n-type impurity region for accumulating photocharges of the light receiving element. It becomes difficult to enter the light receiving element, and it is possible to further reduce fixed pattern noise.

[0015]

An embodiment according to the present invention will be described with reference to the drawings.

FIG. 1 is a schematic view of a sectional structure of a photoelectric conversion device according to the present invention. Note that the planar structure of the photoelectric conversion device is the same as the configuration in FIG.

In this embodiment, the p-type semiconductor substrate 10
An n ⁺ -type buried layer 11 and an n ⁻ -type epitaxial layer 12 are formed thereon, and a plurality of light receiving elements 20 and a peripheral circuit 21 including an operational amplifier and an output circuit are formed on the surface of the n ⁻ -type epitaxial layer 12.

The light receiving element 20 is an n-type epitaxial layer 12
A p ⁺ type region 13 and an n type region 14 are formed on the surface, and an n ⁺ type barrier region 15 is formed therearound. Due to the potential barrier of the n ⁺ -type buried layer 11 and the n ⁺ -type barrier region 15 of the pixel structure of the present embodiment, holes of minority carriers in the n-type semiconductor substrate that cause fixed pattern noise enter the light receiving element. Is reduced. Further, the peripheral circuit 21 is constituted by a CMOS circuit. 16 is n-type M
The OS transistor 17 is a p-type MOS transistor.

In the present invention, a potential may be applied to the p-type semiconductor substrate 10 from the substrate surface. In this embodiment, p
Although no potential is applied to the type semiconductor substrate 10 from the substrate surface, the potential becomes the same as that of the n-type buried layer 11 and the n-type epitaxial layer 12 due to a leak current generated at a scribe end or the like of the semiconductor substrate. This is particularly effective when a potential cannot be applied from the back surface of the semiconductor substrate.

Usually, it is desirable that the p-type substrate is fixed at the lowest potential, and the n-type region formed thereon is fixed at the highest potential. However, in this embodiment, n is formed on the entire surface of the p-type substrate.
Due to the presence of the mold region, when a chip is cut out from the wafer, a pn junction is exposed on the cut surface of the chip, and if a bias voltage is applied thereto, it causes leakage current. Therefore, when the potentials of the p-type substrate and the n-type region thereover are equalized, generation of a leak current can be suppressed. Also, if the p-type substrate is left floating, the potential of the p-type substrate drops following the potential of the n-type region at any time, so that the current due to forward bias can be suppressed.
Further, by making the p-type substrate floating, no back contact is required.

[0021]

As described above, in the photoelectric conversion device in which the light receiving element and the peripheral circuit are integrated on the same semiconductor substrate, by using the configuration of the present invention, the peripheral circuit which causes fixed pattern noise is reduced. The fixed pattern noise can be suppressed by reducing the entry of the stray carrier into the light receiving element by the potential barrier by the pn junction.

[Brief description of the drawings]

FIG. 1 is a schematic view of a sectional structure of a photoelectric conversion device according to the present invention.

FIG. 2 is a schematic diagram of a planar structure of a photoelectric conversion device in which a light receiving element and peripheral circuits are integrated on the same semiconductor substrate.

FIG. 3 is a schematic view of a cross-sectional structure of a conventional photoelectric conversion device.

[Explanation of symbols]

 Reference Signs List 10 p-type semiconductor substrate 11 n-type buried layer 12 n-type epitaxial layer 13 p-type region 14 n-type region 15 n-type barrier region 16 n-type MOS transistor 17 p-type MOS transistor 20 light receiving element 21 peripheral circuit 22 pad

Claims (5)

[Claims] A first n-type impurity layer formed on the entire surface of the p-type semiconductor substrate; a first n-type impurity layer formed on the entire surface of the p-type semiconductor substrate; A second impurity layer lower than the first n-type impurity layer; a plurality of p-type impurity regions formed on a surface of the second n-type impurity layer; and a plurality of p-type impurity regions formed on the second n-type impurity layer And a peripheral circuit region formed of a field-effect transistor. 2. The first n-type barrier region surrounding each of the p-type impurity regions and having a junction depth reaching the first n-type impurity layer. Photoelectric conversion device. 3. The photoelectric conversion device according to claim 1, wherein the first n-type impurity layer is an epitaxial growth layer. 4. The semiconductor device according to claim 1, wherein the first and second n-type impurity layers and the p-type semiconductor substrate have the same potential or substantially the same potential. Photoelectric conversion device. 5. The photoelectric conversion device according to claim 1, wherein the potential of said p-type semiconductor substrate is floating.