JPH11214385A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device, including a high dielectric insulating film (BST film) the dielectric constant of which is high and leakage currents are small, and a capacitor using this film as a capacitive insulating film. SOLUTION: When applying this method for the manufacture of a capacitor, a lower electrode is formed on a semiconductor substrate (S11), a BST film is formed on the surface of the lower electrode by a CVD method (S12), an upper electrode is formed on the BS film a capacitor can be formed (S13), and the BST film is formed, and then annealing is operated in a reduction gas atmosphere (S14). At the formation of the BST film, impurity such as carbon mixed into the BST film is reduced, and for the elimination of the impurity is removed from the BST film, a low dielectric constant layer which exists in the BST film due to the impurity is removed. In this way, the dielectric constant of the BST film is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a high dielectric insulating film, and more particularly to a method of manufacturing a semiconductor device having a high dielectric insulating film formed as a capacitor capacitor insulating film.

[0002]

2. Description of the Related Art With the recent increase in the degree of integration of semiconductor devices, miniaturization of capacitors is required for devices including capacitors such as DRAMs. With the miniaturization of such a capacitor, in order to secure the required charge storage capacity of the capacitor, the capacitor electrode surface is oriented perpendicular to the substrate surface to increase the electrode area with respect to the element area, For example, a crown capacitor having an electrode formed in a crown shape and the like have been proposed, and on the other hand, the dielectric constant of a capacitive insulating film has been increased. Conventionally, a so-called BST film represented by (Ba, Sr) TiO ₃ has been used as such a high dielectric insulating film. As a method of manufacturing the BST film, a sputtering method can be applied. When the BST film is formed by the sputtering method, a film having a relative dielectric constant in a wide range can be obtained. However, it is difficult to form a uniform BST film by the sputtering method on the surface of the electrode formed vertically on the surface of the semiconductor substrate like the above-mentioned crown capacitor.
For this reason, short-circuits and leak currents between the upper and lower electrodes are liable to occur in places where the film thickness is small, and the capacitor capacity is reduced in places where the film thickness is large, so that a capacitor with high withstand voltage and high capacity can be realized. Becomes difficult. So, BST
It is considered that the film is formed by a CVD method,
According to this CVD method, a uniform capacitance insulating film can be formed even in the case of manufacturing the above-mentioned crown capacitor, and the problem caused by the sputtering method as described above can be solved.

[0003]

However, the actual BS
It has been found that forming a T film by the CVD method causes a problem that it is difficult to obtain a high dielectric constant as expected this time. FIG. 7 is a diagram showing a dielectric constant when a BST film is formed by a CVD method (as depo) and a relative dielectric constant when the BST film is annealed at 400 ° C. using nitrogen gas to crystallize the BST film. is there. As described above, the relative dielectric constant of the BST film at the time of film formation is about 110, and even if this BST film is annealed, the relative dielectric constant cannot be increased. As a result, in the sputtering method, It is difficult to obtain a BST film having a high relative dielectric constant of about 150 to 200 as obtained.

An object of the present invention is to provide a high dielectric insulating film having a high relative dielectric constant and a small leak current, and a method of manufacturing a semiconductor device including a capacitor using the same as a capacitive insulating film.

According to the method of manufacturing a semiconductor device of the present invention, a high dielectric insulating film is formed on a semiconductor substrate and then an annealing treatment is performed in a reducing gas atmosphere to obtain a uniform film thickness and a high relative dielectric constant. It is characterized in that formation of a high dielectric insulating film can be realized. When the high dielectric insulating film obtained by the manufacturing method of the present invention is applied to the production of a dielectric film of a capacitor, a step of forming a lower electrode on a semiconductor substrate, and a step of forming a high dielectric constant film as a capacitive insulating film on the surface of the lower electrode. Forming a dielectric insulating film, forming an upper electrode on the high dielectric insulating film to form a capacitor, and performing an annealing process in a reducing gas atmosphere after forming the high dielectric insulating film. It is characterized by including a step.

Here, the annealing can be performed after forming the upper electrode. Further, it is preferable to form a Ru (ruthenium) film as the upper electrode and the lower electrode. Further, the high dielectric insulating film is made of BS.
This is a T film, which is formed by a CVD method. Further, the reducing gas is preferably a mixed gas of hydrogen and nitrogen containing 3 vol% or more of hydrogen, and the annealing treatment is preferably performed at 300 to 400 ° C. Further, a step of performing oxygen annealing after the annealing may be included.

According to the study of the present inventor, the reason why the relative permittivity of the conventional BST film is low is considered as follows. That is, a high dielectric constant can be obtained with a BST film formed by a sputtering method,
It is considered that the low dielectric constant of the BST film formed by the CVD method has a problem in the CVD method itself. Therefore, when the CVD method and the sputtering method are compared, when the BST film is formed by the CVD method, impurities are mixed into the BST film, and the impurities form a low dielectric constant layer in the BST film. It is considered to be. As this impurity, carbon contained in a gas at the time of forming the BST film can be considered. Therefore, in the present invention, the carbon mixed into the BST film is reduced and removed from the BST film, thereby eliminating the low dielectric constant layer and increasing the relative dielectric constant of the BST film. For this purpose, in the present invention, as a treatment for reducing carbon, the BST film is annealed using a reducing gas, for example, a gas containing hydrogen.

[0008]

Next, embodiments of the present invention will be described with reference to the drawings. 1 and 2 are sectional views showing an embodiment in which the present invention is applied to a technique for manufacturing a charge storage capacitor in a DRAM in the order of steps. First, FIG.
, A P-type impurity is implanted into the surface of the silicon substrate 1 to form a P-type well 2, and then a silicon thermal oxide film and a silicon nitride film (not shown) are selectively formed on the surface of the P-type well 2. Using the mask as a mask, the surface of the silicon substrate 1 is thermally oxidized to form a silicon oxide film 3 for element isolation. Then, after removing the silicon nitride film and the silicon thermal oxide film in the region where the memory cell defined by the element isolation oxide film 3 is formed, a thermal oxidation process is performed again to form a gate oxide made of the silicon thermal oxide film. The film 4 is formed.

Next, in FIG. 1B, polysilicon or a polycide in which polysilicon and a silicide material are laminated is formed on the entire surface, and is patterned to form a gate electrode 5 as a word line. Further, an N-type impurity is ion-implanted into the P-type well 2 by a self-alignment method using the gate electrode 5 to form an N-type source / drain region 6, thereby forming an N-channel MOS transistor. Then, as shown in FIG. 1C, after forming a first interlayer insulating film 7 such as BPSG by a CVD method, a data line contact hole 8 reaching the source / drain region 6 is formed in the first interlayer insulating film 7. An opening is formed on the first interlayer insulating film 7 with polysilicon or polycide buried in the data line contact hole 8;
Further, the data lines 9 are formed in a required pattern.
Further, as shown in FIG. 1D, after a second interlayer insulating film 10 such as BPSG is formed thereon by the CVD method, the source / source layer is passed through the second interlayer insulating film 10 and the first interlayer insulating film 7. A capacitor contact hole 11 reaching the drain region 6 is opened, and polysilicon or polycide is buried in the capacitor contact hole 11 to form a plug 12 for contact.

Next, as shown in FIG. 2A, after a thick silicon oxide film 13 is deposited on the second interlayer insulating film 10, the silicon oxide film 13 is used as a capacitor contact of each MOS transistor in the memory cell region. Plug 1
The recess 14 is formed by selectively removing the silicon oxide film 13 on the substrate 2 into a circle or a rectangle. Then, a Ru (ruthenium) film is formed on the silicon oxide film 13, and the Ru (ruthenium) film is left on the bottom surface and the inner side surface of the concave portion 14 by, for example, RIE etching using an O ₂ / Cl ₂ mixed gas. By etching and removing, a lower electrode 15 which is formed in a crown shape with the bottom portion and the peripheral wall portion and is integrated with the plug 12 at the bottom portion is formed. The thickness of the thick silicon oxide film 13 depends on the lower electrode 1.
Needless to say, it may be formed to a thickness corresponding to the height of the peripheral wall portion of No. 5.

Subsequently, as shown in FIG. 2B, after removing the thick silicon oxide film 13, the whole surface is subjected to ECR-CVD (Electric Cyclotron Resonance Plasma Chemical Vapor Deposition) as will be described in detail later. A BST film 16 is formed as a capacitor capacitance insulating film. In addition, R
An upper electrode 17 is formed by forming a u film. After that, a high dielectric annealing treatment is performed in a mixed gas atmosphere of hydrogen and nitrogen. Then, by forming the upper electrode 17 and the BST film 16 in a required pattern, a capacitor corresponding to each MOS transistor is formed. Thereafter, although not shown, a third interlayer insulating film, a protective film and the like are formed on the capacitor, and the DRAM is completed.

Here, a film forming process in the manufacturing process of the capacitor will be described. FIG. 3 is a flow chart showing a process of forming a Ru film as the lower electrode 15 (S11), a process of forming a BST film 16 on the Ru film 15 (S12), and an upper electrode on the BST film 16. Forming a Ru film 17 as a step (S13), and a high dielectric annealing treatment step (S14) of performing an annealing treatment in a reducing gas atmosphere on these laminated films, ie, the BST film. I have.

The step of forming the BST film 16 will be described. In this embodiment, as a material for forming the BST film,
As shown in the composition formula in FIG. 4, Ba (DPM) ₂ , Sr
It is performed by ECR-CVD as described above using (DPM) ₂ , Ti (OiC ₃ H ₇ ) ₄ and oxygen gas. At this time, the temperature of the silicon substrate is 120 ° C.
Gas pressure is about 7mTorr: μ-wave plasma power is 750W
And The formed BST film has a chemical formula of (Ba, S
r) TiO3, whose composition is (Ba + S
r) /Ti=1.20, Ba / (Ba + Sr) = 0.4
5 After the formation of the BST film, the BS
RTA as crystallization annealing for the purpose of crystallizing T film
(Rapid Thermal Annealing) processing. This R
The conditions for TA are 700 ° C. and 1 second in nitrogen gas.

On the other hand, by forming the BST film, carbon contained in each of the raw materials is mixed into the BST film to form a low dielectric constant layer, thereby lowering the relative dielectric constant of the entire BST film. I have. Therefore, the annealing for increasing the dielectric constant in step S14 is performed at 300 to 400 ° C. using a mixed gas of hydrogen and nitrogen containing 3 vol% or more of hydrogen in nitrogen. By the annealing for increasing the dielectric constant, the carbon mixed in the BST film is reduced by the hydrogen of the mixed gas, and the low dielectric constant layer in the BST film is removed. Note that nitrogen gas is used for safety, and another inert gas may be used. The volume ratio of the hydrogen gas is also 3 to 50 from the relationship between the annealing temperature and the processing time.
% Can be set arbitrarily.

FIG. 5 and FIG. 6 show the results of measuring the characteristics of the capacitor formed by performing the high dielectric annealing containing hydrogen after the formation of the BST film. FIG. 5 shows the state when the BST film was formed (as depo), 30
The figure shows the relative dielectric constant after each of the high dielectric annealing treatments at 0 ° C., 350 ° C., and 400 ° C. From this, the relative dielectric constant when the annealing process only for forming the BST film is not performed is about 120 to 130, but the relative dielectric constant increases to 180 to 200 in each of the annealing processes at 300 ° C. and 350 ° C. You can see that it is.
Further, it was confirmed that the relative dielectric constant in the annealing process at 400 ° C. was about 160, which was slightly lower than that at each of the above temperatures, but increased compared to the case without annealing. Was done. The reason why the relative dielectric constant is slightly lowered in the annealing process at 400 ° C. is that O (oxygen) composing the BST film escapes from the BST film due to hydrogen due to the high-temperature process, and this portion is It is presumed that this is because defects occur in the crystals of the BST film.

FIG. 6 is a diagram showing the measurement results of the leakage current characteristics of the formed capacitor. As shown in FIG. 5, the high dielectric annealing treatment is not performed (as depo).
The graph shows the leakage current with respect to the applied voltage for each BST film that has been annealed at 300 ° C., 350 ° C., and 400 ° C. From this measurement result, even when the high dielectric annealing treatment is performed, no noticeable change occurs in the leak current characteristics. This is because when the Ru film is used for each of the upper and lower electrodes as in the above-described embodiment, P
Since the BST reduction promoting action that occurs when a catalytic electrode such as t is used is suppressed, oxygen defects are not formed even when hydrogen annealing is performed, and the reel current does not increase due to the oxygen defects. is there. However, the annealing temperature is 400 ° C
Is slightly larger than the others because oxygen was removed from the BST film as estimated in the case of the measurement result of the relative permittivity described above, and the It is presumed that the current was increased. The value at the applied voltage of 2 to 3 V when the high dielectric annealing treatment is not performed is considered to be due to a measurement error. As described above, it was confirmed that the leak current at a voltage of 0.75 V applied when the capacitor was configured as a DRAM capacitor was a value having no practical problem.

It should be noted that the annealing for increasing the dielectric constant is performed by
In order to prevent a decrease in relative dielectric constant and an increase in leak current due to removal of oxygen occurring at about 00 ° C., an oxygen annealing treatment for compensating for oxygen defects due to the removed oxygen may be performed. As a technique for compensating for such oxygen vacancies, for example, Jpn.J.Appl.Phys.Vol.35 (1996) pp.5178
-5180 Part 1, No.9B, September 1996 `` Origin of Diel
ectric Relaxation Observed for Ba _0.5 Sr _0.5 TiO ₃ Thin
-Film Capacitor ".

Here, the annealing for increasing the dielectric constant of the present invention can be basically realized by removing the elements mixed in the BST film by a reduction treatment. Therefore, the gas used for annealing is limited to the above-mentioned hydrogen. However, a reducing gas such as carbon dioxide gas or tetrahydrofuran (C ₄ H ₈ O) can be used.

Further, the high dielectric insulating film according to the present invention comprises:
The present invention is not limited to the BST film of the above-described embodiment.
The same applies to high dielectric insulating films such as TiO ₃ , SrTiO ₃ , and TaO _3. After forming these high dielectric insulating films by a CVD method, annealing in a reducing gas atmosphere is performed to obtain a relative dielectric constant. Can be increased. The present invention is characterized by increasing the relative dielectric constant caused by impurities mixed in the BST film, and is not limited to the above-described CVD method, and may be formed by a sputtering method in some cases. By performing the same reduction treatment on the BST film, the relative dielectric constant can be improved.

Further, when the present invention is formed as the dielectric film of the capacitor as in the above embodiment, the upper and lower electrodes of the capacitor are preferably Ru films in order to suppress the leakage current as described above. In the case where the current does not cause a problem, or in the case where the above-described oxygen deficiency is compensated by oxygen annealing, Pt may be used because the problem of oxygen extraction in the high dielectric annealing treatment is solved. Can also be used.

In the above embodiment, the high dielectric annealing treatment is performed after the upper electrode is formed on the BST film. However, the annealing may be performed immediately after the BST film is formed. In this case, since the annealing process is performed in a state where the BST film is exposed, the impurity (carbon) in the GST film is
Although the efficiency of reducing and removing is increased, the generation of the oxygen vacancies described above tends to be remarkable, and accordingly, if the timing of the high dielectric annealing process is appropriately set in view of the balance between the anneal efficiency and the oxygen vacancy compensation. Good.

Although the above embodiment shows an example in which the high dielectric insulating film or capacitor of the present invention is applied to a capacitor for storing information of a DRAM, various high dielectric constant films formed on a semiconductor substrate as a semiconductor device are shown. The present invention can be similarly applied to an insulating film or a capacitor, particularly a high dielectric insulating film or a capacitor when uniform film formation is difficult by a sputtering method.

[0023]

As described above, according to the present invention, a high dielectric insulating film such as a BST film is formed and then an annealing treatment is performed in a reducing gas atmosphere such as hydrogen to form the high dielectric insulating film. At this time, impurities such as carbon mixed in the high dielectric insulating film are reduced to remove the impurities from the high dielectric insulating film. Therefore, the low dielectric constant layer existing in the high dielectric insulating film is removed by the impurity, and the relative dielectric constant of the high dielectric insulating film can be improved. In addition, by appropriately controlling the temperature at the time of the annealing treatment, a high dielectric insulating film with suppressed leakage current can be obtained. As a result, it is possible to manufacture a capacitor having a small area, a high capacitance and a low leakage current, and a gigabit class DRA.
The manufacture of highly integrated semiconductor devices such as M can be realized.

[Brief description of the drawings]

FIG. 1 is a first sectional view showing an embodiment in which the present invention is applied to a DRAM capacitor forming step in the order of steps;

FIG. 2 is a second sectional view showing a step that follows the step of FIG. 1;

FIG. 3 is a flow chart showing a capacitor film forming step when the present invention is applied to a capacitor forming step.

FIG. 4 is a diagram showing raw materials for a BST film according to the present invention.

FIG. 5 is a graph showing a relative dielectric constant characteristic with respect to an annealing temperature of a BST film formed by the method of the present invention.

FIG. 6 is a view showing a leakage current characteristic with respect to an annealing temperature of the BST film of FIG. 5;

FIG. 7 is a diagram showing a relative dielectric constant characteristic of a BST film formed by a CVD method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 P-type well 3 Element isolation oxide film 4 Gate oxide film 5 Gate electrode (word line) 6 Source / drain region 7 First interlayer insulating film 8 Data line contact 9 Data line 10 Second interlayer insulating film 11 Capacitor contact 12 Plug 13 Thick silicon oxide film 14 Depression 15 Lower electrode (Ru film) 16 Capacitance insulating film (BST film) 17 Upper electrode (Ru film)

Claims (8)

[Claims] 1. A method for manufacturing a semiconductor device, comprising: performing a annealing process in a reducing gas atmosphere after forming a high dielectric insulating film on a semiconductor substrate. 2. A step of forming a lower electrode on a semiconductor substrate; a step of forming a high dielectric insulating film as a capacitive insulating film on a surface of the lower electrode; and forming an upper electrode on the high dielectric insulating film. A method of manufacturing a semiconductor device, wherein a capacitor is formed on a semiconductor substrate including the step of performing, after the high dielectric insulating film is formed, annealing is performed in a reducing gas atmosphere. Method. 3. The method according to claim 2, wherein the annealing is performed after forming the upper electrode. 4. An Ru electrode as the upper electrode and the lower electrode.
The method for manufacturing a semiconductor device according to claim 2, wherein a (ruthenium) film is formed. 5. The high dielectric insulating film is made of (Ba, Sr) Ti
O ₃ high dielectric insulating film (hereinafter referred to as BST film),
The method for manufacturing a semiconductor device according to claim 1, wherein the film is formed by a CVD method. 6. The method for manufacturing a semiconductor device according to claim 1, wherein the reducing gas is a mixed gas of hydrogen and nitrogen containing 3 vol% or more of hydrogen. 7. The method for manufacturing a semiconductor device according to claim 6, wherein the annealing is performed at 300 to 400 ° C. 8. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of performing oxygen annealing after said annealing.