JPH11176758A - Semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a GaN semiconductor layer on a silicon board readily, by constituting a buffer layer of a first Ti buffer layer formed on a board and a second Zr buffer layer formed on the second buffer layer. SOLUTION: A board 21, a Ti lump and a Zr lump are mounted inside a chamber of an EB deposition device. A chamber is evacuated by using a vacuum device. Thereafter, nitrogen gas is fed and filled in a chamber. A chamber is evacuated again and the board 21 is kept at about 150 deg.C by using a lamp heater. Then, Ti is deposited in a (111) surface of the board 21 by an electron beam method and a first buffer layer 22a is obtained. Successively, Zr is deposited on the first buffer layer 22a by an electron beam method keeping vacuum state and a second buffer layer 22b is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device including a GaN-based semiconductor layer.

[0002]

2. Description of the Related Art It is known that a GaN-based semiconductor can be used, for example, as a blue light emitting device. In such a light-emitting element, sapphire is generally used for a substrate, and a GaN-based semiconductor layer is laminated via an AlN layer, for example, to form a light-emitting element structure. Here, the AlN layer is Ga
It is considered that it plays a role of giving nucleation when growing an N-based semiconductor layer.

In such a device, it is desired to replace the sapphire substrate with another material. This is because the sapphire substrate is expensive. Furthermore, since the sapphire substrate is an insulator, it is necessary to form an electrode on the same surface side and a part of the semiconductor layer must be etched, and the number of bonding steps is doubled accordingly. In addition, since both n and p electrodes are formed on the same surface side, there is also a limitation on miniaturization of the element size. In addition, there was a problem of charge-up.

In order to avoid such a problem of the sapphire substrate, a technique for growing a GaN-based semiconductor layer on a silicon substrate has been studied. JP-A-8-310900
See Japanese Patent Application Laid-Open No. 9-92882 and Japanese Patent Application Laid-Open No. 9-92882.

[0005]

However, according to the study of the present inventors, it has been very difficult to grow a GaN-based semiconductor layer on a silicon substrate. One of the causes is a difference in thermal expansion coefficient between silicon and a GaN-based semiconductor. The linear expansion coefficient of silicon is 4.7 X 10 ^-6 /
GaN has a coefficient of linear expansion of 5.59 X 1
0 ⁻⁶ / K, the former being larger than the latter. Therefore, Ga
When heating is performed when growing an N-based semiconductor, the element is deformed such that the silicon substrate 1 is elongated and the GaN-based semiconductor layer 3 is compressed, as shown in FIG. At this time, Ga
A tensile stress is generated in the N-based semiconductor layer 3, and as a result, a crack 5 may be generated. Moreover, even if the crack 5 does not occur, the lattice is distorted. Therefore, the GaN-based semiconductor element cannot exhibit its original function.

Accordingly, the present invention provides a method of forming a G on a silicon substrate.
It is an object of the present invention to provide a semiconductor light emitting device having a novel configuration in which an aN-based semiconductor layer can be easily formed.

[0007]

Means for Solving the Problems One of the inventors of the present invention has made intensive studies to achieve the above object, and as a result, was found in Japanese Patent Application No. Hei.
-293463, Cr, Hf, Nb, Ta, V, Ti, Z between the silicon substrate and the GaN-based semiconductor layer.
The inventors have conceived of interposing one or more buffer layers made of one or more metals selected from r.

When the above-mentioned metal buffer layer is interposed between the silicon substrate and the GaN-based semiconductor layer, the buffer layer 12 becomes the GaN-based semiconductor layer 13 as shown in FIG.
Since the stress generated due to the difference in thermal expansion coefficient between the substrate and the substrate 11 is buffered, the tensile stress in the GaN-based semiconductor layer 13 is reduced. Therefore, cracks hardly occur there, and lattice distortion is reduced. Therefore, G
The aN-based semiconductor layer 13 can exhibit its original function as designed.

The silicon substrate and the metal buffer layer are both conductive. This makes it possible to connect an electrode to the substrate and to supply electricity to the GaN-based semiconductor layer from the substrate side. Therefore, complicated etching for the semiconductor layer, which is required when an element is formed using a GaN-based semiconductor layer, becomes unnecessary. In the example of FIG. 3, the n-cladding layer can be electrically connected to the outside via the buffer layer and the substrate. On the other hand, in the case of a sapphire substrate, the light emitting layer and the p-cladding layer are etched by
It was necessary to expose the cladding layer and electrically connect it to the outside. Since it becomes possible to conduct electricity to the semiconductor layer via the substrate and the buffer layer, bonding to an external power supply is also facilitated. Further, since electrodes can be formed above and below the semiconductor layer, the size of the element can be reduced. Furthermore, the problem of charge-up can be easily solved by grounding.

When the buffer layer is made of metal, G
When the aN-based semiconductor layer has a light emitting element structure or a light receiving element structure, the buffer layer itself functions as a reflection layer. Therefore, it is not necessary to form a separate reflective layer, which is required for the light emitting element and the light receiving element using the transparent sapphire substrate of the conventional example. Further, when the substrate is formed of a material that absorbs light, such as GaAs, the operation of removing the substrate becomes unnecessary.

The present inventors have further studied by focusing on Zr and Ti. This is because Zr and Ti have the following advantages. Since the melting points of Ti and Zr are 1000 ° C. or higher, they are stable even at the temperature applied during the manufacturing process of the GaN-based semiconductor layer. Ti and Zr have a linear expansion coefficient of 10 X 10 ^-6 /
Since it is less than K, it is close to that of a silicon material, and the elastic modulus of Ti and Zr is relatively soft, 15 × 10 ¹⁰ N / m ² or less, so it is caused by a difference in linear expansion coefficient between silicon and a GaN-based semiconductor. Internal stress is relieved by the buffer layer. Since the nitride generation energy of Zr is negative, a favorable adhesion between the buffer layer and the GaN-based semiconductor can be obtained. 2% difference in lattice constant between Zr and GaN-based semiconductor layer
Because of the following, the affinity between the buffer layer and the GaN-based semiconductor layer is improved, and the lattice distortion of the GaN-based semiconductor layer is reduced. Since Ti can form silicide, favorable adhesion between the buffer layer and the silicon substrate can be obtained. Since the crystal structure of Zr is hexagonal, which is the same as that of the GaN-based semiconductor, the compatibility between the buffer layer and the GaN-based semiconductor layer is improved, and lattice distortion of the GaN-based semiconductor layer is reduced. The specific characteristics of Ti and Zr are as follows. Melting point Linear expansion coefficient Elastic modulus Lattice constant Ti 1680 ° C 8.9 X 10 ^-6 / K 11.42 X 10 ¹⁰ N / m ² 2.950 Zr 1850 ° C 5.0 X 10 ^-6 / K 9.76 X 10 ¹⁰ N / m ² 3.231

As a result of the above study, the following invention has been reached.
A silicon substrate, a GaN-based semiconductor layer, and a buffer layer provided between the substrate and the semiconductor layer, wherein the buffer layer is a first Ti buffer formed on the substrate. A semiconductor device comprising: a first buffer layer; and a buffer layer including a second Zr buffer layer formed on the first buffer layer.

As described above, it has been found that when a Ti layer and a Zr layer are sequentially formed on a silicon substrate, the Zr layer tends to be c-axis oriented. That is, as compared with the case where the Zr layer is formed directly on the silicon substrate, the Zr crystal grown on the silicon substrate via the Ti layer is <000.
The tendency to grow in the 1> direction increases. This is because Ti can be deposited with high orientation. Note that Ga
Since the N-based semiconductor layer is usually c-axis oriented, it goes without saying that the buffer layer serving as the base is preferably c-axis oriented at least on the surface (the surface in contact with the semiconductor layer).

Here, the thickness of the first buffer layer made of Ti is preferably 0.01 to 10 μm. 0.01μ
If it is less than 10 m, the c-axis orientation is weak.
Exceeding the range causes surface unevenness, which is not preferable. More preferably, it is 0.01 to 1 μm. Still more preferably, it is 0.03-0.3 μm. The thickness of the second buffer layer made of Zr is preferably 0.1 μm or more.
If it is less than 0.1 μm, the c-axis orientation is weak. More preferably, it is 0.2 to 0.8 μm. Still more preferably, it is 0.2 to 0.5 μm.

Note that another layer can be provided between the substrate, the first buffer layer, the second buffer layer, and the semiconductor layer as long as the effects of the present invention are not impaired.

According to the study of the present inventors, when the first buffer layer made of Ti is formed on the (111) plane of the silicon substrate, the c-axis orientation of the second buffer layer made of Zr is further promoted. It turned out to be.

According to the study of the present inventors, the first buffer layer made of Ti and the Zr
Preferably, a second buffer layer is grown. When the buffer layer is formed with the silicon substrate heated,
This is because it has been found that Zr is easily c-axis oriented. It is considered that the reason is that Zr easily moves to the lattice point when it reaches the substrate. The temperature of the silicon substrate when forming the buffer layer is preferably 100 to 250 ° C.,
When the temperature is lower than 100 ° C., it is difficult to obtain a buffer layer made of Zr with c-axis orientation, and it is not necessary to raise the temperature of the silicon substrate to over 250 ° C. Further, the temperature of the silicon substrate when forming the buffer layer is more preferably 130 to 200 ° C. When the temperature of the silicon substrate is set to 130 ° C. or higher, the adhesiveness of the buffer layer to the silicon substrate becomes sufficient, and the wafer needs to be 1000
Even when heated to a temperature close to ° C., the buffer layer does not peel off or float from the silicon substrate. The temperature of the silicon substrate when forming the buffer layer is further more preferably 1
50-200 ° C.

The method for forming the buffer layer is not particularly limited, and is appropriately selected according to the characteristics of the material of the substrate and the material of the buffer layer itself. For example, when the buffer layer is formed of the above-described metal, a CVD (Chemical Vapor Depos) such as a plasma CVD, a thermal CVD, and an optical CVD is used.
(physical), sputtering, vapor deposition, etc.
(Vapour Deposition) or the like.

However, when forming the buffer layer, the atmosphere is substantially free of oxygen. This is because if oxygen is present when the buffer layer is formed, Ti and Zr, which are the materials for the formation, may react with oxygen.

[0020]

Embodiments of the present invention will be described below. The semiconductor element of the embodiment described below is a light-emitting diode 20, the configuration of which is shown in FIG.

The specifications of each semiconductor layer are as follows. Layer: Composition: Dopant (thickness) P-cladding layer 25: p-GaN: Mg (0.3 μm) Light-emitting layer 24: Superlattice structure Quantum well layer: In _0.15 Ga _0.85 N (3.5 nm) Barrier layer: GaN (3.5 nm) Number of repetitions of quantum well layer and barrier layer: 1 to 10 n cladding layer 23: n-GaN: Si (4 μm) second buffer layer 22 b: Zr (0.3 μm) first buffer layer 22 a: Ti (0.05 μm) ) Substrate 21: Si <111> (300 μm)

The n-cladding layer 23 has a low electron concentration n layer on the light emitting layer 24 side and a high electron concentration n ⁺ on the second buffer layer 22b side.
It can have a two-layer structure composed of layers. Light emitting layer 24
Is not limited to a superlattice structure, but is a single hetero type,
Double hetero-type and homozygous types can be used. Emitting layer 24 and wide Al _X bandgap doped with an acceptor of magnesium or the like between the p-cladding layer _{25 In Y Ga 1-XY N} (X = 0, including a Y = 0, X = Y = 0) layer Can be interposed. This is to prevent the electrons injected into the light emitting layer 24 from diffusing into the p clad layer 25. The p-cladding layer 25 can have a two-layer structure including a low hole concentration p layer on the light emitting layer 24 side and a high hole concentration p ⁺ layer on the electrode 26 side.

In the above, the first buffer layer 22a is formed on the (111) plane of the substrate 21 as follows.
First, the substrate 21, the Ti lump, and the Zr lump are mounted in a chamber of an EB vapor deposition apparatus widely used in industry. Then, the inside of the chamber is set to 1 × 10 ⁻³ T using a vacuum device attached to the device.
Vacuum to about orr. Thereafter, nitrogen gas is sent into the chamber to fill it. Such a nitrogen gas purge is repeated three times. After that, the inside of the chamber is 8 × 10 ⁻⁷ T
The vacuum is applied again to about orr, and the substrate 21 is maintained at about 150 ° C. by a lamp heater. Then, Ti is deposited on the (111) plane of the substrate by an electron beam method,
A first buffer layer 22a having a thickness of about 0.05 μm is obtained. The deposition rate is 3 to 5 angstroms / second.
Subsequently, while maintaining a vacuum state of 8 × 10 ⁻⁷ Torr, Zr is deposited on the first buffer layer 22 a by an electron beam method.
To obtain a second buffer layer 22b having a thickness of about 0.3 μm. The deposition rate is 3 to 5 angstroms / second.

In the above, purging with nitrogen gas is performed when Ti and Zr are deposited on the silicon substrate 21.
And Zr to prevent TiO _X and ZrO _X from forming by reacting with residual oxygen in the chamber. Therefore, an inert gas other than nitrogen gas can be used.
If the chamber can be evacuated to such an extent that the reaction between Ti and Zr and oxygen can be prevented, the purging with nitrogen gas is unnecessary. However, according to the study of the present inventors, purging with nitrogen gas was indispensable for the capability (vacuum degree: 10 ⁻⁷ Torr) of a vacuum device attached to a vapor deposition device that is currently widely used in industry.

Thereafter, the substrate 21 is set in a heating device,
Install in another chamber. Then, the inside of the chamber is 1.5
Vacuum to ^10-5 Torr. Then, the first buffer layer 22 and the second buffer layer 23 are substantially 600
Heat to ℃ and maintain for 5 minutes (anneal). Then, it is left to cool.

Each GaN-based semiconductor layer on the buffer layer is formed by a well-known metalorganic compound vapor deposition method (hereinafter referred to as “MOCVD”).
The law. " ). In this growth method, ammonia gas and an alkyl compound gas of a group 3 element are used.
For example, trimethylgallium (TMG), trimethylaluminum (TMA) or trimethylindium (TMI)
Are supplied to a substrate heated to an appropriate temperature to cause a thermal decomposition reaction, thereby growing a desired crystal on the substrate. The GaN-based semiconductor layer is formed by a molecular beam crystal growth method (MBE method).
Can obtain the same thing.

The GaN-based semiconductor is a group III nitride semiconductor, which is generally Al _x In _Y Ga _{1 -XY} N (X =
0, Y = 0, and X = Y = 0). As is well known, a light emitting element and a light receiving element have a configuration in which a light emitting layer is sandwiched between semiconductor layers (cladding layers) of different conductivity types, and a super lattice structure, a double hetero structure, or the like is adopted for the light emitting layer.

As shown in FIG. 4, the material (Ti) of the first buffer layer 22a reacts with the material (Si) of the substrate 21 due to the heat generated when the MOCVD method is performed, and silicide (TiSi ₂ ) is formed. It is formed. The material (Zr) of the second buffer layer 22b has the same crystal structure (hexagonal) as GaN and has a lattice constant close to that of GaN. Therefore, it is expected that the ZrN layer is formed by fusing the two layers between the cladding layer 23 and the second buffer layer 22b.

The translucent electrode 26 is a thin film containing gold.
The cladding layer 25 is laminated so as to cover substantially the entire upper surface. The p-electrode 28 is also made of a material containing gold, and is formed on the translucent electrode 26 by vapor deposition. n electrode 27
Is attached to the substrate 21 by vapor deposition.

The element to which the present invention is applied is not limited to the light emitting diode described above, but may be applied to an electronic device having an FET structure in addition to an optical element such as a light receiving diode and a laser diode. In addition, the present invention also relates to a laminate obtained by sequentially laminating a silicon substrate, a first buffer layer made of Ti, a second buffer layer made of Zr, and a GaN-based semiconductor layer as an intermediate of these elements. Is applicable. It should be noted that similar results can be obtained with GaP, GaAs, InP and the like in addition to Si.

[0031]

Test Examples Hereinafter, test examples for confirming the effects of the present invention will be described.

(Test 1) This test confirms the effect of growing a second buffer layer made of Zr on a silicon substrate via a first buffer layer made of Ti. In both Test Examples 1 and 2, the silicon substrate (10
0) A surface was prepared, and a buffer layer was formed thereon. In Test Example 1, a first buffer made of Ti was provided on a silicon substrate, and then a second buffer layer made of Zr was provided on the first buffer layer. In Test Example 2, a buffer layer made of Zr was provided directly on the silicon substrate. The method of forming each buffer layer in Test Example 1 and Test Example 2 is the same as the method described in the above-described embodiment. The results were obtained using an X-ray analyzer (model number: X-pert) manufactured by Philips.
This is a diffraction pattern obtained in the range of (20 to 100) ° (the same applies to other test examples).

FIGS. 5 and 6 show the diffraction patterns of Test Example 1 and Test Example 2, respectively. From the results of FIGS. 5 and 6,
The growth of the second buffer layer made of Zr via the first buffer layer made of Ti on the silicon substrate is compared with the case where the buffer layer made of Zr is directly grown on the silicon substrate. Thus, it is found that the tendency of the c-axis orientation of the second buffer layer made of Zr is high.

(Test 2) In this test, when each buffer layer was formed on a surface different from the surface of the silicon substrate used in Test 1, a second buffer made of Zr was passed through a first buffer layer made of Ti. The effect of growing the layer is confirmed. In Test 1, each buffer layer was formed on the (100) plane of the silicon substrate. In Test 2, the (111) plane of the silicon substrate was prepared, and each buffer layer was formed thereon. As in Test Example 1 in Test 1, in Test Example 3, a first buffer made of Ti was provided on a silicon substrate, and then a second buffer layer made of Zr was provided on the first buffer layer. . In Test Example 4, similarly to Test Example 2 in Test 1, a buffer layer made of Zr was provided directly on the silicon substrate. Other conditions are the same as in Test 1.

FIGS. 7 and 8 show diffraction patterns of Test Examples 3 and 4, respectively. From the results of FIGS. 7 and 8,
When the buffer layer is formed on the (111) plane of the silicon substrate, similarly to the case where the buffer layer is grown on the (100) plane of the silicon substrate, the first Ti layer made of Ti is formed on the silicon substrate. It can be understood that the growth of the second buffer layer made of Zr through the buffer layer of the above has a higher tendency of the c-axis orientation of the second buffer layer made of Zr.

(Test 3) This test was performed for the silicon substrate (1).
This is to compare the degree of c-axis orientation of the buffer layer made of Zr when each buffer layer is formed on the (11) plane and the (100) plane, respectively. In Test Example 5, the silicon substrate (11
1) A surface was prepared, a first buffer layer made of Ti was formed thereon, and then a second buffer layer made of Zr was formed thereon.
In Test Example 6, a (100) plane was prepared instead of the (111) plane of the silicon substrate, and the other buffer layers were formed in the same manner as in Test Example 5. The other method of forming each buffer layer is the same as the method described in the above embodiment.

FIGS. 9 and 10 show diffraction patterns of Test Examples 5 and 6, respectively. From the results of FIGS. 9 and 10, when the first and second buffer layers were formed on the (111) plane of the silicon substrate, each buffer layer was similarly formed on the (100) plane of the silicon substrate. Z compared to the case
It can be seen that the tendency of the c-axis orientation of the second buffer layer made of r is high.

(Test 4) This test confirms the effect of the present invention when the buffer layer is annealed. In Test 4, Test Example 5 and Test Example 6 in Test 3 were annealed under the following conditions, respectively. Test Example 7 to Test Example 10 are Test Example 5.
Are annealed under different conditions, and Test Examples 11 to 14 are the results of annealing Test Example 6 under different conditions.

Substrate Surface Annealing Conditions Result Test Example 5 (111) None ○ Test Example 6 (100) None ○ Test Example 7 (111) 400 ° C./Vac ○ Test Example 8 (111) 600 ° C./Vac ○ Test Example 9 ( 111) 800 ° C./Vac △ Test Example 10 (111) 800 ° C./1 atm (N ₂ ) ○ Test Example 11 (100) 400 ° C./Vac ○ Test Example 12 (100) 600 ° C./Vac ○ Test Example 13 (100) ) 800 ° C./Vac △ Test Example 14 (100) 800 ° C./1 atm (N ₂ ) ○ Note) Vac: vacuum (about 1.5 × 10 ⁻⁵ Torr) 1 atm (N ₂ ): inside the chamber during annealing Filled with nitrogen gas at 1 atm. ○: no separation between buffer layer and substrate △: slight separation between buffer layer and substrate

According to the above test results, when annealing is performed under the temperature condition of 800 ° C., regardless of the surface of the silicon substrate on which the buffer layer is formed, a slight peeling between the buffer layer and the substrate is performed in a vacuum atmosphere. (Test Examples 9 and 13). In contrast, when annealing is performed in an atmosphere filled with nitrogen at 1 atm in the chamber, no separation occurs between the buffer layer and the substrate even at 800 ° C., and a good laminate is obtained. It can be seen that it is obtained (Test Examples 10 and 14). As a result, it is understood that when annealing is performed at a high temperature, it is preferable to perform the annealing in an atmosphere filled with nitrogen gas at 1 atm in the chamber.

The present invention is not limited to the description of the above-described embodiments and examples, but includes various modifications that can be made by those skilled in the art without departing from the scope of the claims.

Hereinafter, the following items will be disclosed. (10) A silicon substrate, a GaN-based semiconductor layer, and a buffer layer provided between the substrate and the semiconductor layer, wherein the buffer layer is a first buffer layer made of Ti on the substrate side. And a buffer layer including a second buffer layer made of Zr on the semiconductor layer side. (11) A silicon substrate, a GaN-based semiconductor layer, and a buffer layer provided between the substrate and the semiconductor layer, wherein the buffer layer is a first buffer layer made of Ti on the substrate side. And a buffer layer including a second buffer layer made of Zr on the semiconductor layer side.

(20) A substrate made of silicon is prepared, and a first buffer layer made of Ti is formed on the substrate.
Forming a second buffer layer made of Zr on the first buffer layer, and forming a GaN-based semiconductor layer on the second buffer layer. (21) The temperature of the silicon substrate is raised to 100 to 250 ° C., and the first buffer layer made of Ti and the first buffer layer are formed on the substrate.
Forming a second buffer layer made of Zr on said buffer layer, and thereafter forming a GaN-based semiconductor layer on said second buffer layer. (22) A silicon substrate having a (111) plane is prepared, and a first buffer layer made of Ti is formed on the substrate.
A method for manufacturing a semiconductor device, comprising: forming a second buffer layer made of Zr on the first buffer layer; and forming a GaN-based semiconductor layer on the second buffer layer. (23) A silicon substrate having a (111) plane is prepared, the substrate is heated to 100 to 250 ° C., a first buffer layer made of Ti is formed on the substrate, and the first buffer layer is formed. A method for manufacturing a semiconductor device, comprising: forming a second buffer layer made of Zr on a buffer layer; and forming a GaN-based semiconductor layer on the second buffer layer. (24) Prepare a silicon substrate and place T on the substrate.
forming a first buffer layer made of i, forming a second buffer layer made of Zr on the first buffer layer, and forming a GaN-based semiconductor layer on the second buffer layer; A method for manufacturing a laminate. (25) raising the temperature of the silicon substrate to 100 to 250 ° C., forming a first buffer layer made of Ti on the substrate,
A method for manufacturing a laminated body, comprising: forming a second buffer layer made of Zr on the first buffer layer; and forming a GaN-based semiconductor layer on the second buffer layer. (26) A silicon substrate having a (111) plane is prepared, and a first buffer layer made of Ti is formed on the substrate.
A method for manufacturing a laminated body, comprising: forming a second buffer layer made of Zr on the first buffer layer; and forming a GaN-based semiconductor layer on the second buffer layer. (27) A silicon substrate having a (111) plane is prepared, the substrate is heated to 100 to 250 ° C., a first buffer layer made of Ti is formed on the substrate, and the first buffer layer is formed. A method for manufacturing a stacked body, comprising: forming a second buffer layer made of Zr on a buffer layer; and forming a GaN-based semiconductor layer on the second buffer layer.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating warpage of an element due to a difference in thermal expansion coefficient between a silicon substrate and a GaN-based semiconductor layer.

FIG. 2 is a conceptual diagram of the present invention and shows stress relaxation when a buffer layer is interposed between a silicon substrate and a GaN-based semiconductor layer.

FIG. 3 is a diagram showing a light emitting diode according to an embodiment of the present invention.

FIG. 4 is an enlarged view of a substrate, a buffer layer, and an n-cladding layer in FIG. 3, showing a reaction between a substrate—a first buffer layer made of Ti and a second buffer layer made of Zr—GaN. Show.

FIG. 5 shows a diffraction pattern of Experimental Example 1.

FIG. 6 shows a diffraction pattern of Comparative Example 1.

FIG. 7 shows a diffraction pattern of Experimental Example 2.

FIG. 8 shows a diffraction pattern of Comparative Example 2.

FIG. 9 shows a diffraction pattern of Experimental Example 3.

FIG. 10 shows a diffraction pattern of Comparative Example 3.

[Explanation of symbols]

 1, 11, 21 Substrate 12, Buffer layer 22a First buffer layer made of Ti 22b Second buffer layer made of Zr 3, 13, 23, 24, 25 GaN-based semiconductor layer 20 Semiconductor light emitting device

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Jun Ito Nagahata 1 Ochiai, Kasuga-cho, Nishi-Kasugai-gun, Aichi Prefecture Inside Toyoda Gosei Co., Ltd. Address Toyota Gosei Co., Ltd.

Claims (4)

[Claims] 1. A silicon substrate, a GaN-based semiconductor layer, and a buffer layer provided between the substrate and the semiconductor layer, wherein the buffer layer is formed on the substrate.
A semiconductor device comprising: a first buffer layer made of i; and a buffer layer composed of a second buffer layer made of Zr formed on the first buffer layer. 2. The semiconductor device according to claim 1, wherein the buffer layer is formed on a (111) plane of the substrate. 3. A silicon substrate, a GaN-based semiconductor layer, and a buffer layer provided between the substrate and the semiconductor layer, wherein the buffer layer is formed on the substrate.
A laminate comprising: a first buffer layer made of i; and a buffer layer composed of a second buffer layer made of Zr formed on the first buffer layer. 4. The laminate according to claim 3, wherein the buffer layer is formed on a (111) plane of the substrate.