JPH11163317A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce leakage current and realize long hot carrier life by making a film thickness of a part, wherein a crystalline silicon oxide film is in contact with a gate electrode thicker than that of a polycrystalline silicon oxide film covering a gate oxide film. SOLUTION: A gate oxide film 32 is formed over the entire silicon board 31. After the gate oxide film 32 has been formed, polycrystalline silicon is deposited by a CVD device. Then, a mask is prepared by photoresist. An entire polycrystalline silicon and the gate oxide film 32 and the silicon board 31 are etched by using the photoresist as a mask. A gate electrode 35 is thereby formed. Then, the photoresist is removed and the gate electrode 35 is exposed. Furthermore, a gate bird's beak 36 and a polycrystalline silicon oxide film 37 are formed by thermal oxidation. Thereby, a film thickness of the gate bird's beak 36 at an end part of the gate electrode 35 can be made about 60 nm, while a film thickness of the polycrystalline silicon oxide film 37 is about 400 nm.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a gate induced drain (GIDL).
The present invention relates to a semiconductor device having a low current and a long hot carrier life and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, gate oxide films have been made thinner in order to increase the speed of semiconductor devices. As the gate oxide film becomes thinner, as shown in FIG. 12, the gate electrode 15 and the drain high concentration (impurity concentration by ion implantation) region 2 are increased.
The electric field between the gate and the drain in the region 22 where 1 overlaps increases, and tunneling occurs, which causes a problem of an increase in GIDL current.

Therefore, as shown in FIGS.
As means for reducing the L current, on the silicon substrate 11,
After growing the gate oxide film 12, the polysilicon 13
Is deposited on the entire surface, and the polycrystalline silicon 13 is dry-etched using the photoresist 14 as a mask.
A method has been proposed in which a gate bird's beak 16 (FIG. 7) is formed by thermally oxidizing the gate bird's beak 16 (FIG. 7) after forming the gate electrode 15. Device “In IED Technical Digest, 1989, pp. 621-624 (K KURIMOT
O, et al, "DRAIN LEAKAGE CUIRRENT CHARACTICS DUE T
O THE BAND TO BAND TUNNELING IN LDD MOS DEVICE "in
IEDM TECHNICAL DIGEST 1989. pp621-624.)).

[0004] By forming the gate bird's beak 16, the gate oxide film 12 becomes thicker at the end of the gate electrode 15 than at the center, so that the gate in the region 22 where the gate electrode 15 and the high-concentration drain region 21 overlap is formed. -The electric field between the drains can be reduced, and the GIDL current can be reduced.

[0005]

In recent years, there has been a demand for the development of thinner gate oxide films for semiconductor devices. In order to further reduce the problematic GIDL current, the amount of thermal oxidation after forming the gate may be increased, but there are the following problems.

As a means for extending the life of hot carriers in a transistor, an LDD which reduces the electric field at the drain by forming low-concentration regions of impurities in the source and drain is used.
(Lightly Doped Drain) structure, LATID (Large Angel)
Tilt Implanted Drain) structure. LDD and LA
In order to form the TID structure, as shown in FIGS. 6 to 11, after the gate electrode 15 is formed, thermal oxidation is performed, impurities are implanted to form the impurity low concentration region 18, and the insulating film 19 is deposited. Thereafter, it is necessary to perform anisotropic dry etching to form the spacers 20 and to implant impurities to form the high impurity concentration regions 21. Then, in order to reduce the electric field of the drain, the low concentration region 18 shown in FIG.
Needs to be longer. For this purpose, it is necessary to make the polycrystalline silicon oxide film 17 of the gate electrode 15 thin when the low concentration region 18 is formed and implanted, that is, to reduce the amount of thermal oxidation after the gate electrode 15 is formed.

As described above, in the conventional method for manufacturing a semiconductor device, the results shown in Table 1 are obtained, and it is difficult to form a semiconductor device having a small GIDL current and a long hot carrier life.

[0008]

[Table 1]

An object of the present invention is to provide a semiconductor device having a small GIDL current and a long hot carrier life, and a method of manufacturing the same, in order to solve the above-mentioned conventional problems.

[0010]

In order to achieve the above object, a semiconductor device according to the present invention comprises a gate oxide film on a semiconductor substrate, a gate electrode made of polycrystalline silicon thereon,
A semiconductor device comprising at least a polycrystalline silicon oxide film covering the gate oxide film and a gate electrode, wherein a thickness of a portion where the polycrystalline silicon oxide film is in contact with the gate electrode covers the gate oxide film. It is characterized in that it is thicker than the thickness of the polycrystalline silicon oxide film.

In the semiconductor device, the thickness of the portion where the polycrystalline silicon oxide film contacts the gate electrode is 1.01 times or more the thickness of the polycrystalline silicon oxide film covering the gate oxide film. It is preferably 5.00 times or less.

In the above-mentioned semiconductor device, it is preferable that a cross-sectional shape of a portion of the polycrystalline silicon oxide film which is in contact with a semiconductor substrate, a gate oxide film and a gate electrode is substantially trapezoidal.

In the semiconductor device, it is preferable that a surface where the gate oxide film contacts the semiconductor substrate is located at a position higher than a surface where the polycrystalline silicon oxide film contacts the semiconductor substrate.

Next, a method of manufacturing a semiconductor device according to the present invention comprises the steps of: providing a gate oxide film on a semiconductor substrate, a gate electrode made of polysilicon on the semiconductor substrate, and a polysilicon oxide film covering the gate oxide film and the gate electrode. A method of manufacturing a semiconductor device having at least a film, comprising forming a gate oxide film on the semiconductor substrate, depositing polycrystalline silicon thereon, and etching the polycrystalline silicon and the gate electrode by using a photoresist as a mask. Is patterned to a predetermined shape and etched to the semiconductor substrate, and then thermally oxidized to cover the gate oxide film and the gate electrode with a polycrystalline silicon oxide film, and the polycrystalline silicon oxide film is The thickness of the portion in contact with the gate oxide film is made larger than the thickness of the polycrystalline silicon oxide film covering the gate oxide film.

[0015] In the above method, it is preferable that the thermal oxidation step is performed by oxygen or pyrogenic. Here, pyrogenic is a method in which hydrogen (H ₂ ) and oxygen (O ₂ ) are burned, and silicon (Si) is oxidized using an —OH group generated thereby as an oxidizing agent.

In the above method, the etching is preferably dry etching. Further, the etching (etching) depth on the semiconductor substrate is 50 to 500 nm.
Is preferably within the range.

According to the method of manufacturing a semiconductor device of the present invention, after a gate oxide film is grown on a semiconductor substrate, polycrystalline silicon for a gate electrode is deposited on the entire surface, and the polycrystalline silicon and the gate oxide are formed using a photoresist as a mask. A gate electrode is formed by patterning the entire film and a part of the semiconductor substrate by dry etching, and after removing the photoresist, thermal oxidation is performed to form a gate bird's beak. It is preferable to use oxygen or pyrogenic for the thermal oxidation.

According to the method of manufacturing a semiconductor device of the present invention,
When forming a gate electrode, not only polycrystalline silicon but also a semiconductor substrate is dry-etched and patterned. Thereafter, not only the gate electrode but also the semiconductor substrate is oxidized during thermal oxidation. Therefore, even if the thermal oxidation amount (polycrystalline silicon oxide film thickness) is the same as the conventional one, the gate oxide film at the end of the gate electrode The thickness can be greater than in conventional methods.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described in detail with reference to FIGS. FIG.
19 to 19 show a manufacturing process of a semiconductor device.

In FIG. 13, reference numeral 31 denotes a silicon substrate. Next, as shown in FIG. 14, a gate oxide film 32 is formed on the entire surface of the silicon substrate 31 by thermal oxidation to a thickness of, for example, 15 nm. Then, as shown in FIG. 15, after the gate oxide film 32 is formed, the polysilicon 3
3 is deposited to a thickness of, for example, 400 nm. Next, FIG.
As shown in FIG. 6, a mask is formed with the photoresist. Then, as shown in FIG.
Using polycrystalline silicon 33 and gate oxide film 3 as masks
2 and dry etching is performed to the silicon substrate 31 to a depth of, for example, 15 nm. Thus, a gate electrode 35 shown in FIG. 18 is formed.

Next, as shown in FIG. 18, the photoresist 34 is removed to expose the gate electrode 35. Further, as shown in FIG. 19, a gate bird's beak 36 and a polycrystalline silicon oxide film 37 are formed to a thickness of, for example, 15 nm by thermal oxidation. Thus, the gate bird's beak 36 has a substantially trapezoidal cross section, a portion corresponding to the bottom (long side) is about 60 nm, a portion corresponding to the top (short side) is about 15 nm, and the height (bottom (long side)). The distance of the upper side (short side) was about 15 nm. As a result, the thickness of the polycrystalline silicon oxide was about 400 nm, but the thickness of the gate bird's beak at the end of the gate electrode could be reduced to about 60 nm.

[0022]

As described above, according to the semiconductor device of the present invention, the thickness of the portion where the polycrystalline silicon oxide film contacts the gate electrode is larger than the thickness of the polycrystalline silicon oxide film covering the gate oxide film. When the thickness is too large, the oxide film thickness on the side wall of the gate electrode becomes relatively thin, so that a low concentration region becomes large, and a semiconductor device having a low GIDL current and a long hot carrier life can be manufactured.

According to the method of manufacturing a semiconductor device of the present invention, not only polycrystalline silicon but also
The semiconductor substrate is also subjected to dry etching, and then to thermal oxidation. At this time, since the silicon substrate is also patterned, both the polycrystalline silicon and the silicon substrate are oxidized at the end of the gate electrode, and the gate oxide film at the end of the gate electrode becomes thick in a short thermal oxidation time. Thus, the oxide film on the side wall of the gate electrode becomes relatively thin, so that the low concentration region becomes large, and a semiconductor device having a low GIDL current and a long hot carrier life can be manufactured.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a manufacturing process of a semiconductor device in a conventional example.

FIG. 2 is a cross-sectional view illustrating a manufacturing process of a semiconductor device in a conventional example.

FIG. 3 is a sectional view showing a manufacturing process of a semiconductor device in a conventional example.

FIG. 4 is a sectional view showing a manufacturing process of a semiconductor device in a conventional example.

FIG. 5 is a sectional view showing a manufacturing process of a semiconductor device in a conventional example.

FIG. 6 is a sectional view showing a manufacturing process of a semiconductor device in a conventional example.

FIG. 7 is a sectional view showing a manufacturing process of a semiconductor device in a conventional example.

FIG. 8 is a sectional view showing a manufacturing process of a semiconductor device in a conventional example.

FIG. 9 is a cross-sectional view illustrating a manufacturing process of a semiconductor device in a conventional example.

FIG. 10 is a sectional view showing a manufacturing process of a semiconductor device in a conventional example.

FIG. 11 is a sectional view showing a manufacturing process of a semiconductor device in a conventional example.

FIG. 12 is a sectional view showing a manufacturing process of a semiconductor device in a conventional example.

FIG. 13 is a cross-sectional view showing a manufacturing step of the semiconductor device according to the embodiment of the present invention.

FIG. 14 is a cross-sectional view illustrating a step of manufacturing the semiconductor device according to the embodiment of the present invention.

FIG. 15 is a cross-sectional view showing a manufacturing step of the semiconductor device according to the embodiment of the present invention;

FIG. 16 is a sectional view illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention;

FIG. 17 is a sectional view illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention;

FIG. 18 is a cross-sectional view showing a manufacturing step of the semiconductor device according to the embodiment of the present invention.

FIG. 19 is a cross-sectional view showing a manufacturing step of the semiconductor device according to the embodiment of the present invention;

[Explanation of symbols]

11, 31 Silicon substrate 12, 32 Gate oxide film 13, 33 Polycrystalline silicon 14, 34 Photoresist 15, 35 Gate electrode (polycrystalline silicon) 16, 36 Gate bird's beak 17, 37 Polycrystalline silicon oxide film 18 Low concentration region DESCRIPTION OF SYMBOLS 19 Insulating film 20 Spacer 21 High-concentration region of drain 22 Overlap region of gate electrode and high-concentration region of drain

Claims (7)

[Claims] 1. A semiconductor device comprising at least a gate oxide film on a semiconductor substrate, a gate electrode made of polycrystalline silicon thereon, and a polycrystalline silicon oxide film covering the gate oxide film and the gate electrode. A semiconductor device, wherein a thickness of a portion where the polycrystalline silicon oxide film contacts the gate electrode is larger than a thickness of a polycrystalline silicon oxide film covering the gate oxide film. 2. A film thickness of a portion where the polycrystalline silicon oxide film is in contact with the gate electrode is 1.01 times or more and 5.00 times or more as compared with a film thickness of a polycrystalline silicon oxide film covering the gate oxide film. 2. The semiconductor device according to claim 1, wherein the number is twice or less. 3. The semiconductor device according to claim 1, wherein a cross-sectional shape of said polycrystalline silicon oxide film portion in contact with said semiconductor substrate, a gate oxide film and a gate electrode is substantially trapezoidal. 4. The semiconductor device according to claim 1, wherein a surface where the gate oxide film contacts the semiconductor substrate is located higher than a surface where the polycrystalline silicon oxide film contacts the semiconductor substrate. 5. A method of manufacturing a semiconductor device comprising a gate oxide film on a semiconductor substrate, a gate electrode made of polycrystalline silicon thereon, and at least a polycrystalline silicon oxide film covering the gate oxide film and the gate electrode. Forming a gate oxide film on the semiconductor substrate, depositing polycrystalline silicon thereon, patterning the polycrystalline silicon and the gate electrode into a predetermined shape by etching using a photoresist as a mask, Etching until
Next, thermal oxidation is performed to cover the gate oxide film and the gate electrode with a polycrystalline silicon oxide film, and the thickness of the portion where the polycrystalline silicon oxide film is in contact with the gate electrode is reduced by a polycrystalline silicon oxide film covering the gate oxide film. A method for manufacturing a semiconductor device, wherein the thickness is larger than the thickness of a crystalline silicon oxide film. 6. The method for manufacturing a semiconductor device according to claim 5, wherein the thermal oxidation is performed by oxygen or pyrogenic. 7. The etching is dry etching,
The method for manufacturing a semiconductor device according to claim 5, wherein an etching depth in the semiconductor substrate is in a range of 50 to 500 nm.