JPH11163215A - Ceramic multilayered board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an IC package ceramic multilayered board which can be improved greatly in mounting reliability to a printed circuit board. SOLUTION: An IC package ceramic multilayered board 11 is mounted with a semiconductor device on its front side, and any pads formed on the backside of the board 11 are soldered to a printed circuit board to mount the board 1 on the printed circuit board. In this case, a castellation 13 is provided to each of the four corners of the ceramic multilayered board 11, so as to solder the board 11 to the printed circuit board. The castellations 13 are each formed nearly into a fan shape in a plan view.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a ceramic CSP.
The present invention relates to a ceramic multilayer substrate for an IC package of a type mounted on a printed circuit board by soldering, such as a (chip scale package) substrate.

[0002]

2. Description of the Related Art FIG. 7 shows an example of a conventional ceramic multilayer substrate for a BGA (ball grid array) package. In the example shown in FIG. 7, a metallized pad 3 as an input / output terminal is formed on a ceramic multilayer substrate 1. The metallized pad 3 is connected to the printed circuit board 2 on which the metallized pad 6 and the eutectic solder 5 are formed via a eutectic solder 4 as a bonding portion and a solder ball 7, thereby achieving conduction. The connection between the ceramic multilayer substrate 1 and the printed circuit board 2 is adjusted such that the solder balls 7 of the ceramic multilayer substrate 1 come on the eutectic solder 5 and the eutectic solder 5 is melted by reflow processing. By doing so.

As described above, the conventional mounting of the ceramic multilayer substrate on the printed circuit board is performed by connecting the electrode pads on the back surface of the ceramic multilayer substrate and the printed circuit board by soldering. The connection of the electrode pads of the ceramic multilayer substrate on which the semiconductor element is mounted to the printed circuit board is generally performed by using the BGA as described above.
(Ball grid array) method and LGA (land
(Grid array) method.

[0004]

When a ceramic multilayer board is mounted on a printed circuit board as described above, a temperature cycle test is performed to check the mounting reliability. However, in the case of mounting using a conventional ceramic multilayer substrate, the difference in thermal expansion coefficient between the ceramic multilayer substrate and the BT resin printed circuit board is large in this temperature cycle test. In some cases, the stress caused by the difference in thermal expansion is applied to the solder, and the solder is broken, thereby reducing the mounting reliability.

[0007] This will be described in more detail with reference to the example of FIG. 7. The ceramic multilayer substrate 1 and the printed circuit board 2 are
Although the metallized pads 3 and 6 are joined to the eutectic solders 4 and 5 and the solder balls 7 when the semiconductor device is exposed to a high or low temperature environment, the ceramic multilayer substrate 1 and the printed board 2 , A displacement difference occurs between the ceramic multilayer substrate 1 and the printed circuit board 2. Strain and stress due to the displacement are generated between the members constituting the semiconductor device. In particular, the eutectic solders 4 and 5 joining the ceramic multilayer substrate 1 and the printed circuit board 2 are subjected to shearing. Stress occurs.
As a result, the eutectic solders 4 and 5 may be plastically deformed and broken. At this time, as shown in FIG.
Crack breakage in eutectic solders 4 and 5 at solder joints 8
And 9 are likely to occur.

SUMMARY OF THE INVENTION The present invention has been made in view of such problems of the prior art, and is an IC package capable of greatly improving the reliability of mounting a ceramic multilayer substrate on a printed circuit board as compared with the prior art. It is intended to provide a ceramic multilayer substrate for use.

[0007]

According to observations made by the present inventor, when a ceramic multilayer substrate is mounted on a printed circuit board and a temperature cycle test is performed, the pad diameter, pad pitch, and solder on the back surface of the ceramic multilayer substrate are determined. Although there are some differences in the number of limit cycles depending on the height of the solder, the place where the solder breakage occurs first is often at the four corners of the ceramic multilayer substrate. This is presumed to be because the four corners are farthest from the center of the ceramic multilayer substrate, and the effect of expansion and contraction of the substrate is greatest. Further, according to observations made by the present inventor, when solder breakage occurs at these four corners, the solder inside the solder also sequentially breaks starting from there. From the above, it is considered that if the bonding at the four corners is made stronger than before, the mounting reliability of the ceramic multilayer substrate on the printed circuit board is greatly improved. From such a viewpoint, the present inventor has formed castellations (notches) at the four corners of the ceramic multilayer substrate and improved the castellation and the printed circuit board with solder in order to improve the mounting reliability. We created a joining method.

That is, in the ceramic multilayer substrate for an IC package according to the present invention, a semiconductor element is mounted on the front surface, and a large number of pads formed on the back surface are soldered to the printed circuit board to be mounted on the printed circuit board. In the ceramic multilayer substrate for an IC package, at least four corners thereof are formed with castellations joined to the printed circuit board by soldering.

In the ceramic multilayer substrate according to the present invention, it is preferable that the castellation has a substantially fan-shaped plane.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. FIG. 1 is a diagram showing a back surface of a ceramic multilayer substrate according to Embodiment 1 of the present invention. In FIG. 1, reference numeral 11 denotes a ceramic multilayer substrate, 12 denotes solder balls on electrode pads formed on the rear surface of the ceramic multilayer substrate 11, and 13 denotes castellations formed at four corners of the ceramic multilayer substrate 11, respectively. (Notch). As shown in FIGS. 2A and 2B, the castellation 13 has a substantially fan-shaped plane. As the castellation 13, a structure generally used in a chip carrier or the like can be applied as it is. Tungsten metallization and nickel plating are applied to the surface of the castellation 13 so that the solder wettability is improved (so that the solder naturally rises from the printed circuit board to be mounted on the surface of the castellation 13). It has been subjected.

FIG. 3 is a view showing a state in which the ceramic multilayer substrate of FIG. 1 is mounted on a printed circuit board. In this case, the metallized pad 26 of the printed circuit board 20 is used.
And the metallized pad 23 on the rear surface of the ceramic multilayer substrate 11 are connected by solder balls 12 (see FIG. 7 and the description thereof for more details).

In this embodiment, as shown in FIG. 3, the metallized pad 15 of the printed circuit board 20 and the castellation 13 are joined by solder 14. As shown in FIG. 4 in an enlarged manner, the solder 14 melted on the metallized pad 15 naturally rises on the surface of the castellation 13, and then the solder 14 is connected to the metallized pad 15. The castellation 13 is joined.

Further, in the present embodiment, as described above, the castellation 13 has a substantially fan-shaped plane, thereby increasing the surface area of the castellation 13 and having a structure in which the solder is easily adhered strongly. The joining of the castellations 13 to the printed circuit board 20 by soldering is more firm.

As described above, in this embodiment, the chip
A castellation structure generally used for a carrier or the like is provided at the four corners of the ceramic multilayer substrate 11 where stress is most likely to be applied due to a difference in thermal expansion. For this reason, in the present embodiment, due to the joining force of the castellation 13, solder breakage between the ceramic multilayer substrate 11 and the printed circuit board 20 is greatly reduced, and the mounting reliability is significantly improved.

According to an experiment conducted by the present inventor, in the case of mounting a conventional ceramic multilayer board on a printed circuit board, it is necessary to use −65 °.
400 to 50 in the temperature cycle test of C to 150 ° C
In contrast to the case where solder breakage occurred at the stage of 0 cycle, when the present embodiment was adopted, the number of temperature cycles until the solder breakage occurred in the same temperature cycle test was more than twice that of the conventional case. As a result, the service life can be extended more than twice as long as before.

Embodiment 2 Next, FIG. 5 is a diagram showing a second embodiment of the present invention. In the second embodiment, FIG.
And (b), as shown in FIG.
At the corners, castellations 33 (notches) each having a substantially triangular plane are formed.
As described above, by forming the castellations 33 having a substantially triangular plane at the four corners of the ceramic multilayer substrate 31, substantially the same functions and effects as those of the first embodiment can be obtained.

Embodiment 3 Next, FIG. 6 is a diagram showing a third embodiment of the present invention. In the third embodiment, FIG.
And (b), the 4th of the ceramic multilayer substrate 41
In each of the corners, a castellation 43 (notch) having a substantially quadrangular plane is formed.
As described above, by forming the castellations 43 each having a substantially quadrangular plane at the four corners of the ceramic multilayer substrate 41, the first and second embodiments are also performed.
Almost the same effects can be obtained.

[0018]

As described above, according to the present invention, the casters for soldering the printed circuit board to the four corners, which are the places most susceptible to the stress due to the difference in thermal expansion, in the ceramic multilayer board, respectively. Is formed so that the soldering between the ceramic multilayer substrate and the printed circuit board is greatly reduced due to the joining force of the castellation portion, and the mounting reliability of the ceramic multilayer substrate on the printed circuit board is reduced. Performance can be greatly improved.

Further, in the present invention, since the castellation has a substantially fan-shaped flat surface, the surface area of the castellation is increased, and the structure is such that the solder is easily adhered strongly. Bonding becomes stronger.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a back surface of a ceramic multilayer substrate according to a first embodiment of the present invention.

FIGS. 2A and 2B are views showing castellations formed on the ceramic multilayer substrate according to the first embodiment, wherein FIG. 2A is a plan view and FIG. 2B is a perspective view.

FIG. 3 is a diagram showing a state in which the ceramic multilayer substrate according to the first embodiment is mounted on a printed circuit board.

FIG. 4 is a diagram showing a joint portion between the castellation and the printed circuit board according to the first embodiment.

FIG. 5 is a view showing castellations formed on a ceramic multilayer substrate according to Embodiment 2 of the present invention;
(A) is a plan view, (b) is a perspective view.

FIG. 6 is a view showing castellations formed on a ceramic multilayer substrate according to Embodiment 3 of the present invention;
(A) is a plan view, (b) is a perspective view.

FIG. 7: Conventional BGA (Ball Grid Array)
It is a figure showing an example of a ceramic multilayer substrate for packages.

FIG. 8 is a view for explaining a problem of a conventional ceramic multilayer substrate.

[Explanation of symbols]

 11, 31, 41 Ceramic multilayer board 12 Solder ball 13, 33, 43 Castellation 14 Solder 15, 23, 26 Metallized pad 20 Printed circuit board

Claims (2)

[Claims] 1. A semiconductor device is mounted on a front surface, and a large number of pads formed on a rear surface are mounted on the printed circuit board by being soldered to the printed circuit board.
A ceramic multilayer substrate for an IC package, wherein at least four corners of the ceramic multilayer substrate have castellations joined to the printed circuit board by soldering. 2. The ceramic multilayer substrate according to claim 1, wherein the castellation has a substantially fan-shaped plane.