JPH11135905A - Printed wiring board and manufacture thereof - Google Patents
Printed wiring board and manufacture thereofInfo
- Publication number
- JPH11135905A JPH11135905A JP29374697A JP29374697A JPH11135905A JP H11135905 A JPH11135905 A JP H11135905A JP 29374697 A JP29374697 A JP 29374697A JP 29374697 A JP29374697 A JP 29374697A JP H11135905 A JPH11135905 A JP H11135905A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- filling member
- wiring board
- metal catalyst
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 229910052751 metal Inorganic materials 0.000 claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 39
- 229910052802 copper Inorganic materials 0.000 claims abstract description 37
- 239000003054 catalyst Substances 0.000 claims abstract description 30
- 239000004020 conductor Substances 0.000 claims abstract description 22
- 239000000463 material Substances 0.000 claims abstract description 17
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 8
- 238000007772 electroless plating Methods 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 8
- 239000000203 mixture Substances 0.000 claims description 5
- 239000002245 particle Substances 0.000 claims description 5
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 2
- 229910052697 platinum Inorganic materials 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 38
- 239000010949 copper Substances 0.000 abstract description 36
- 238000007747 plating Methods 0.000 abstract description 30
- 239000010410 layer Substances 0.000 description 40
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 18
- 229920005989 resin Polymers 0.000 description 8
- 239000011347 resin Substances 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 7
- 239000012790 adhesive layer Substances 0.000 description 3
- 238000005452 bending Methods 0.000 description 3
- 239000011889 copper foil Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- WGLPBDUCMAPZCE-UHFFFAOYSA-N Trioxochromium Chemical compound O=[Cr](=O)=O WGLPBDUCMAPZCE-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000005411 Van der Waals force Methods 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- -1 and the like Substances 0.000 description 1
- 230000003197 catalytic effect Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000011256 inorganic filler Substances 0.000 description 1
- 229910003475 inorganic filler Inorganic materials 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 239000010944 silver (metal) Substances 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 239000011135 tin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、貫通接続穴に樹脂
を埋設し、埋設した樹脂の表面に無電解めっきにより導
体を析出して回路を形成するプリント配線板およびその
製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board in which a resin is buried in a through-hole and a circuit is formed by depositing a conductor on the surface of the buried resin by electroless plating, and a method of manufacturing the same.
【0002】[0002]
【従来の技術】一般に、貫通接続穴を形成した後には、
貫通接続穴の壁面に析出した導体を保護するため、ある
いは貫通接続穴上に電子部品の実装や回路の形成を行う
ために、貫通接続穴内に穴埋め部材としてのインクを充
填させ、これを固化させることにより埋設して、いわゆ
る穴埋めを行っている。このうち、貫通接続穴上に回路
を形成する場合には、貫通接続穴内に穴埋めを行い、固
化した穴埋め部材の表面を貫通接続穴の表面と同一面に
なるように平坦に加工し、無電解銅めっき等により平坦
な面に形成した穴埋め部材の表面に銅を析出して回路を
形成していた。この場合、穴埋め部材自体には、無電解
銅めっきによって銅を析出させる触媒作用がないため、
穴埋め後にこの穴埋め部材の表面にPd触媒を塗布し、
このPd触媒をめっきの核として銅を析出させていた。2. Description of the Related Art Generally, after a through connection hole is formed,
In order to protect the conductor deposited on the wall surface of the through-hole or to mount an electronic component or form a circuit on the through-hole, the through-hole is filled with ink as a filling material and solidified. It is buried in this way, so-called hole filling is performed. When a circuit is formed on the through-hole, the through-hole is filled, and the surface of the solidified filling member is flattened so as to be flush with the surface of the through-hole. A circuit is formed by depositing copper on the surface of the filling member formed on a flat surface by copper plating or the like. In this case, since the filling material itself does not have a catalytic action to precipitate copper by electroless copper plating,
After filling, a Pd catalyst is applied to the surface of the filling material,
Copper was deposited using this Pd catalyst as a core of plating.
【0003】[0003]
【発明が解決しようとする課題】上述した従来のプリン
ト配線板においては、穴埋め部材の表面に塗布したPd
触媒と無電解銅めっきによって析出した銅との間には金
属結合が形成され高い密着力が得られる。しかしなが
ら、Pd触媒と穴埋め部材との間には、表面張力やファ
ンデルワールス力による分子間結合のみが発生するだけ
であるため、強力な結合力が得られない。したがって、
穴埋め部材と析出した銅との間の密着力は弱く剥離しや
すい。このため、析出した銅によって密閉された穴埋め
部材が、プリント配線板を製造あるいは使用する過程で
の加熱冷却工程で、熱膨張を起こし、これにともなって
穴埋め部材を覆っている析出した銅も円弧状の撓みが発
生する。この銅の撓みにより、銅と貫通接続穴のランド
部との接続部に撓みによる応力が集中して、銅と貫通接
続穴のランド部との間が剥離し、接触抵抗が増大し接触
不良が発生するといった問題があった。In the above-described conventional printed wiring board, Pd applied to the surface of the filling member is not used.
A metal bond is formed between the catalyst and copper deposited by electroless copper plating, and high adhesion is obtained. However, a strong bonding force cannot be obtained between the Pd catalyst and the filling member only because only intermolecular bonding occurs due to surface tension or Van der Waals force. Therefore,
The adhesive force between the filling member and the deposited copper is weak and easily peeled. For this reason, the filling material sealed by the deposited copper causes thermal expansion in the heating / cooling process in the process of manufacturing or using the printed wiring board, and accordingly, the deposited copper covering the filling material also becomes circular. Arc-shaped bending occurs. Due to the bending of the copper, stress due to the bending is concentrated on the connection portion between the copper and the land portion of the through connection hole, the copper and the land portion of the through connection hole are separated, the contact resistance increases, and the contact failure increases. There was a problem that occurred.
【0004】本発明は上記した従来の問題に鑑みなされ
たものであり、その目的とするところは、穴埋め部材の
表面に形成した回路と貫通接続穴との間の接触抵抗の低
減を図ったプリント配線板およびその製造方法を提供す
ることにある。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems, and has as its object to reduce the contact resistance between a circuit formed on the surface of a filling member and a through connection hole. It is to provide a wiring board and a manufacturing method thereof.
【0005】[0005]
【課題を解決するための手段】この目的を達成するため
に、本発明に係るプリント配線板は、基材に形成した貫
通接続穴と、この貫通接続穴内にこの貫通接続穴の表面
と同じ高さを有するように埋設された穴埋め部材と、こ
の穴埋め部材の表面に無電解めっきにより析出した回路
とを備えたプリント配線板において、前記穴埋め部材に
無電解めっき用金属触媒を添加したものである。したが
って、穴埋め部材の中に固定された無電解めっき用金属
触媒と無電解金属との間で金属結合がなされるので、穴
埋め部材と無電解めっきによって析出された導体との間
の密着力が高くなる。In order to achieve this object, a printed wiring board according to the present invention comprises a through connection hole formed in a base material, and a through hole having the same height as the surface of the through connection hole. In a printed wiring board provided with a filling member buried so as to have a thickness and a circuit deposited by electroless plating on the surface of the filling member, a metal catalyst for electroless plating is added to the filling member. . Therefore, since metal bonding is performed between the electroless plating metal catalyst and the electroless metal fixed in the filling member, the adhesion between the filling member and the conductor deposited by the electroless plating is high. Become.
【0006】[0006]
【発明の実施の形態】以下、本発明の実施の形態を図に
基づいて説明する。図1は本発明に係るプリント配線板
の製造方法を説明する図である。同図(a)において、
符号1で示すものは、両面に銅箔2,2が形成された基
材としての銅張り積層板であって、この銅張り積層板1
にドリルによって貫通穴3を穿設する。この後、シーダ
ー処理を行い、第1回目の無電解銅めっきを行い、貫通
接続穴4を形成する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram illustrating a method for manufacturing a printed wiring board according to the present invention. In FIG.
Reference numeral 1 denotes a copper-clad laminate as a substrate having copper foils 2 and 2 formed on both sides, and the copper-clad laminate 1
, A through hole 3 is formed by a drill. Thereafter, a seeder process is performed, and a first electroless copper plating is performed to form a through connection hole 4.
【0007】同図(b)に示すように、貫通接続穴4内
に液状の穴埋め部材5を注入し、固化したらその表面を
貫通接続穴4の表面と、同一の面になるようにバフによ
って研磨することによって平坦に加工し、ブラインドバ
イアを形成する。ここで、穴埋め部材5は、エポキシ樹
脂、無機充填材、硬化剤等からなり、銅めっき用金属触
媒としてのPdが添加されている。次に、穴埋め部材5
の表面および貫通接続穴4のランド部4aに第2回目の
無電解銅めっきを行い、穴埋め部材5の表面に導体6を
析出させる。このとき、穴埋め部材5に銅めっき用金属
触媒Pdが添加され、このPdが固化された穴埋め部材
5中に固定された状態となっているため、この固定され
たPdに無電解銅めっきによって析出された導体6が金
属結合される。このため、めっきの核となるPdが穴埋
め部材5内で、いわゆる錨の作用をするので、導体6は
穴埋め部材5に対して高い密着力をもって形成される。As shown in FIG. 1B, a liquid filling member 5 is injected into the through-hole 4 and solidified by buffing so that the surface is flush with the surface of the through-hole 4. It is processed flat by polishing to form blind vias. Here, the filling member 5 is made of an epoxy resin, an inorganic filler, a curing agent, and the like, and Pd is added as a metal catalyst for copper plating. Next, the filling member 5
The second electroless copper plating is performed on the surface of the hole and the land portion 4 a of the through-hole 4, and the conductor 6 is deposited on the surface of the filling member 5. At this time, since the metal catalyst Pd for copper plating is added to the filling member 5 and the Pd is fixed in the solidified filling member 5, the Pd is deposited on the fixed Pd by electroless copper plating. Conductor 6 is metal-bonded. For this reason, Pd, which is a nucleus of plating, acts as a so-called anchor in the filling member 5, so that the conductor 6 is formed with high adhesion to the filling member 5.
【0008】同図(c)に示すように、エッチングによ
って、2層および3層となる内層回路6a,6aを形成
し、これら内層回路6a,6a上に層間絶縁樹脂層7,
7を形成し、この層間絶縁樹脂層7,7上に接着剤層
8,8を形成する。同図(d)に示すように、レーザー
光によって内層回路6aの表面まで達する非貫通穴9を
接着剤層8および層間絶縁樹脂層7に穿設する。次に、
デスミア処理を行い非貫通穴9内のスミア残りを除去
し、シーダー処理を行った後、めっきレジスト10を接
着剤層8上に形成し、粗化を行い、第3回目の無電解銅
めっきを行い、非貫通接続穴11と1層および4層とな
る外層回路12,12を形成する。As shown in FIG. 1C, two-layer and three-layer inner circuits 6a, 6a are formed by etching, and an interlayer insulating resin layer 7, 6 is formed on these inner circuits 6a, 6a.
7 are formed, and the adhesive layers 8, 8 are formed on the interlayer insulating resin layers 7, 7. As shown in FIG. 3D, a non-through hole 9 reaching the surface of the inner circuit 6a by the laser beam is formed in the adhesive layer 8 and the interlayer insulating resin layer 7. next,
After performing a desmear process to remove the smear residue in the non-through hole 9 and perform a seeder process, a plating resist 10 is formed on the adhesive layer 8, roughened, and a third electroless copper plating is performed. By doing so, the non-through connection holes 11 and the outer layer circuits 12 and 12 which are one layer and four layers are formed.
【0009】このように形成されたプリント配線板にお
いては、上述したように、析出された導体6が穴埋め部
材5中に固定されたPdと金属結合されているため、導
体6は穴埋め部材5に高い結合力をもって密着してい
る。このため、熱膨張率が穴埋め部材5よりも小さくか
つ剛性の大きい導体6の裏面が、穴埋め部材5の表面に
高い結合力をもって密着状態を維持することにより、穴
埋め部材5の熱による膨張が阻止される。したがって、
従来穴埋め部材5の表面と導体6の裏面とが、穴埋め部
材5の膨張によって剥離し、導体6も断面円弧状に変形
するようなことはなく、導体6と貫通接続穴4のランド
部4aとの間が剥離するといったことが防止される。In the printed wiring board thus formed, as described above, the deposited conductor 6 is metal-bonded to the Pd fixed in the filling member 5, so that the conductor 6 is attached to the filling member 5. Close contact with high bonding strength. Therefore, the back surface of the conductor 6 having a smaller coefficient of thermal expansion and a higher rigidity than the filling member 5 maintains a close contact state with the surface of the filling member 5 with a high bonding force, thereby preventing the filling member 5 from expanding due to heat. Is done. Therefore,
Conventionally, the surface of the filling member 5 and the back surface of the conductor 6 are separated from each other by the expansion of the filling member 5, and the conductor 6 is not deformed into an arc-shaped cross section. Is prevented from peeling off.
【0010】表1は、本発明の穴埋め部材(5−1,5
−2)の組成と従来の穴埋め部材(5−3)の組成を示
したものである。本発明の穴埋め部材5は銅めっき用金
属触媒Pdをそのままの状態で添加した場合(5−1)
と、キャリアと呼ばれる粒状の酸化アルミナに一旦多数
の銅めっき用金属触媒Pdを付着させ、このキャリアを
介して銅めっき用金属触媒を穴埋め部材5に添加した場
合(5−2)を示す。すなわち、本実施例の酸化アルミ
ナは、外形の大きさが約0.3〜3μmもので、その表
面に銅めっき用金属触媒として粒径が10〜1000Å
のPdを多数付着した状態とし、穴埋め部材5に添加し
たものである。Table 1 shows the filling members (5-1, 5) of the present invention.
3 shows the composition of -2) and the composition of the conventional filling member (5-3). In the case of the plugging member 5 of the present invention, the metal catalyst Pd for copper plating is added as it is (5-1).
(5-2) shows a case where a large number of copper plating metal catalysts Pd are once adhered to granular alumina oxide called a carrier, and the copper plating metal catalyst is added to the filling member 5 via the carrier. That is, the alumina oxide of this example has an outer size of about 0.3 to 3 μm, and has a particle size of 10 to 1000 mm as a metal catalyst for copper plating on its surface.
In this state, a large number of Pd are adhered and added to the filling member 5.
【0011】このように、多数の銅めっき用金属触媒P
dをキャリアに付着させてから穴埋め部材5に添加する
ことにより、導体6との金属結合がより高くなることが
実験で確かめられている。これは、銅めっき用金属触媒
をそのままの状態で添加して均一化する(5−1)場合
と比較して、キャリアによって銅めっき用金属触媒Pd
の密集度が高くなるために、導体6との金属結合が高く
なるからと推測される。また、銅めっき用金属触媒の粒
径を10Å以上としたことにより、導体6との必要な金
属結合力が得られるだけの粒径の大きさとすることがで
きる。また、銅めっき用金属触媒の粒径を1000Å以
下としたことにより、導体6との必要な金属結合力が得
られるだけの数の銅めっき用金属触媒、すなわち銅めっ
き用金属触媒の必要な表面積が得られる。Thus, a large number of metal catalysts for copper plating P
It has been experimentally confirmed that adding d to the filling member 5 after attaching d to the carrier increases the metal bond with the conductor 6. This is because, compared to the case where the metal catalyst for copper plating is added as it is to make it uniform (5-1), the metal catalyst for copper plating Pd is formed by the carrier.
It is presumed that the metal bonding with the conductor 6 becomes high because the density of the metal becomes high. Further, by setting the particle size of the metal catalyst for copper plating to 10 ° or more, the particle size can be made large enough to obtain a necessary metal binding force with the conductor 6. Further, by setting the particle size of the metal catalyst for copper plating to 1000 ° or less, the number of metal catalysts for copper plating sufficient to obtain the required metal binding force with the conductor 6, that is, the required surface area of the metal catalyst for copper plating Is obtained.
【0012】[0012]
【表1】 なお、添加剤は、穴埋め部材5を貫通接続穴4内に埋設
する際に発生する泡を低減させるものである。[Table 1] The additive reduces bubbles generated when the filling member 5 is buried in the through connection hole 4.
【0013】表2は、表1で示した組成にしたがって製
造した多層プリント配線板の信頼性を、MIL−STD
−202E,107Dの熱衝撃試験1000サイクルを
実施して比較したものである。その基準は、品質規格M
IL−P−551である。1000サイクル後での接続
抵抗値が初期値に対して±10%を越えたサンプルはN
Gとした。この表から明らかなように、サンプル数10
0個に対して、従来品(5−3)が39個の不良が発生
したのに対して、穴埋め部材にPdを添加した本発明品
(5−1,5−2)では、不良が発生しなかった。従来
品の不良の原因は、いずれも内層回路6aと穴埋め部材
5との間の境界部分で発生した剥離によるものであり、
本発明では、穴埋め部材5にPdを添加したことによ
り、内層回路6aと穴埋め部材5との密着性が向上し、
剥離が防止されたものと思われる。Table 2 shows the reliability of the multilayer printed wiring board manufactured according to the composition shown in Table 1 by MIL-STD.
This is a comparison obtained by performing 1000 cycles of a thermal shock test of -202E and 107D. The standard is the quality standard M
IL-P-551. Samples in which the connection resistance after 1000 cycles exceeded ± 10% of the initial value are N
G. As is clear from this table, the number of samples was 10
Compared to 0, 39 defects occurred in the conventional product (5-3), whereas defects occurred in the products (5-1, 5-2) of the present invention in which Pd was added to the filling material. Did not. The cause of the defect of the conventional product is caused by peeling generated at the boundary between the inner layer circuit 6a and the hole filling member 5,
In the present invention, by adding Pd to the filling member 5, the adhesion between the inner layer circuit 6a and the filling member 5 is improved,
It is considered that peeling was prevented.
【0014】[0014]
【表2】 ※1:JIS C5012 付図1.1両面プリント板用複合テストパターン (表面)、付図1.2同(裏面)で試料Dを1層、4層に形成し、2層 、3層にはランド(ランド径φ0.7mm)を配置し、1層と2層および 3層と4層の接続には、ブラインドバイア(穴径φ0.3mm)、2層と 3層の接続にはベリードバイア(穴径φ0.3mm)を用いて、これら3 個の接続穴を同軸上に配置するようにして、1層〜4層間を接続した多層 プリント配線板を形成した。 ただし、基材の厚さを0.4mm、1層と2層間、3層と4層間の絶縁 厚さを80μm、1層の回路の厚さを30μm、2層の回路厚さを40μ m(基材の銅箔の厚さ18μm+1回目のめっきの厚さ12μm+2回目 のめっきの厚さ10μm)、3層の回路厚さを40μm(基材の銅箔の厚 さ18μm+1回目のめっきの厚さ12μm+2回目のめっきの厚さ10 μm)、4層の回路の厚さ30μmとして作成した。 ※2:100個のサンプルについて1000サイクル後の導通抵抗が初期値に対 して10%を越えたサンプル数。[Table 2] * 1: JIS C5012 Attached Figure 1.1 Composite test pattern for double-sided printed board (front), Attached Figure 1.2 (back), sample D was formed in one layer, four layers, and two layers and three layers in land ( Land diameter φ 0.7 mm), and blind vias (hole diameter φ 0.3 mm) for connecting one and two layers and three and four layers, buried vias (hole diameter φ 0) for connecting two and three layers. .3 mm) so that these three connection holes were coaxially arranged to form a multilayer printed wiring board connecting one to four layers. However, the thickness of the substrate is 0.4 mm, the insulation thickness between the first and second layers and the third and fourth layers is 80 μm, the thickness of the one-layer circuit is 30 μm, and the thickness of the two-layer circuit is 40 μm ( The thickness of the copper foil of the base material is 18 μm, the thickness of the second plating is 12 μm + the thickness of the second plating is 10 μm, and the thickness of the three layers is 40 μm (the thickness of the copper foil of the base material is 18 μm + the thickness of the first plating is 12 μm + 2). The thickness of the fourth plating was 10 μm), and the thickness of the four-layer circuit was 30 μm. * 2: The number of samples whose conduction resistance after 1000 cycles exceeded 10% of the initial value for 100 samples.
【0015】[0015]
【実施例】デスミア処理は、38℃の無水クロム酸95
0g/lによって18分間行った。粗化は、NaF:1
0g/l、CrO3:15/l、H2SO4:400ml/
lからなる36℃の混合液によって5分間行った。EXAMPLE Desmear treatment was carried out using chromic anhydride 95 at 38 ° C.
Performed with 0 g / l for 18 minutes. Roughening is performed using NaF: 1.
0g / l, CrO 3: 15 / l, H 2 SO 4: 400ml /
This was performed for 5 minutes with a 36 ° C. mixture of 1 l.
【0016】なお、本実施の形態では、穴埋め部材5の
表面に析出した導体6を銅としたが、これに限定され
ず、ニッケル、錫、金、白金等、電位差をかけたときに
析出しやすい金属、すなわちイオン化傾向の大きい金属
であればよい。また、穴埋め部材5に無電解めっき用金
属触媒を添加した例を説明したが、層間絶縁樹脂層7に
添加してもよく、その場合には層間絶縁樹脂層7に対す
る外層回路12の密着力が向上する。また、本実施の形
態では、内層回路6aの外側に外層回路12を形成して
4層の多層プリント配線板としたが、外層回路12を設
けずに基材1の両面に内層回路6a,6aを形成した、
いわゆる両面板としてもよい。また、無電解めっき用金
属触媒としてPtを用いた例を説明したが、これに限定
されずAu,Pd,Ag,Cuとしてもよく、また、こ
れらを単体として使用するだけでなく、適宜混合させた
ものを使用してもよい。In this embodiment, the conductor 6 deposited on the surface of the filling member 5 is made of copper. However, the conductor 6 is not limited to copper, and is deposited when a potential difference is applied, such as nickel, tin, gold, and platinum. Any metal can be used as long as it is a metal that is easily ionized, that is, a metal having a large ionization tendency. Further, the example in which the metal catalyst for electroless plating is added to the filling member 5 has been described. However, it may be added to the interlayer insulating resin layer 7, and in this case, the adhesion of the outer layer circuit 12 to the interlayer insulating resin layer 7 is reduced. improves. In the present embodiment, the outer layer circuit 12 is formed outside the inner layer circuit 6a to form a four-layer multilayer printed wiring board. However, the inner layer circuits 6a, 6a Formed
It may be a so-called double-sided board. Further, an example in which Pt is used as the metal catalyst for electroless plating has been described. However, the present invention is not limited to this, and Au, Pd, Ag, and Cu may be used. May be used.
【0017】[0017]
【発明の効果】以上説明したように本発明によれば、穴
埋め部材に無電解めっき用金属触媒を添加したことによ
り、穴埋め部材上に析出した回路と貫通接続穴との間の
密着性が向上するので、接触抵抗が低減され、このため
導通不良を防止できる。As described above, according to the present invention, the addition of the metal catalyst for electroless plating to the filling member improves the adhesion between the circuit deposited on the filling member and the through connection hole. As a result, the contact resistance is reduced, so that poor conduction can be prevented.
【0018】また、粒状の酸化アルミナに無電解めっき
用金属触媒を付着させ、この酸化アルミナを介して無電
解めっき用金属触媒を穴埋め部材に添加したことによ
り、穴埋め部材と穴埋め部材上に析出した導体との金属
結合がより高くなり、接触抵抗がより低減される。Further, the metal catalyst for electroless plating was adhered to the granular alumina oxide, and the metal catalyst for electroless plating was added to the filling material via the alumina oxide, so that the metal was deposited on the filling material and the filling material. The metal bonding with the conductor is higher, and the contact resistance is further reduced.
【図1】 本発明に係るプリント配線板の製造方法を説
明する図で、(a)は貫通接続穴を形成した状態を示
し、(b)は穴埋め部材を埋設した状態を示し、(c)
は層間絶縁層を形成した状態を示し、(d)は非貫通接
続穴を形成した状態を示す。1A and 1B are diagrams illustrating a method for manufacturing a printed wiring board according to the present invention, wherein FIG. 1A shows a state in which a through connection hole is formed, FIG. 1B shows a state in which a hole filling member is buried, and FIG.
Shows a state in which an interlayer insulating layer is formed, and (d) shows a state in which a non-through connection hole is formed.
1…基材、4…貫通接続穴、5…穴埋め部材、6…析出
導体、6a…内層回路(2層、3層)、7…層間絶縁樹
脂層、11…非貫通接続穴、12…外層回路(1層、4
層)。DESCRIPTION OF SYMBOLS 1 ... Base material, 4 ... Through connection hole, 5 ... Filling member, 6 ... Precipitated conductor, 6a ... Inner layer circuit (2 layers, 3 layers), 7 ... Interlayer insulating resin layer, 11 ... Non-through connection hole, 12 ... Outer layer Circuit (1 layer, 4 layers
layer).
───────────────────────────────────────────────────── フロントページの続き (72)発明者 岩崎 康弘 栃木県芳賀郡二宮町大字久下田413番地 日立エーアイシー株式会社内 (72)発明者 横山 博義 栃木県芳賀郡二宮町大字久下田413番地 日立エーアイシー株式会社内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yasuhiro Iwasaki 413 Kushida, Ninomiya-cho, Haga-gun, Tochigi Prefecture Inside Hitachi AIC Co., Ltd. Inside the corporation
Claims (4)
接続穴内にこの貫通接続穴の表面と同一面となるように
埋設された穴埋め部材と、この穴埋め部材の表面に無電
解めっきにより析出した導体とを備えたプリント配線板
において、前記穴埋め部材を、無電解めっき用金属触媒
を添加した材料としたことを特徴とするプリント配線
板。1. A through-hole formed in a base material, a hole-filling member embedded in the through-hole so as to be flush with the surface of the through-hole, and a surface of the hole-filling member formed by electroless plating. A printed wiring board provided with a deposited conductor, wherein the filling member is made of a material to which a metal catalyst for electroless plating is added.
て、無電解めっき用金属触媒を、粒径が10〜1000
ÅmのAu,Pt,Pd,Ag,Cuのいずれか一つま
たは二つ以上を混合したものであることを特徴とするプ
リント配線板。2. The printed wiring board according to claim 1, wherein the metal catalyst for electroless plating has a particle size of 10 to 1000.
A printed wiring board characterized in that one or a mixture of two or more of Au, Pt, Pd, Ag, and Cu is used.
続穴内に無電解めっき用金属触媒が添加された穴埋め部
材を埋設し、この穴埋め部材の表面を貫通接続穴の表面
と同一面となるように形成し、この穴埋め部材の表面に
無電解めっきにより導体を析出したことを特徴とするプ
リント配線板の製造方法。3. A through-hole is formed in a base material, and a filling member to which a metal catalyst for electroless plating is added is buried in the through-hole, and the surface of the filling member is flush with the surface of the through-hole. Wherein a conductor is deposited on the surface of the filling member by electroless plating.
法において、無電解めっき用金属触媒を粒状の酸化アル
ミナに付着させ、この酸化アルミナを介して添加したこ
とを特徴とするプリント配線板の製造方法。4. The method for manufacturing a printed wiring board according to claim 3, wherein the metal catalyst for electroless plating is adhered to granular alumina oxide and added via the alumina oxide. Production method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29374697A JPH11135905A (en) | 1997-10-27 | 1997-10-27 | Printed wiring board and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29374697A JPH11135905A (en) | 1997-10-27 | 1997-10-27 | Printed wiring board and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH11135905A true JPH11135905A (en) | 1999-05-21 |
Family
ID=17798710
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29374697A Pending JPH11135905A (en) | 1997-10-27 | 1997-10-27 | Printed wiring board and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH11135905A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020025557A (en) * | 2000-09-29 | 2002-04-04 | 전세호 | PCB manufacturing method |
CN1302693C (en) * | 2002-12-12 | 2007-02-28 | 三星电机株式会社 | Combined printed circuit board with superposed through holes and producing method thereof |
CN116056322A (en) * | 2023-01-16 | 2023-05-02 | 昆山沪利微电有限公司 | Stacked laser hole structure and manufacturing method thereof |
-
1997
- 1997-10-27 JP JP29374697A patent/JPH11135905A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020025557A (en) * | 2000-09-29 | 2002-04-04 | 전세호 | PCB manufacturing method |
CN1302693C (en) * | 2002-12-12 | 2007-02-28 | 三星电机株式会社 | Combined printed circuit board with superposed through holes and producing method thereof |
CN116056322A (en) * | 2023-01-16 | 2023-05-02 | 昆山沪利微电有限公司 | Stacked laser hole structure and manufacturing method thereof |
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