JPH1098006A - Semiconductor process simulation device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor process simulation device which adopts a diffusion model taking into consideration a dislocation loop which is generated in a crystal during ion implantation operation, with respect to diffusion during heat treatment operation after the ion implantation operation. SOLUTION: A diffusion model, taking into consideration the contribution of a dislocation loop introduced in a silicon substrate during ion implantation at a ion implantation operation simulating means 101, is generated by a model generating means 102. The diffusion model is used in a heat treatment operation simulating means 103 for diffusion of impurities during heat treatment operation after an ion implantation operation. In this case, the pressure field, by the dislocation loop to be defined in the silicon substrate area which is used in the diffusion model, is a function of distance from the position of the dislocation loop.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor process simulation apparatus for simulating a semiconductor manufacturing process, and more particularly, to heat treatment of dislocation rings generated in a crystal in an ion implantation step of a semiconductor manufacturing process after the ion implantation step. The present invention relates to a semiconductor simulation device incorporating a diffusion model that takes into account the diffusion of a process.

[0002]

2. Description of the Related Art In today's semiconductor device development,
2. Description of the Related Art Semiconductor process simulation apparatuses occupy an important position, and semiconductor process simulation apparatuses developed as products have become widespread and used by semiconductor device developers.

However, models incorporated in commercially available semiconductor process simulation apparatuses are still physically inadequate, and there are many cases where it is necessary to match simulation parameters for each process used in the manufacture of semiconductor devices. is there.

[0004] In particular, the heat treatment temperature in the heat treatment step in the manufacturing process is decreasing year by year, and such a low temperature heat treatment is not problematic in a silicon wafer which has not been a problem in a conventional manufacturing process using a high temperature heat treatment. Is said to affect the diffusion of impurities during the heat treatment.

[0005] It is said that the dislocation ring of the crystal handled in the present invention also affects impurity diffusion in a low-temperature heat treatment process, but is not incorporated in a commercially available semiconductor process simulation apparatus. Known methods such as academic papers and patent publications do not disclose a method of actually incorporating a model of a crystal dislocation ring into a two-dimensional semiconductor process simulation apparatus.

In the presentation of academic papers, Mark. E.
Law and his group have published a series of papers on a semiconductor process simulation system using an impurity diffusion model that takes into account the dislocation rings introduced into the crystal by ion implantation or the like.

[0007] Examples of recently published papers include "H.
Park, KS Jones and MELaw, J. Electrochem. So
c., Vol. 141, 759 (1994) ". However, in a series of papers, the contribution of the dislocation ring in the impurity diffusion model is described, but it is necessary when constructing the process simulation apparatus according to the present invention, the method of defining the position of the dislocation ring and It does not describe the input method, the extent to which dislocation rings after the ion implantation process are considered, and the like.

[0008]

From a series of known documents dealing with a model of a ring of dislocations of a crystal, the problems when actually incorporating it into a two-dimensional semiconductor process simulation apparatus are as follows. How to define the position of the ring,
(2) The process is to consider the contribution of the dislocation ring to impurity diffusion.

The first problem with the method of defining the position of the dislocation ring is further: (a) the dislocation ring is formed from the function giving the contribution from the single crystal dislocation ring; Assumptions used in calculating a function representing the average pressure field due to dislocation rings distributed in a given layer, and (b) the position where crystal dislocation rings are actually formed, The method can be subdivided into a method of inputting to a process simulation apparatus.

[0010] First, regarding the problem (a), a currently known document (for example, “H. Park. Jones and MEL”)
aw, J. Electrochem. Soc., Vol. 141, 759 (1994) ")
Calculates the average pressure field, which is the sum of the contributions from the dislocation rings in the layer, from the pressure generated by each dislocation ring.The assumptions used in this case are as follows: It is something.

The layer on which dislocation rings are formed is assumed to be flat (see FIG. 25). It is assumed that the dislocation rings distributed in the layer are perpendicular to the plane representing the layer and that the dislocation rings are perpendicular to each other (FIG. 26).
reference).・ When calculating the function that represents the sum, the nearest 6
Consider the dislocation rings (see FIG. 27).

By using such an assumption, the function representing the average pressure field from the dislocation ring can take the distance from the layer as an argument, but the function used when calculating the average pressure field is used. The layer from which the dislocation rings form must be planar. However, in the actual ion implantation for forming the source and the drain in the manufacture of the MOS device, since the gate region serves as a mask, a dislocation ring is formed, for example, as shown in a two-dimensional sectional view of FIG. The layer to be formed is not only a plane.

Therefore, in order to incorporate the model of the dislocation ring of the crystal into the two-dimensional semiconductor process simulation apparatus, not only the case where the layer on which the dislocation ring is formed is a plane, but also FIG.
As shown in the figure, it is necessary to be able to define the pressure average field by the dislocation ring even in the case where the layer where the dislocation ring is formed is not only a plane. There is no literature.

With respect to the problem (b), it is said that the layer in which the crystal dislocation ring is formed is formed at the boundary between the amorphous region and the crystal region formed in the silicon wafer in the ion implantation step. . However, regarding the method of designating the position of the layer of the dislocation ring of the crystal in the actual semiconductor process simulation apparatus, the shape of the layer on which the dislocation ring is actually formed can be expressed, and the user of the semiconductor process simulation apparatus is convenient. There is no known document that describes a method of specifying the position of the layer of the dislocation ring of a simple crystal.

The dislocation rings of the crystals introduced into the silicon during the ion implantation step grow or shrink by heat treatment after the ion implantation step, and eventually disappear. However, currently known documents (eg, H. Park. KS Jones and Electrochem. Soc, Vol. 141)
, 759 (1994) ”) describes the process of growth or shrinkage of dislocation rings at a relatively early stage of heat treatment after the ion implantation process.
The process of disappearance of dislocation rings by longer heat treatment is not shown.

Therefore, when a semiconductor simulation device incorporating a diffusion model taking into account the contribution from the dislocation ring is applied to the actual semiconductor device manufacturing process, if there are a plurality of heat treatments after the ion implantation process, It is preferable that the user of the semiconductor simulation apparatus can specify up to which process the diffusion model considering the contribution from the dislocation ring is used, but there is no known document describing such an idea.

There are few known documents describing how to obtain the physical quantity of the amount of dislocation.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems, and it has been proposed that a dislocation ring generated in a crystal in an ion implantation step of a semiconductor manufacturing process be prevented from diffusing in a heat treatment step after the ion implantation step. It is an object of the present invention to provide a semiconductor process simulation apparatus incorporating a diffusion model considered in consideration.

Another object of the present invention is to provide a semiconductor process simulation apparatus incorporating an impurity diffusion model in which a dislocation ring is taken into consideration, and to reduce the time and effort required to extract the physical quantity of the dislocation ring from a transmission electron micrograph. It is an object of the present invention to provide a reduced semiconductor process simulation apparatus.

[0020]

According to a first aspect of the present invention, there is provided a semiconductor process simulation apparatus for simulating a semiconductor manufacturing process. And a model generating means for generating a diffusion model in consideration of the contribution from the dislocation ring introduced into the silicon substrate during ion implantation, and using the diffusion model for diffusion of impurities in a heat treatment step after the ion implantation step. Heat treatment process simulation means, wherein the pressure field due to the dislocation ring to be defined in the silicon substrate region used in the diffusion model is a function of the distance from the position of the dislocation ring.

According to a second aspect of the present invention, in the semiconductor process simulation apparatus according to the first aspect, the position of the dislocation ring in the diffusion model is represented by a curve that can be represented by a line segment and an elliptic arc. It is defined.

According to a third aspect of the present invention, in the semiconductor process simulation apparatus according to the first aspect, the position of a dislocation ring in the diffusion model is based on a result of the ion implantation step simulation means. The position of the saddle point constituted by the maximum value of the concentration of the implanted impurity atoms is used, and is defined by an arbitrary distance from the saddle point.

According to a fourth aspect of the present invention, in the semiconductor process simulation apparatus according to the first aspect, the position of the dislocation ring in the diffusion model is based on a result of the ion implantation step simulation means. It is defined by a position where the concentration of the implanted impurity atoms becomes an arbitrary concentration.

According to a fifth aspect of the present invention, in the semiconductor process simulation apparatus according to the first aspect, the semiconductor process simulation apparatus can display an image of a result of the ion implantation step simulation means. And an input / output interface that allows a user of the semiconductor process simulation apparatus to input a position of a dislocation ring in the diffusion model while viewing the image display. 5. The semiconductor process simulation apparatus according to 2, 3, or 4.

According to a sixth aspect of the present invention, in the semiconductor process simulation apparatus according to the first aspect, the semiconductor process simulation apparatus includes an input / output interface between the semiconductor process simulation apparatus and a user. And the model generation means, the first model generation means defining the position of the dislocation ring in the diffusion model by a curve that can be represented by a line segment and an elliptic arc, the position of the dislocation ring in the diffusion model, Based on the result of the ion implantation process simulation means, using the position of the saddle point constituted by the maximum value of the concentration of implanted impurity atoms,
And a second model generating means defined by an arbitrary distance from the saddle point, and a position of a dislocation ring in the diffusion model is determined by an arbitrary concentration of the implanted impurity atom based on a result of the ion implantation step simulation means. The third model generation means defined by the position and the position of the dislocation ring in the diffusion model are determined by the user through the input / output interface while viewing the image display of the result by the ion implantation process simulation means. At least two or more of the fourth model generation means defined based on the input instruction; and the first model generation means, the second model generation means, the third model generation means or the fourth model generation means. Switching means for obtaining the diffusion model by switching to any of the four model generation means.

According to a seventh aspect of the present invention, there is provided a semiconductor process simulation apparatus according to the first, second, third, fourth, fifth or sixth aspect, wherein the heat treatment process simulation means is provided after the ion implantation. The diffusion model in which the contribution from the dislocation ring is considered is used only in the heat treatment step.

[0027] According to an eighth aspect of the present invention, in the semiconductor process simulation apparatus according to the first, second, third, fourth, fifth or sixth aspect, the heat treatment process simulating means may include a first step after ion implantation. In the heat treatment step of (1) and in the heat treatment steps after the first heat treatment step after ion implantation, a diffusion model in which contribution from dislocation rings is considered is used.

According to a ninth aspect of the present invention, there is provided a semiconductor process simulation apparatus according to the first, second, third, fourth, fifth or sixth aspect, wherein the heat treatment process simulating means is provided after the ion implantation. In the heat treatment step of the above, and in the heat treatment step after the first heat treatment step after ion implantation, it is possible to switch between a diffusion model considering the contribution from the dislocation ring and a diffusion model not considering the contribution from the dislocation ring. It is.

According to a tenth aspect of the present invention, there is provided a semiconductor process simulation apparatus for simulating a semiconductor manufacturing process, wherein a dislocation introduced into a silicon substrate during ion implantation is provided. Image data input means for inputting a transmission electron microscope photographic image used to extract the physical quantity of the ring, and the diffusion of impurities in the heat treatment step after the ion implantation step to the transition introduced into the substrate by the ion implantation step. It is provided with a process simulation means for performing impurity diffusion using a diffusion model taking into account the contribution from the ring.

A semiconductor process simulation apparatus according to an eleventh aspect of the present invention is the semiconductor process simulation apparatus according to the tenth aspect, wherein the transmission electron microscope photograph image captured by the image data input means is used for ion implantation. Is provided with a dislocation wheel physical quantity extracting means for extracting the physical quantity of the dislocation wheel introduced into the silicon substrate.

According to a twelfth aspect of the present invention, in the semiconductor process simulation apparatus according to the eleventh aspect, the means for extracting the physical quantity of the dislocation ring includes a transmission electron microscope photograph image captured by the image data input means. Is distinguished into a planar transmission electron microscope image and a cross-sectional transmission electron microscope image.

According to a thirteenth aspect of the present invention, there is provided the semiconductor process simulation apparatus according to the twelfth aspect, wherein the physical quantity extracting means for the dislocation ring includes a size of the dislocation ring based on the planar transmission electron microscope image. And density.

According to a fourteenth aspect of the present invention, there is provided the semiconductor process simulation apparatus according to the thirteenth aspect, wherein the dislocation ring physical quantity extracting means extracts the dislocation ring extracted from the planar transmission electron microscope image by the physical quantity extracting means. Size and density for each process condition,
It is provided with a database for classifying and storing.

According to a fifteenth aspect of the present invention, in the semiconductor process simulation apparatus according to the fourteenth aspect, the means for extracting the physical quantity of the dislocation ring includes a generation position of the dislocation ring from the cross-sectional transmission electron microscope image. It extracts data.

A semiconductor process simulation apparatus according to a sixteenth aspect is the semiconductor process simulation apparatus according to the fifteenth aspect, wherein the dislocation ring occurrence position data is the occurrence depth of the dislocation ring.

According to a seventeenth aspect of the present invention, there is provided a semiconductor process simulation apparatus according to the sixteenth aspect, wherein the dislocation ring occurrence position data includes a dislocation ring occurrence depth and a dislocation ring occurrence. The parameters are the parameters of the elliptic arc representing the lateral distance and the depth direction from the ion implantation mask at the position and the shape of the transition region in the lateral direction.

The semiconductor process simulation apparatus according to claim 18 is the semiconductor process simulation apparatus according to claim 15, 16 or 17, wherein the generation position data of dislocation rings extracted from one cross-sectional transmission electron microscope image is , One or more sets.

A semiconductor process simulation apparatus according to a nineteenth aspect is the semiconductor process simulation apparatus according to any one of the fifteenth to eighteenth aspects.
In the semiconductor process simulation apparatus described in (1), a database is provided for organizing and storing the dislocation ring occurrence position data for each process condition.

Further, the semiconductor process simulation apparatus according to the twentieth aspect provides the semiconductor process simulation apparatus according to the thirteenth aspect.
19. The semiconductor process simulation apparatus according to claim 18, wherein the size and density of the dislocation rings extracted from the planar transmission electron micrograph image by the dislocation ring physical quantity extracting means, and the cross-sectional transmission electron micrograph image The database includes a database that classifies and stores the dislocation generation position data of the dislocation rings extracted from the data for each process condition.

According to a twenty-first aspect of the present invention, in the semiconductor process simulation apparatus according to the twentieth aspect, it is possible to use diffusion calculation based on a diffusion model in consideration of contribution from a dislocation ring under arbitrary process conditions. And a process condition dependency calculation means for calculating a process condition dependency coefficient based on the size and density of the dislocation ring and the occurrence position data of the dislocation ring stored in the database. I have.

A semiconductor process simulation apparatus according to a twenty-second aspect is the semiconductor process simulation apparatus according to the first aspect.
In the semiconductor process simulation apparatus according to any one of the first to third aspects, the image data input unit optically reads a transmission electron microscope photographic image used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate during ion implantation. It is a scanner.

According to a twenty-third aspect of the present invention, there is provided a semiconductor process simulation apparatus according to any one of the tenth to twentieth aspects.
In the semiconductor process simulation apparatus according to any one of the first to third aspects, the image data input means stores transmission electron microscope photographic image data used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate during ion implantation. The transmission electron micrograph image data is read from the storage medium.

According to a twenty-fourth aspect of the present invention, there is provided a semiconductor process simulation apparatus according to the tenth aspect.
In the semiconductor process simulation apparatus according to any one of the first to third aspects, the image data input means has a function of inputting, from outside the apparatus, transmission electron microscope photographic image data used for extracting physical quantities of dislocation rings introduced into the silicon substrate by the ion implantation step. It has been prepared.

[0044]

BEST MODE FOR CARRYING OUT THE INVENTION

 (Embodiment 1)

Hereinafter, the outline of the semiconductor process simulation apparatus according to the first embodiment of the present invention and the examples thereof will be described with reference to [Example 1], [Example 2],
[Embodiment 3],..., And [Embodiment 9] will be described in detail with reference to the drawings.

[Outline of Semiconductor Process Simulation Apparatus According to First Embodiment of the Present Invention] In a semiconductor process simulation apparatus according to a first aspect of the present invention, as shown in FIG.
A diffusion model considering the contribution of the dislocation ring introduced into the silicon substrate at the time of the ion implantation in the step (a) is generated by the model generation means 102, and the heat treatment step simulation means 103 generates the diffusion model in the heat treatment step after the ion implantation step. The diffusion model generated by the model generation means 102 is used for the diffusion. here,
The pressure field due to the dislocation ring to be defined in the silicon substrate region used in the diffusion model is a function of the distance from the position of the dislocation ring.

As described above, since the pressure field caused by the dislocation ring is a function of the distance from the position of the dislocation ring, the conventional technology can handle only the layer where the dislocation ring is formed when the layer is flat. On the other hand, in the present invention, it is possible to calculate the pressure field due to the dislocation ring by giving the position coordinates of the layer where the dislocation ring is formed.

In the ion implantation step performed when forming the source / drain in actual semiconductor device manufacturing, FIG.
As shown in FIG. 19, the region of the gate 204 serves as a mask, so that the dislocation ring introduced into the crystal by the ion implantation step is not usually a simple plane as indicated by 203 in FIG. Even in such a case, the semiconductor process simulation apparatus of the present invention can use a diffusion model that takes into account the contribution from the dislocation ring.

Here, in the present invention, the pressure field caused by the dislocation ring is a function of the distance from the position of the dislocation ring.
Will be explained in more detail.

In the prior art, when calculating the average pressure field of a dislocation ring, it is assumed that all the dislocation rings are in the same plane, and the dislocation rings distributed in the plane are: Assuming that the plane is perpendicular to the plane and perpendicular to the dislocation rings, for example, as shown in the explanatory view of FIG. 27, the contribution of pressure from the six closest dislocation rings 1604a to 1604f is considered. . Therefore, although the average pressure field is a function of the distance from the layer where the dislocation ring is formed, the layer where the dislocation ring is formed is denoted by 1503 in FIG.
Had to be flat as shown.

However, considering the relationship between crystal planes when dislocation rings are actually introduced into the crystal by the ion implantation process, the assumption used in obtaining the above-mentioned average pressure field is that It has been found that this is not a well-considered assumption about the relationship between, but an assumption introduced for the convenience of averaging to approximate the average of the pressures from the dislocation rings. From this, in the present invention, it is determined that the layer on which the dislocation ring is formed does not have to be a plane, although the function representing the average pressure field of the dislocation ring is the same as that of the prior art.

The relationship between the assumptions used for obtaining the average pressure field and the crystal planes will be described in more detail. For simplicity of explanation, as shown in FIG. 25, a surface 15
Consider a case where ion implantation is performed from 02.

In manufacturing a normal MOS type semiconductor device, a silicon wafer having a (100) orientation is used. Therefore, if a layer on which a dislocation ring is formed is parallel to the surface, the dislocation ring is formed. Is formed on the (100) plane. However, it is said that dislocation rings are formed on the (110) plane or the (111) plane due to the crystalline nature of silicon. This is inconsistent with the assumption that the dislocation rings distributed in the layer are perpendicular to the plane representing the layer, which was used in determining the mean field.

The (110) plane and the (111) plane are
When the (100) plane is the surface of the silicon wafer, since the plane is oblique as viewed from the surface, the average field of the contribution from the dislocation rings existing on the (110) plane and the (111) plane can be accurately determined. Seeking is very complicated and difficult.

From these facts, it can be seen that the assumption used in obtaining the average pressure field is an assumption introduced for convenience of the averaging operation in order to obtain an approximate value of the pressure from the dislocation ring. .

For the above reasons, in the present invention, the average pressure field of the dislocation ring is, as an approximation, using the same function as in the prior art, and the layer on which the dislocation ring is formed need not be planar. And Thus, if the position coordinates of the layer where the dislocation ring is formed are given, it is possible to calculate the average pressure field due to the dislocation ring.

Further, in the semiconductor process simulation apparatus according to the second aspect, the position of the dislocation ring in the diffusion model is defined by a curve that can be represented by a line segment and an elliptic arc. That is, a curve that can be represented by a line segment and an elliptical arc is used to give the position coordinates of the layer where the dislocation ring is formed. This allows
The position coordinates of the layer where the dislocation ring is formed can be determined, and the semiconductor process simulation apparatus according to claim 1 can be realized.

Further, in the semiconductor process simulation apparatus according to the third aspect, the position of the dislocation ring in the diffusion model is constituted by the maximum value of the concentration of the implanted impurity atoms based on the result of the ion implantation process simulation means 101. The position of the saddle point is used and defined by an arbitrary distance from the saddle point. In other words, to give the position coordinates of the layer where the dislocation ring is formed, the position at an arbitrary distance from the saddle point constituted by the maximum value of the concentration of the implanted impurity atoms based on the result of the ion implantation process simulation means 101 is given. You are using here,
The arbitrary distance can be specified by the user of the semiconductor simulation device using the input / output interface 104 or the like. Thus, the position coordinates of the layer where the dislocation ring is formed can be determined, and the semiconductor process simulation apparatus according to claim 1 can be realized.

Further, in the semiconductor process simulation apparatus according to the fourth aspect, the position of the dislocation ring in the diffusion model is determined by the position at which the concentration of the implanted impurity atoms becomes an arbitrary concentration based on the result of the ion implantation process simulation means 101. It is to be defined. In other words, the position of an arbitrary concentration in the concentration distribution of the implanted impurity atoms based on the result of the ion implantation process simulation means 101 is used to give the position coordinates of the layer where the dislocation ring is formed. Here, the arbitrary concentration can be set by the user of the semiconductor simulation apparatus by the input / output interface 104.
And so on. Thereby, it is possible to determine the position coordinates of the layer where the dislocation ring is formed,
A semiconductor process simulation apparatus according to claim 1 can be realized.

Further, in the semiconductor process simulation apparatus according to the fifth aspect, the result of the ion implantation process simulation means 101 is given via the input / output interface 104 to give the position coordinates of the layer where the dislocation ring is formed. An image is displayed, and a user of the semiconductor process simulation apparatus can input a position determined and determined while viewing the image display, and the input position is used. Thus, the position coordinates of the layer where the dislocation ring is formed can be determined, and the semiconductor process simulation apparatus according to claim 1 can be realized.

Further, in the semiconductor process simulation apparatus according to claim 6, as shown in FIG. 11, the first model generating means for defining the position of the dislocation ring in the diffusion model by a curve that can be represented by a line segment and an elliptic arc. 11
02a and the position of the saddle point formed by the maximum value of the concentration of the implanted impurity atoms based on the result of the ion implantation process simulation means 101, and the position of the dislocation ring in the diffusion model is determined arbitrarily from the saddle point. And the position of the dislocation ring in the diffusion model defined by the position at which the concentration of the implanted impurity atoms becomes an arbitrary concentration based on the result of the ion implantation process simulation means 101. The position of the dislocation ring in the three-model generating means 1102c and the diffusion model is defined based on the input instruction given by the user while viewing the result image display by the ion implantation process simulation means 101 via the input / output interface 104. At least two or more models among the fourth model generation means 1102d Comprising a forming means, switching means 110
In step 3, any one of the first model generation unit 1102a, the second model generation unit 1102b, the third model generation unit 1102c, and the fourth model generation unit 1102d is used to obtain a diffusion model. As a result, the user of the semiconductor process simulation apparatus can select the most appropriate input method of the position of the dislocation wheel in the semiconductor process to be simulated.

Further, in the semiconductor process simulation apparatus according to claim 7, as shown in FIG. 12, the heat treatment process simulation means 1203 performs the contribution from the dislocation ring only in the first heat treatment process after ion implantation (step S1211). Is used, and a normal diffusion model is used for the second (step S1212) and subsequent heat treatments. This allows, for example,
If the second and subsequent heat treatments make little contribution from the dislocation ring or are outside the scope of the dislocation ring model, the second and subsequent heat treatments can use a normal diffusion model. In addition, it is possible to simulate a semiconductor process that can be flexibly adapted to a semiconductor process.

In the semiconductor process simulation apparatus according to the eighth aspect, as shown in FIG. 13, the heat treatment step simulation means 1303 includes a first heat treatment step after ion implantation (step S1311) and a first heat treatment step after ion implantation. In the heat treatment step (step S1312) after the heat treatment step, a diffusion model taking into account the contribution from the dislocation ring is used. Thereby, for the second and subsequent heat treatments after the ion implantation step, even if the contribution from the dislocation ring to diffusion is effective, it is possible to use a diffusion model that takes into account the contribution from the dislocation ring. It is possible to simulate a semiconductor process that can be flexibly adapted to a semiconductor process.

Further, in the semiconductor process simulation apparatus according to the ninth aspect, as shown in FIG. 14, for example, the heat treatment process simulation means 1403 performs the contribution from the dislocation ring in the heat treatment process after the first heat treatment process after the ion implantation. It is possible to switch between a diffusion model that takes into account the diffusion model or a diffusion model that does not take into account the contribution from the dislocation ring. It is also possible to switch and select a diffusion model for the first heat treatment step after ion implantation. This allows the user of the semiconductor process simulation apparatus to select and instruct whether or not to consider the contribution from the dislocation ring in accordance with the manufacturing process of the semiconductor device to be simulated. A semiconductor process simulation that can be flexibly adapted can be performed.

Embodiment 1 FIG. 1 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 1 of the present invention. In the figure, a semiconductor process simulation apparatus according to the present embodiment includes an ion implantation process simulation means 101 and a model generation for generating a diffusion model in consideration of contribution from a dislocation ring introduced into a silicon substrate at the time of ion implantation. Means 102, and a heat treatment process simulation means 103 using a diffusion model for diffusion of impurities in a heat treatment step after the ion implantation step,
The pressure field due to the dislocation ring to be defined in the silicon substrate region used in the diffusion model is a function of the distance from the position of the dislocation ring.

First, the calculation of the average pressure field by the dislocation ring will be described. The pressure generated by a single dislocation ring is described in L. Borucki, in “Workshop on Numerical Modeling”.
ofProcesses and Devices for Integrated Circuits
: NUPAD IV ", Seattle, WA, May 31, (1992)".

[0067]

(Equation 1)

[0068] Here, it is ρ = r / R ζ = z / R α = (4ρ / ((ρ + 1) 2 + ζ 2)) 1/2 γ = 3 (1-ν) / (1 + ν). E (α) and K (α) are the first and second types of perfect elliptic integrals, μ is the rigidity, and ν is the Poisson's ratio.

In this manner, as shown in FIGS. 25, 26 and 27, an average pressure field is calculated for the pressure generated by a single dislocation ring using the following assumptions. -It is assumed that the layer on which the dislocation rings are formed is flat (see Fig. 25). It is assumed that the dislocation rings distributed in the layer are perpendicular to the plane representing the layer and that the dislocation rings are perpendicular to each other (FIG. 26).
reference).・ When calculating the function that represents the sum, the nearest 6
Consider the dislocation rings (see FIG. 27).

The actual equation for calculating the average pressure field is as follows.

[0071]

(Equation 2)

By the above averaging operation, the average pressure field <p>
Is a function of the radius R of the dislocation ring and the distance z from the plane on which the dislocation ring is formed, and the distribution in the plane is averaged. <P> = f (R, z) (3)

In the prior art, this function is applied only when the plane on which the dislocation ring is formed is a plane. Therefore, only when the mask such as the gate region does not exist in the ion implantation as shown in FIG. Although it could not be calculated, in the present invention, for the above-mentioned reason, since the surface on which the dislocation ring is formed can be applied to a curved surface other than a flat surface as indicated by 203 in FIG. 2, the average pressure field <p> Is
The calculation can be performed by specifying the radius R of the dislocation ring and the distance z from the surface on which the dislocation ring is formed.

Embodiment 2 In the semiconductor process simulation apparatus according to Embodiment 2 of the present invention, the position of the dislocation ring in the diffusion model is defined by a curve that can be represented by a line segment and an elliptic arc.

A method of specifying the position of the layer where the dislocation ring is formed by using a curve that can be represented by a line segment and an elliptic arc will be described with reference to FIG. That is, the position of the layer 203 where the dislocation ring is formed by the line segment and the elliptical arc is designated as shown in FIG.

Using the symbols in FIG. 3, the area designated by the elliptical arc in FIG. 3 can be expressed by the following equation. (X−x ₀ ) ² / a ² + (y−y ₀ ) ² / b ² = 1 (4) where (x _0, y ₀ ) is the central coordinate of the ellipse, and a and b are the major axis and the minor axis of the ellipse, respectively. Is the diameter. The area specified by the line segment can be expressed by specifying the start point (x1, y1) and end point (x2, y2) of the line segment.

As described above, an ellipse is expressed by specifying the center coordinates of the ellipse and the major axis and minor axis of the ellipse, and a line segment is expressed by specifying the start point and end point of the line segment. can do. In the case where there are a plurality of elliptical arcs and line segments, similarly, designation may be made for each of the elliptical arcs and line segments.

[Embodiment 3] In the semiconductor process simulation apparatus according to Embodiment 3 of the present invention, the position of the dislocation ring in the diffusion model is determined based on the result of the ion implantation process simulation means 101 based on the concentration of the implanted impurity atom. Using the position of the saddle point constituted by the local maximum, and
It is defined by an arbitrary distance from the saddle point.

That is, as shown in FIG. 4, the dislocation ring is used by using a position at an arbitrary distance from the saddle point 404 constituted by the maximum value of the concentration of the implanted impurity atoms based on the simulation result of the ion implantation process. Is specified at the position of the layer 403 on which is formed. Here, the saddle point is a point sequence connecting the maximum values of the concentration distribution of impurity atoms as shown in FIG.

[Fourth Embodiment] In a semiconductor process simulation apparatus according to a fourth embodiment of the present invention, the position of the dislocation ring in the diffusion model is determined based on the result of the ion implantation process simulation means 101 based on an arbitrary value of the implanted impurity atom. Is defined by the position at which the density becomes.
Here, the arbitrary concentration is specified by the user of the semiconductor simulation apparatus through the input / output interface 104 or the like.

That is, the user specifies an arbitrary impurity concentration in the impurity concentration distribution indicating the result of the ion implantation process simulation means 101 as shown in FIG. The point at which the designated density is obtained is a curve such as 703 shown in FIG. The position specified by the curve 703 is defined as the position of the layer where the dislocation ring is formed.

[Fifth Embodiment] A semiconductor process simulation apparatus according to a fifth embodiment of the present invention receives the result of the ion implantation process simulation means 101 to give the position coordinates of the layer where the dislocation ring is formed. An image is displayed through the output interface 104 so that a user of the semiconductor process simulation apparatus can input a position determined and determined while viewing the image display, and uses the input position.

As shown in FIG. 8, the image display function of the input / output interface 104 includes a function of displaying the impurity distribution based on the result of the ion implantation process simulation means 101 in a two-dimensional contour line and an arbitrary function designated by the user. It has a function of displaying a density profile as shown in FIG. 9 for the cross section.

The user looks at the results of the ion implantation process simulation means 101 and determines a specific example to be implemented. That is, the input of the position of the layer of the dislocation ring to the semiconductor process simulation apparatus is performed as shown in FIG.
First, as shown in FIG.
The coordinates of the point sequence are input by numerically inputting the coordinates of 1 to #N or by specifying the position using a pointing device such as a mouse. The semiconductor process simulation apparatus interprets each point as a line segment based on the coordinates of the input point sequence and defines the position of the layer 1003 of the dislocation ring.

[Embodiment 6] FIG. 11 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 6 of the present invention. In the figure, a semiconductor process simulation apparatus according to the present embodiment includes an ion implantation process simulation means 101 and a model generation for generating a diffusion model in consideration of contribution from a dislocation ring introduced into a silicon substrate at the time of ion implantation. And a heat treatment process simulation means 103 using a diffusion model for diffusion of impurities in a heat treatment process after the ion implantation process.

Here, the model generating means defines the position of the dislocation ring in the diffusion model by a curve which can be represented by a line segment and an elliptic arc.
2a and the position of the dislocation ring in the diffusion model are calculated based on the result of the ion implantation process simulation means 101.
The second model generating means 1102b, which uses the position of the saddle point formed by the maximum value of the concentration of the implanted impurity atoms and is defined by an arbitrary distance from the saddle point, and the position of the dislocation ring in the diffusion model Based on the result of the implantation process simulation means 101, the third model generation means 1102c defined by the position at which the concentration of the implanted impurity atoms becomes an arbitrary concentration, and the position of the dislocation ring in the diffusion model via the input / output interface 104, A fourth model generation unit 1102 d that is defined based on an input instruction given by the user while looking at an image display of the result of the ion implantation process simulation unit 101 and a switching unit 1103 are provided.

The switching means 1103 includes a first model generating means 1102a, a second model generating means 1102b, and a third model generating means 1102 based on, for example, a user's selection instruction.
c or the fourth model generation means 1102d to obtain a diffusion model. Accordingly, the user of the semiconductor process simulation apparatus can determine the layer of the dislocation ring that is most suitable for the information owned by the user of the simulation apparatus, such as the result of the past manufacturing process or the measurement result regarding the crystal dislocation ring. Can be selected.

[Embodiment 7] FIG. 12 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 7 of the present invention.

The heat treatment process simulation means 1203 of this embodiment uses the diffusion model taking into account the contribution from the dislocation ring only in the first heat treatment process after ion implantation (step S1211), and performs the second (step S1212)
For the subsequent heat treatment, a normal diffusion model is used. The input of the position of the dislocation ring is performed, for example, in the same manner as in the sixth embodiment.

In the present embodiment, when the second and subsequent heat treatments make little contribution from the dislocation ring or are out of the applicable range of the dislocation ring model, a normal diffusion model is used for the second and subsequent heat treatments. It is possible to use
For example, this is effective when the first heat treatment after the ion implantation step is performed for a long time, and the dislocation ring model cannot be applied in the next heat treatment step.

[Eighth Embodiment] FIG. 13 is a block diagram of a semiconductor process simulation apparatus according to an eighth embodiment of the present invention.

In the heat treatment process simulation means 1303 of this embodiment, in the first heat treatment process after ion implantation (step S1311) and the heat treatment process after the first heat treatment process after ion implantation (step S1312), We use a diffusion model that considers the contribution from The input of the position of the dislocation ring is performed, for example, in the same manner as in the sixth embodiment.

In this embodiment, the temperature of the heat treatment after the ion implantation step is the temperature at which the model of the dislocation ring is applicable to both the first heat treatment and the second heat treatment.
This is effective when the processing time of the heat treatment is a relatively short time to which the model of the dislocation ring can be applied.

[Embodiment 9] FIG. 14 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 9 of the present invention.

The heat treatment process simulation means 1403 of this embodiment uses a diffusion model taking into account the contribution from the dislocation ring to the first heat treatment process after the ion implantation, and performs the heat treatment after the first heat treatment process after the ion implantation. In the process, it is possible to switch between a diffusion model considering the contribution from the dislocation ring and a diffusion model not considering the contribution from the dislocation ring. The input of the position of the dislocation ring is performed, for example, in the same manner as in the sixth embodiment.

In other words, in the second and subsequent heat treatment steps, the user of the semiconductor process simulation apparatus determines whether the diffusion model considering the contribution from the dislocation ring or the dislocation model in accordance with the process conditions of the manufacturing process to be simulated. It is possible to select whether to use a normal diffusion model that does not consider the contribution from the ring, and it is possible to select an optimal model for various manufacturing processes.

(Embodiment 2) Hereinafter, an outline of a semiconductor process simulation apparatus according to Embodiment 2 of the present invention and an example thereof will be described.
0], [Example 11], [Example 12], [Example 1]
3] will be described in detail with reference to the drawings.

[Outline of Semiconductor Process Simulation Apparatus According to Embodiment 2 of the Present Invention] FIG. 15 shows a schematic configuration of a semiconductor process simulation apparatus according to Embodiment 2 of the present invention. As shown in the figure, the semiconductor process simulation apparatus according to the second embodiment of the present invention uses a transmission electron micrograph image used to extract the physical quantity of a dislocation ring introduced into a silicon substrate during ion implantation. An image data input unit 2001 (image data input means) is provided. As described above, in the present embodiment, the image data input unit 2001 for capturing a transmission electron microscope photographic image used for extracting the physical quantity of the dislocation ring introduced into the silicon substrate during ion implantation is provided. In addition, image data of a transmission electron micrograph required for extracting a physical quantity of a dislocation ring can be handled inside a semiconductor process simulation apparatus.

Here, the diffusion model taking into account the dislocation ring and the viewpoint of this embodiment will be described in detail.

When the dose of implanted ions is large in the ion implantation step of the semiconductor manufacturing process, the crystallinity of the implanted crystal is disturbed, and the crystallinity is recovered in the heat treatment step following the ion implantation step. In the course of this crystal recovery, as shown in the explanatory view of FIG.
In the region where the ion implantation 207 has been performed, the dislocation ring 20 is formed.
3 occurs. Since the dislocation ring acts as a suction port and a discharge port for the point defect that controls the impurity diffusion phenomenon, the behavior of the dislocation ring affects the impurity diffusion. The effect described above is incorporated into the diffusion model by the diffusion model taking into account the dislocation ring described above. In the diffusion model in which the contribution from the dislocation ring is considered, a physical quantity related to the dislocation ring is used.

Mark E. described in the prior art section. The physical quantities relating to the dislocation rings used in the diffusion model taking into account the dislocation rings such as Law are roughly classified into the density and size of the dislocation rings and the positions where the dislocation rings occur. Physical quantities relating to dislocation rings can usually be obtained from transmission electron micrographs. More specifically, the density and size of the dislocation ring can be obtained from a cross-sectional transmission electron microscope image as shown in FIG. 16, and the dislocation ring generation position is shown in FIG.
Can be obtained from a plane transmission electron micrograph as shown in FIG.

The diffusion model taking into account the contribution from the dislocation ring improves the accuracy of the result by describing the physical phenomena inside the sample during the diffusion process more accurately than the conventional phenomenological diffusion model. Since the target diffusion model is used, it is usually desirable to use data obtained from the actually measured values as described above as the physical quantities of the dislocation rings. However, there is a case where the measured physical quantity relating to the dislocation wheel under the process conditions to be simulated is not obtained because the number of accumulated data is small. In such a case, it is also possible to execute the simulation by setting an appropriate value as a mere parameter in the simulation for the physical quantity that has not been obtained. Of course, in this case, the operation of adjusting the parameters is required.

As described above, in the diffusion model in which the contribution from the dislocation ring is considered, the position where the dislocation ring is generated and the size and density of the dislocation ring are required. It may be considered as a mere parameter in the simulation. The description of claims 10 to 24 described below is not based on the assumption that all the physical quantities such as the generation position of the dislocation ring and the size and density of the dislocation ring were obtained from the actual measurement in all the process conditions. This is a description from the standpoint that the possessed transmission electron micrograph image data is used for extracting a physical quantity, and the data not owned is used as a parameter.

In the semiconductor process simulation apparatus according to the tenth aspect, as shown in FIG. 15, a transmission electron micrograph image used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation is converted into an image. The data input unit 2001 (image data input unit) captures the data, and the process simulation device calculation unit 2002 (process simulation calculation unit) transfers the impurity introduced into the substrate by the ion implantation process to the diffusion of impurities in the heat treatment process after the ion implantation process. A diffusion model considering the contribution from the circle is used. Accordingly, by providing the image data input unit 2001 for capturing a transmission electron microscope photographic image used for extracting the physical quantity of the dislocation ring introduced into the silicon substrate during ion implantation, the physical quantity of the dislocation ring is provided. Image data of a transmission electron micrograph required to extract the image can be handled inside the semiconductor process simulation apparatus.

Further, in the semiconductor process simulation apparatus according to the eleventh aspect, as shown in FIG. 18, silicon ion implantation is performed at the time of ion implantation using a transmission electron microscope photograph image captured by an image scanner 2003 (image data input means). A dislocation ring physical quantity extraction unit 2004 (dislocation ring physical quantity extraction means) for extracting the physical quantity of the dislocation ring introduced into the substrate is provided. This makes it possible to extract the physical quantity of the dislocation ring from the captured transmission electron micrograph image.

Further, in the semiconductor process simulation apparatus according to the twelfth aspect, as shown in FIG.
The transmission electron micrograph image captured by
16 and a cross-sectional transmission electron microscope image as shown in FIG. This makes it possible to extract and handle different physical quantities between the image observed by the plane transmission electron microscope and the image observed by the cross-sectional transmission electron microscope.

Further, in the semiconductor process simulation apparatus according to the thirteenth aspect, as shown in FIG. 22, the physical quantity extraction unit 2005 of the dislocation ring is used to separate the dislocation ring from the plane transmission electron microscope image as shown in FIG. The size and density are to be extracted. This makes it possible to use the size and density of the dislocation ring to use an impurity diffusion model that takes into account the dislocation ring.

In the semiconductor process simulation apparatus according to the fourteenth aspect, as shown in FIG. 22, the dislocation rings extracted from the plane transmission electron microscope image as shown in FIG. Are classified (arranged) for each process condition and stored in the database 2006. Thus, under arbitrary process conditions, it is possible to use an impurity diffusion model that takes into account the dislocation rings by using the size and density of the dislocation rings obtained from actual measurement.

Further, in the semiconductor process simulation apparatus according to the fifteenth aspect, as shown in FIG. 18, the physical quantity extraction unit 2004 of the dislocation ring can be obtained from the cross-sectional transmission electron microscope image as shown in FIG. Extract the occurrence position data. This makes it possible to use an impurity diffusion model in which the dislocation ring is taken into account using the dislocation ring occurrence position obtained from the actual measurement.

In the semiconductor process simulation apparatus according to claim 16, as shown in FIG. 18, the dislocation wheel physical quantity extracting unit 2004 extracts the dislocation wheel depth data as the dislocation wheel occurrence position data. . That is, the physical quantity extraction unit 2004 of the dislocation ring extracts the data of the depth X of the dislocation ring from the captured cross-sectional transmission electron microscope image as shown in FIG. As a result, the impurity diffusion model that takes into account the dislocation ring is used, using the dislocation ring generation depth obtained from the cross-sectional transmission electron microscope image of the sample created for extracting the dislocation ring generation position. Can be used.

Further, in the semiconductor process simulation apparatus according to the seventeenth aspect, as shown in FIG. 18, the physical quantity extraction unit 2004 of the dislocation ring generates the dislocation generation depth and the dislocation ring as the location data of the dislocation ring. The parameters of the elliptic arc representing the lateral distance and the depth direction from the ion implantation mask at the position of occurrence of, and the shape of the transition region in the depth direction and lateral direction of the dislocation ring are extracted. That is,
The physical quantity extraction unit 2004 of the dislocation ring is
From the cross-sectional transmission electron microscope image as shown in FIG. 0, the occurrence depth X of the dislocation ring, the lateral distance Y from the ion implantation mask 204 at the position of the occurrence of the dislocation ring, the depth direction and the lateral direction of the dislocation ring. A parameter b of an elliptical arc representing the shape of the transition region,
a is extracted. As a result, the generation depth of the dislocation ring,
Impurities taking into account dislocation rings using measured values of elliptic arc parameters that represent the lateral distance from the ion implantation mask at the location of the dislocation rings and the shape of the depth and lateral transition regions It is possible to use a diffusion model.

In the semiconductor process simulation apparatus according to the eighteenth aspect, as shown in FIG. 18, the dislocation wheel physical quantity extraction unit 2004 generates the dislocation wheel generation position data extracted from one cross-sectional transmission electron microscope image. Is extracted as one or more sets. Accordingly, for example, even when a dislocation ring as shown in FIG. 21 is formed at a plurality of positions, it is possible to use an impurity diffusion model that takes the dislocation ring into consideration.

In the semiconductor process simulation apparatus according to the nineteenth aspect, as shown in FIG. 22, the dislocation wheel occurrence position data extracted by the dislocation wheel physical quantity extraction unit 2005 is classified (arranged) for each process condition. And store it in the database 2006. Thus, under arbitrary process conditions, it is possible to use an impurity diffusion model that takes into account the dislocation rings by using the occurrence position data of the dislocation rings obtained from the actual measurement.

Further, in the semiconductor process simulation apparatus according to the twentieth aspect, the size and density of the dislocation ring extracted from the plane transmission electron microscope photograph image by the dislocation ring physical quantity extraction unit 2005 shown in FIG. The database 2006 is generated by classifying the dislocation ring generation position data extracted from the cross-sectional electron micrograph image for each process condition.
To be stored. Thus, under arbitrary process conditions, it is possible to use an impurity diffusion model that takes into account the dislocation rings by using the size and density of the dislocation rings and the occurrence position data obtained from the actual measurement.

Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 22, the process condition dependency calculation unit 2007 (process condition dependency calculation means) includes a dislocation loop stored in the database 2006. The process condition-dependent coefficient is calculated on the basis of the size and density of dislocations and the dislocation ring occurrence position data. As a result, even in any process condition without data accumulation,
It becomes possible to use a diffusion model that takes into account the contribution from the dislocation ring.

Further, in the semiconductor process simulation apparatus according to claim 22, as shown in FIG. 18, a transmission electron microscope photograph used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation is used. A scanner 2003 that reads optically is used. This makes it possible to optically read a transmission electron microscope photographic image used for extracting the physical quantity of the dislocation ring introduced into the silicon substrate at the time of ion implantation.

In the semiconductor process simulation apparatus according to the twenty-third aspect, as shown in FIG. 24, a transmission electron micrograph image used for extracting the physical quantity of the dislocation ring introduced into the silicon substrate at the time of ion implantation. From the storage medium in which the data is stored, the transmission electron micrograph image data is read by the storage medium reading unit 2008. This makes it possible to read from a storage medium image data of a transmission electron microscope photograph used to extract the physical quantity of the dislocation ring introduced into the silicon substrate during ion implantation.

In the semiconductor process simulation apparatus according to a twenty-fourth aspect, the image data input means converts the transmission electron micrograph image data used for extracting the physical quantity of the dislocation ring introduced into the silicon substrate by the ion implantation step. It has a function to input from outside. This makes it possible to externally input image data of a transmission electron micrograph used to extract the physical quantity of the dislocation ring introduced into the silicon substrate during ion implantation.

Embodiment 10 FIG. 15 shows Embodiment 1 of the present invention.
FIG. 1 is a configuration diagram of a semiconductor process simulation apparatus according to the first embodiment. In the figure, a semiconductor process simulation apparatus includes an image data input unit 2001 for capturing a transmission electron microscope photographic image used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate during ion implantation,
A process simulation device calculation unit 2002 that uses a diffusion model that takes into account the contribution of the transition ring introduced into the substrate by the ion implantation process to the diffusion of impurities in the heat treatment process after the ion implantation process. .

[Eleventh Embodiment] FIG. 18 is a block diagram of a semiconductor simulation apparatus according to an eleventh embodiment of the present invention. In the figure, a semiconductor process simulation apparatus is an image scanner 200 that optically captures a transmission electron microscope photographic image for extracting a physical quantity of a dislocation ring.
3 and a dislocation ring physical quantity extraction unit 2004 for extracting the physical quantity of the dislocation ring from the captured transmission electron micrograph image.
And a process simulation device calculation unit 2002 that performs diffusion calculation using a diffusion model using the physical quantity of the dislocation ring extracted by the physical quantity extraction unit 2004 of the dislocation ring.

The dislocation ring physical quantity extraction unit 2004 calculates
When the captured image of the transmission electron micrograph is distinguished into a planar transmission electron microscope image as shown in FIG. 17 and a cross-sectional transmission electron microscope image as shown in FIG. 16, and the captured image is a cross-sectional transmission electron microscope image In step (1), data on the location of the dislocation ring is extracted from the cross-sectional transmission electron microscope image as the physical quantity of the dislocation ring.

There are various forms of the dislocation ring occurrence position data. Hereinafter, the dislocation ring occurrence position data will be described with reference to FIGS.
This will be described with reference to FIG.

FIG. 19 is a diagram (a cross-sectional transmission electron micrograph) for explaining that the dislocation ring is in the depth direction. In the figure, 201 is silicon, 202 is a silicon surface, 203 is a surface on which a crystal dislocation ring is formed,
207 indicates the implanted ions, and X indicates the depth of the plane on which the dislocation rings of the crystal are formed, and FIG. 4 shows that one set of dislocation rings is generated in the depth direction. ing.

FIG. 20 is a diagram for explaining that the dislocation ring has a two-dimensional shape (a cross-sectional transmission electron micrograph). In the figure, reference numeral 202 denotes a silicon surface, 203 denotes a plane on which a crystal dislocation ring is formed, 204 denotes a gate (ion implantation mask), 207 denotes implanted ions, and X denotes a depth of a plane on which a dislocation ring is formed. Here, Y is the lateral distance from the ion implantation mask at the position where the dislocation ring is generated, and a and b are the parameters of the elliptic arc representing the shape of the transition region in the depth direction and the lateral direction, respectively. In the figure, the dislocation ring has a two-dimensional shape due to the presence of the ion implantation mask. The shape of the transition region in the depth direction and the lateral direction designated by the parameters a and b of the elliptic arc can be expressed by the above equation (4).

FIG. 21 is a diagram for explaining the occurrence of two dislocation rings (a cross-sectional transmission electron micrograph). In the figure, 202 is a silicon surface, 204 is a gate (ion implantation mask), 203A is a first surface on which dislocation rings are formed, and 203A is a second surface on which crystal dislocation rings are formed. This figure shows that dislocation rings are formed at two places (203A and 203B).

As described above, the dislocation ring physical quantity extraction unit 2004 extracts the dislocation ring occurrence position data from the cross-sectional transmission electron microscope image, as shown in FIG. Is it only information of depth?
It is determined whether the position information includes the two-dimensional shape as shown in FIG. 20 or whether there are a plurality of dislocation ring occurrence positions as shown in FIG. Extract location information.

[Embodiment 12] FIG. 22 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 12 of the present invention. In the figure, a semiconductor process simulation apparatus optically captures a transmission electron microscope photographic image for extracting a physical quantity of a dislocation ring.
003, a dislocation wheel physical quantity extraction unit 20 for extracting a dislocation wheel physical quantity from the captured transmission electron micrograph image.
05, a database 2006 for classifying (arranging) and storing the physical quantities of the dislocation rings extracted by the dislocation ring physical quantity extraction unit 2005 for each process condition (for example, heat treatment time and heat treatment temperature), and a process simulation apparatus. When the physical quantity of the dislocation ring required for performing the diffusion calculation in the calculation unit 2002 is not stored in the database 2006, the process condition dependence for calculating the physical quantity of the dislocation ring required for the diffusion calculation (process condition dependent coefficient). Sex calculator 2
007 and a process simulation device calculation unit 200 that performs diffusion calculation using a diffusion model using the physical quantity of the dislocation ring extracted by the physical quantity extraction unit 2005 of the dislocation ring.
2 is provided.

The physical quantity extraction unit 2005 for the dislocation ring
The captured transmission electron microscope image is distinguished into a plane transmission electron microscope image and a cross-sectional transmission electron microscope image. Then, the physical quantity extraction unit 2005 for the dislocation ring is configured to be
Similarly to FIG. 19, when the captured image is a cross-sectional electron microscope image, when extracting the dislocation ring occurrence position data from the cross-sectional transmission electron microscope image, the dislocation occurrence position data is as shown in FIG. It is determined whether the information is information of only a small depth, position information including a two-dimensional shape as shown in FIG. 20, or whether there are a plurality of dislocation ring occurrence positions as shown in FIG. Then, the position information of the generation position of the dislocation ring is extracted. When the captured image is a plane transmission electron microscope image, the physical quantity extraction unit 2005 of the dislocation ring determines the size and density of the dislocation ring from a plane transmission electron microscope photograph image as shown in FIG. Extract.

The database 2006 contains the size and density of dislocation rings extracted from a plane electron microscope image,
The position data of dislocation rings extracted from the cross-sectional transmission electron microscope image is classified (arranged) for each process condition and stored.

Next, the process condition dependency calculation section 20
An example of the process by 07 will be described with reference to FIG. FIG. 23 is a diagram showing the time dependence of the density of dislocation rings with respect to the heat treatment. Hereinafter, the process condition dependent calculation unit 2007
The following describes the calculation of the density of the dislocation rings performed by the method. The physical quantity of the dislocation ring calculated by the process condition dependent calculation unit 2007 is referred to as a process condition dependent coefficient.

Process simulation device calculation unit 20
In the diffusion calculation of 02, since the density of the dislocation ring is required for each time step of the diffusion calculation, data may be insufficient in the density data of the dislocation ring extracted by the physical quantity extraction unit 2005 of the dislocation ring.

The process condition dependent calculation unit 2007 calculates the density of the dislocation rings, which is extracted from the cross-sectional transmission electron microscope image by the dislocation ring physical quantity extraction unit 2005 and stored in the database 2006 for each process condition (for example, heat treatment time). 23, first, as shown in FIG. 23, the density 901 of the extracted dislocation rings is plotted against the heat treatment time, and a fitting curve 902 passing through each point of the 901 is calculated to perform the diffusion calculation. The density of the dislocation rings (process condition dependent coefficient) for each time step is calculated. In the process simulation device calculation unit 2002, the diffusion calculation is performed using the calculated density of the dislocation rings at each time step of the diffusion calculation.

In the example shown here, the method of calculating the density required for the diffusion calculation using the fitting curve has been described. However, the calculation can be performed by another calculation method such as the interpolation method of the extraction point. It is. In addition, here, the heat treatment time dependency of the density of dislocation rings is described, but the size, generation position, and other process conditions of dislocation rings can be calculated in the same manner.

[Thirteenth Embodiment] FIG. 24 is a configuration diagram of a semiconductor process simulation apparatus according to a thirteenth embodiment of the present invention. In the figure, the same parts as those of the semiconductor process simulation apparatus of the twelfth embodiment shown in FIG.

The semiconductor process simulation apparatus shown in FIG. 24 reads a transmission electron microscope image data from a magneto-optical storage medium storing transmission electron microscope image data for extracting a physical quantity of a dislocation ring. (Magneto-optical recording / reading unit) 2008.
In this magneto-optical storage medium, transmission electron microscope image data for extracting a physical quantity of a dislocation ring is digitized and recorded by an offline recording device.

The physical quantity extraction unit 2005 for the dislocation ring
, The database 2006, the process condition dependency calculation unit 2007, and the process simulation device calculation unit 2002 have the same configuration as in the twelfth embodiment (FIG. 22), and the transmission electron microscope read by the storage medium reading unit 2008. The same processing as that of the twelfth embodiment is performed on the image, and thus the detailed description is omitted.

In this embodiment, a magneto-optical storage medium 1001 is used as a storage medium for storing transmission electron microscope image data.
However, the present invention is not limited to this, and another storage medium, for example, a magnetic recording medium or an optical storage medium may be used. In this case, digitized transmission electron microscope image data is stored in the magnetic recording medium by magnetic recording, and digitized transmission electron microscope image data is stored in the optical recording medium by optical recording. The transmission electron microscope image data may be input through a line using a network.

Incidentally, Examples 1 to 13 (FIGS. 1 and 1)
1, FIG. 12, FIG. 13, FIG. 14, FIG. 15, FIG. 18, FIG.
2 and FIG. 24), the configuration of the semiconductor process simulation apparatus is shown by a functional block diagram. However, the semiconductor process simulation apparatus described above has a program (software) for executing the function of each unit of the semiconductor process simulation apparatus. And a microprocessor that executes the program. in this case,
Such a program is stored in, for example, an optical storage medium such as a CD-ROM or a magnetic storage medium such as a floppy disk or a hard disk.

[0139]

As described above, according to the first aspect of the present invention,
According to the semiconductor process simulation apparatus according to
A diffusion model taking into account the contribution from the dislocation ring introduced into the silicon substrate at the time of ion implantation in the ion implantation process simulation means is generated by the model generation means, and the heat treatment process simulation means performs heat treatment after the ion implantation step. Since a diffusion model is used for the diffusion of impurities in the process, and the pressure field due to the dislocation ring is a function of the distance from the position of the dislocation ring, the layer where the dislocation ring is formed in the prior art is flat. However, given the position coordinates of the layer where the dislocation ring is formed, it is possible to calculate the pressure field by the dislocation ring, which is generated when the source and drain are formed in actual semiconductor device manufacturing. For a layer of dislocation rings that does not consist only of simple planes, use a diffusion model that takes into account the contribution from the dislocation rings. It is possible to provide a semiconductor process simulation device which can be.

According to the semiconductor process simulation apparatus of the present invention, the position of the dislocation ring in the diffusion model is defined by a curve that can be represented by a line segment and an elliptic arc. Semiconductor process simulation that can determine the position coordinates of the formed layer and can use a diffusion model that takes into account the contribution from the dislocation ring even for a layer of the dislocation ring that does not consist only of a plane An apparatus can be provided.

Further, according to the semiconductor process simulation apparatus of the third aspect, the position of the dislocation ring in the diffusion model is configured by the maximum value of the concentration of the implanted impurity atoms based on the result of the ion implantation process simulation means. Since the position of the saddle point is used and defined by an arbitrary distance from the saddle point, the position coordinates of the layer where the dislocation ring is formed can be determined, and the dislocation of the dislocation that is not constituted only by a plane can be determined. It is possible to provide a semiconductor process simulation apparatus that can use a diffusion model that takes into account the contribution of a dislocation ring from a ring layer.

Further, according to the semiconductor process simulation apparatus of the fourth aspect, the position of the dislocation ring in the diffusion model is determined based on the result of the ion implantation process simulation means at a position where the concentration of the implanted impurity atoms becomes an arbitrary concentration. Therefore, the position coordinates of the layer where the dislocation ring is formed can be determined, and the contribution from the dislocation ring is also taken into account for the dislocation ring layer that is not formed only by a plane. A semiconductor process simulation apparatus that can use a diffusion model put into a semiconductor device can be provided.

According to the semiconductor process simulation apparatus of the fifth aspect, in order to give the position coordinates of the layer where the dislocation ring is formed, the result of the ion implantation step simulation means is transmitted via the input / output interface. An image is displayed, and a user of the semiconductor process simulation apparatus is allowed to input a determined / determined position while watching the image display. Since the input position is used, the layer of the layer where the dislocation ring is formed is used. It is possible to provide a semiconductor process simulation apparatus that can determine position coordinates and can use a diffusion model that takes into account the contribution from a dislocation ring even for a layer of a dislocation ring that does not include only a plane. it can.

According to the semiconductor process simulation apparatus of the sixth aspect, the first model generating means for defining the position of the dislocation ring in the diffusion model by a curve that can be represented by a line segment and an elliptic arc; Using the position of the saddle point constituted by the maximum value of the concentration of the implanted impurity atoms based on the result of the ion implantation process simulation means, and defining the position of the dislocation ring at an arbitrary distance from the saddle point. The second model generation means and the position of the dislocation ring in the diffusion model are defined by the position at which the concentration of the implanted impurity atoms becomes an arbitrary concentration based on the result of the ion implantation step simulation means.
Fourth model generation for defining the position of the dislocation ring in the model generation means and the diffusion model based on the input instruction given by the user while viewing the image display of the result by the ion implantation process simulation means via the input / output interface Means, at least two types of model generating means, and the switching means switches to one of the first model generating means, the second model generating means, the third model generating means and the fourth model generating means. Thus, the user of the semiconductor process simulation apparatus can select the most suitable input method of the position of the dislocation wheel in the semiconductor process to be simulated.

Further, according to the semiconductor process simulation apparatus of the present invention, the heat treatment process simulation means uses a diffusion model considering the contribution from the dislocation ring only in the first heat treatment process after ion implantation. Since the normal diffusion model is used for the heat treatment after the first heat treatment, for example, when the heat treatment after the second heat contributes little from the dislocation wheel or is out of the applicable range of the dislocation wheel model In addition, a normal diffusion model can be used for the second and subsequent heat treatments, and a semiconductor process simulation apparatus that can flexibly adapt to a semiconductor process can be provided.

According to the semiconductor process simulation apparatus of the eighth aspect, the heat treatment step simulation means comprises: a first heat treatment step after ion implantation;
In the heat treatment step after the first heat treatment step after the ion implantation, a diffusion model considering the contribution from the dislocation ring is used, so that it is possible to provide a semiconductor process simulation apparatus that can flexibly adapt to a semiconductor process. .

Further, according to the semiconductor process simulation apparatus of the ninth aspect, the heat treatment step simulation means comprises: a first heat treatment step after ion implantation;
In the heat treatment process after the first heat treatment process after ion implantation, it is possible to switch between a diffusion model that considers the contribution from the dislocation ring and a diffusion model that does not consider the contribution from the dislocation ring. Can be provided.

According to the semiconductor process simulation apparatus of the tenth aspect, a TEM image for use in extracting a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation is input. A semiconductor process simulation apparatus capable of taking a transmission electron micrograph image necessary for extracting the physical quantity of a dislocation ring into a semiconductor process simulation apparatus in a short time and with low labor by providing the image data input means of Can be provided.

Further, according to the semiconductor process simulation apparatus of the eleventh aspect, the physical quantity of the dislocation ring introduced into the silicon substrate at the time of ion implantation is extracted using the captured transmission electron micrograph image. The provision of the dislocation wheel physical quantity extraction means can provide a semiconductor process simulation apparatus capable of extracting the dislocation wheel physical quantity from a captured transmission electron micrograph image.

According to the semiconductor process simulation apparatus of the twelfth aspect, the captured transmission electron microscope photographic image is divided into a plane transmission electron microscope image and a cross-sectional transmission electron microscope image, so that a plane transmission electron microscope image is obtained. And a semiconductor process simulation apparatus capable of extracting and handling different physical quantities between the image and the cross-sectional transmission electron microscope image.

Further, according to the semiconductor process simulation apparatus of the thirteenth aspect, by extracting the size and density of dislocation rings from a plane transmission electron microscope photograph image, the size and density of dislocation rings are used. It is possible to provide a semiconductor process simulation apparatus capable of using an impurity diffusion model taking into account the dislocation ring.

Further, according to the semiconductor process simulation apparatus of the present invention, the size and density of dislocation rings extracted from a photographic image of a plane transmission electron microscope are arranged and stored for each process condition, and are made into a database. Further, it is possible to provide a semiconductor process simulation apparatus capable of using an impurity diffusion model in which a dislocation ring is taken into account under an arbitrary process condition.

Further, according to the semiconductor process simulation apparatus of the present invention, by extracting the data of the position of the dislocation ring from the cross-sectional transmission electron micrograph image, the position of the dislocation ring can be determined by using the position of the dislocation ring. It is possible to provide a semiconductor process simulation apparatus that can be used for an impurity diffusion model taking a ring into consideration.

According to the semiconductor process simulation apparatus of the sixteenth aspect, the dislocation ring generation depth is extracted as the dislocation ring generation position data from the cross-sectional TEM image. Using the depth of occurrence of dislocation rings obtained from cross-sectional transmission electron microscopy images of samples prepared for the extraction of occurrence position data, it is possible to use an impurity diffusion model that takes dislocation rings into account. A possible semiconductor process simulation apparatus can be provided.

Further, according to the semiconductor process simulation apparatus of the seventeenth aspect, the position data of the dislocation ring is represented by the depth of the dislocation ring, the lateral distance of the position of the dislocation ring from the implantation mask, By using the parameters of the elliptical arc representing the shape of the transition region in the depth direction and the lateral direction, the occurrence depth of the dislocation ring, the lateral distance from the ion implantation mask of the location of the dislocation ring, and the depth direction It is possible to provide a semiconductor process simulation apparatus capable of using an impurity diffusion model in which a dislocation ring is taken into account by using measured values of parameters of an elliptic arc representing the shape of a lateral transition region.

According to the semiconductor process simulation apparatus of the eighteenth aspect, the generation position data is one set or a plurality of generation position data for one cross-sectional transmission electron microscope image. A semiconductor process simulation device that can be used in an impurity diffusion model that takes dislocation rings into account in accordance with the process conditions in which dislocation rings are formed at two or more locations by adopting a set Can be provided.

According to the semiconductor process simulation apparatus of the nineteenth aspect, the generation position data of dislocation rings extracted from the taken-in cross-sectional transmission electron microscope image is organized into a database for each process condition. To provide a semiconductor process simulation apparatus that can use an impurity diffusion model in consideration of dislocation rings by using occurrence position data of dislocation rings obtained from actual measurement under arbitrary process conditions. Can be.

According to the semiconductor process simulation apparatus of the twentieth aspect, the size and density of dislocation rings are extracted from a plane transmission electron microscope image, and the generation of dislocation rings is performed from a cross-sectional transmission electron microscope image. By extracting the position, it is possible to use an impurity diffusion model that takes the dislocation ring into account under arbitrary process conditions, using the size and density of the dislocation ring obtained from actual measurement and the generated position data. It is possible to provide a simple semiconductor process simulation apparatus.

Further, according to the semiconductor process simulation apparatus of the present invention, the process condition dependent coefficient is calculated based on the size and density of the dislocation wheel and the generation position data of the dislocation wheel stored in the database. Provided is a semiconductor process simulation apparatus which includes a process condition dependency calculation means and can use a diffusion model in consideration of a contribution from a dislocation ring even in an arbitrary process condition without accumulation of data. Can be.

According to the semiconductor process simulation apparatus of the present invention, a photographic image of a transmission electron microscope used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation is optically converted. A semiconductor process simulation device capable of optically reading a transmission electron microscope photographic image used to extract a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation by providing a scanner for reading is provided. Can be provided.

According to the semiconductor process simulation apparatus of the twenty-third aspect, transmission electron micrograph image data used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation is stored. Transmission electron micrograph used to extract the physical quantity of the dislocation ring introduced into the silicon substrate at the time of ion implantation by providing the storage medium reading means for reading the transmission electron micrograph image data from the stored storage medium A semiconductor process simulation apparatus capable of reading the image data from the storage medium.

According to the semiconductor process simulation apparatus of the twenty-fourth aspect, the image data input means converts the photographic image data of the transmission electron microscope used for extracting the physical quantity of the dislocation ring introduced into the silicon substrate by the ion implantation step. Equipped with an external input function, it is possible to input externally transmission electron micrograph image data used to extract the physical quantity of dislocation rings introduced into the silicon substrate during ion implantation A semiconductor process simulation device can be provided.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a semiconductor process simulation apparatus according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram illustrating a dislocation ring of a crystal formed when ion implantation is performed in a transistor shape.

FIG. 3 is an explanatory diagram for explaining a method of defining a position of a dislocation ring by a line segment and an elliptic arc according to a second embodiment.

FIG. 4 is an explanatory view illustrating a method of defining the position of a dislocation ring by an arbitrary distance from a saddle point of an impurity atom concentration in a third embodiment.

FIG. 5 is an explanatory diagram illustrating a saddle point of an impurity atom concentration.

FIG. 6 is an explanatory diagram illustrating designation of an arbitrary concentration in an impurity concentration profile according to a fourth embodiment.

FIG. 7 is an explanatory diagram for explaining positions of dislocation rings determined by density designation in the fourth embodiment.

FIG. 8 is an explanatory diagram of two-dimensional contour display of an impurity concentration distribution in a fifth embodiment.

FIG. 9 is an explanatory diagram of displaying a cross-sectional impurity concentration profile in Example 5.

FIG. 10 is an explanatory diagram illustrating a method of designating a layer of a dislocation ring by inputting a point sequence in the fifth embodiment.

FIG. 11 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 6 of the present invention.

FIG. 12 is a configuration diagram of a semiconductor process simulation apparatus according to a seventh embodiment of the present invention.

FIG. 13 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 8 of the present invention.

FIG. 14 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 9 of the present invention.

FIG. 15 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 10 of the present invention.

FIG. 16 is an explanatory diagram illustrating a dislocation ring of a crystal formed when ion implantation is performed in a transistor shape (a cross-sectional transmission electron microscope image example).

FIG. 17 is a diagram showing an example of a plane transmission electron microscope image.

FIG. 18 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 11 of the present invention.

FIG. 19 is a diagram illustrating an example of a sample for extracting the generation depth of dislocation rings (an example of a cross-sectional transmission electron microscope image).

FIG. 20 is a diagram illustrating a usage example (cross-sectional transmission electron microscope image example) for extracting a dislocation ring generation position.

FIG. 21 is a diagram (example of a cross-sectional transmission electron microscope image) showing an example in which there are two dislocation ring generation positions.

FIG. 22 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 12 of the present invention.

FIG. 23 is a diagram for describing an example of process condition dependency calculation.

FIG. 24 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 13 of the present invention.

FIG. 25 is an explanatory diagram showing that a dislocation ring of a crystal is a plane.

FIG. 26 is an explanatory view showing that dislocation rings of a crystal are orthogonal to each other.

FIG. 27 is an explanatory diagram showing that the sum of contributions from the dislocation rings is obtained using the six dislocation rings that are closest to each other.

[Explanation of symbols]

101 Ion implantation process simulation means 102 Model generation means 103 Heat treatment process simulation means 104 Input / output interface 105 User 201 Silicon 202, 402, 702, 802, 1002 Silicon surface 203, 403, 703, 1003 Dislocation ring is formed Plane 204, 401, 701, 801, 1001 gate electrode 207 implanted ion 301 dislocation ring 404 saddle point 803A, 803B, 803C, 803D formed by maximum value of impurity atom concentration plane 1102a dislocation ring is formed 1 model generation means 1102b second model generation means 1102c third model generation means 1102d fourth model generation means 1103, 1203, 1303, 1403 heat treatment process simulation means 110 Switching means 1501 Silicon 1502 Silicon surface 1503 Plane on which crystal dislocation ring is formed 1604 Crystal dislocation ring 1604a to 1604f Crystal dislocation ring 2001 Image data input unit 2002 Process simulation calculation unit 2003 Image scanner 2004, 2005 Dislocation ring physical quantity extraction unit 2006 Database 2007 Process condition dependency calculation unit 2008 Storage medium reading unit (magneto-optical recording reading unit)

Claims (24)

[Claims] 1. A semiconductor process simulation apparatus for simulating a semiconductor manufacturing process, comprising: an ion implantation step simulation means; and a diffusion model considering a contribution from a dislocation ring introduced into a silicon substrate at the time of ion implantation. A model generating means for generating; and a heat treatment process simulation means for using the diffusion model for diffusion of impurities in a heat treatment step after the ion implantation step; and a dislocation to be defined in a silicon substrate region used in the diffusion model. Wherein the pressure field caused by the ring is a function of the distance from the position of the dislocation ring. 2. The semiconductor process simulation apparatus according to claim 1, wherein the position of the dislocation ring in the diffusion model is defined by a curve that can be represented by a line segment and an elliptic arc. 3. The position of the dislocation ring in the diffusion model is based on the position of a saddle point formed by the maximum value of the concentration of the implanted impurity atoms based on the result of the ion implantation process simulation means. 2. The semiconductor process simulation apparatus according to claim 1, wherein the distance is defined by an arbitrary distance from the semiconductor device. 4. The method according to claim 1, wherein the position of the dislocation ring in the diffusion model is defined by a position at which an implanted impurity atom has an arbitrary concentration based on a result of the ion implantation process simulation means. 2. The semiconductor process simulation apparatus according to claim 1. 5. The semiconductor process simulation apparatus is capable of displaying an image of the result of the ion implantation step simulation means, and a user of the semiconductor process simulation apparatus is capable of displaying the diffusion while viewing the image display. 5. The semiconductor process simulation apparatus according to claim 1, further comprising an input / output interface capable of inputting a position of a dislocation ring in the model. 6. The semiconductor process simulation apparatus has an input / output interface between the semiconductor process simulation apparatus and a user, and the model generation means determines a position of a dislocation ring in the diffusion model by using a line segment and an elliptic arc. And a first model generating means defined by a curve which can be represented by the following formula: and a position of a dislocation ring in the diffusion model is constituted by a maximum value of an implanted impurity atom concentration based on a result of the ion implantation step simulation means. A second model generating means which uses the position of the saddle point and which is defined by an arbitrary distance from the saddle point, and the position of the dislocation ring in the diffusion model is implanted based on the result of the ion implantation step simulation means. Third model generating means defined by a position at which the concentration of the impurity atoms becomes an arbitrary concentration, The position of the wheels of the dislocations in the serial diffusion model,
And at least two types of fourth model generation means, which are defined based on an input instruction given by a user, while viewing the image display of the result by the ion implantation process simulation means via the input / output interface. Switching means for switching to one of the first model generation means, the second model generation means, the third model generation means or the fourth model generation means to obtain the diffusion model;
2. The semiconductor process simulation apparatus according to claim 1, comprising: 7. The heat treatment process simulation means uses a diffusion model taking into account the contribution from a dislocation ring only in the first heat treatment process after ion implantation. 7. The semiconductor process simulation apparatus according to claim 5 or 6. 8. The heat treatment process simulation means includes: a first heat treatment process after ion implantation, and a heat treatment process after the first heat treatment process after ion implantation.
7. The semiconductor process simulation apparatus according to claim 1, wherein a diffusion model considering a contribution from a dislocation ring is used. 9. The heat treatment step simulation means according to claim 1, wherein said heat treatment step includes: a first heat treatment step after the ion implantation; and a heat treatment step after the first heat treatment step after the ion implantation.
4. A switch between a diffusion model taking into account the contribution from the dislocation ring and a diffusion model without taking into account the contribution from the dislocation ring.
7. The semiconductor process simulation apparatus according to 4, 5, or 6. 10. A transmission electron microscope photograph image used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation in a semiconductor process simulation apparatus for simulating a semiconductor manufacturing process. Image data input means for performing an impurity diffusion process using a diffusion model taking into account the contribution of a transition ring introduced into the substrate by the ion implantation process to the diffusion of the impurity in the heat treatment process after the ion implantation process. A semiconductor process simulation apparatus, comprising: simulation means. 11. A dislocation wheel physical quantity extraction for extracting a dislocation wheel physical quantity introduced into a silicon substrate at the time of ion implantation using the TEM image captured by the image data input means. 11. The semiconductor process simulation apparatus according to claim 10, further comprising: means. 12. The dislocation ring physical quantity extracting means distinguishes a transmission electron micrograph image captured by the image data input means into a plane transmission electron microscope image and a cross-sectional transmission electron microscope image. The semiconductor process simulation apparatus according to claim 11, wherein: 13. The semiconductor process simulation apparatus according to claim 12, wherein the physical quantity extracting means for the dislocation ring extracts the size and density of the dislocation ring from the planar transmission electron microscope image. 14. A database for classifying and storing the size and density of dislocation rings extracted from the planar transmission electron microscope image by the dislocation ring physical quantity extracting means for each process condition. 14. The semiconductor process simulation apparatus according to claim 13, wherein: 15. The semiconductor process simulation apparatus according to claim 12, wherein the physical quantity extracting means for the dislocation ring extracts position data of the dislocation ring from the cross-sectional transmission electron microscope image. 16. The semiconductor process simulation apparatus according to claim 15, wherein the dislocation ring occurrence position data is a dislocation ring occurrence depth. 17. The dislocation ring generation position data includes a dislocation ring generation depth, a lateral distance and a depth direction of the dislocation ring generation position from an ion implantation mask, and a dislocation ring generation position. 17. A parameter of an elliptic arc representing a shape of a transition region in a depth direction and a lateral direction.
A semiconductor process simulation apparatus as described in the above. 18. The dislocation ring occurrence position data extracted from one cross-sectional transmission electron microscope image is one set or a plurality of sets.
8. The semiconductor process simulation apparatus according to 7. 19. The semiconductor processing apparatus according to claim 15, further comprising a database for classifying and storing the dislocation generation position data for each process condition. 20. The size and density of dislocation rings extracted from the planar transmission electron microscope image and the dislocation rings extracted from the cross-sectional transmission electron microscope image by the dislocation ring physical quantity extracting means. 19. The semiconductor process simulation apparatus according to claim 13, further comprising a database for classifying and storing the occurrence position data for each process condition. 21. The size and density of dislocation rings stored in the database and the dislocations of dislocations, so that diffusion calculation using a diffusion model taking into account contributions from dislocation rings can be used under any process conditions. 21. The semiconductor process simulation apparatus according to claim 20, further comprising: a process condition dependency calculating unit that calculates a process condition dependency coefficient based on the wheel generation position data. 22. The image data input means is a scanner for optically reading a transmission electron microscope photographic image used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation. Claim 1.
22. The semiconductor process simulation apparatus according to any one of 0 to 21. 23. The image data input means, comprising: a storage medium storing transmission electron micrograph image data used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate during ion implantation; 22. A transmission electron microscope image data is read.
The semiconductor process simulation apparatus according to any one of the above. 24. The image data input means has a function of inputting transmission electron micrograph image data used for extracting physical quantities of dislocation rings introduced into a silicon substrate by an ion implantation step from outside the apparatus. The semiconductor process simulation apparatus according to any one of claims 10 to 21.