JPH1070520A - Synchronization acquiring system for receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To speedily acquire synchronization in a receiver receive-processing an input signal for digital-modulating a carrier. SOLUTION: An inputted signal is Fourier-transformed by a Fourier- transformer 21, and a Fourier-transformed coded signal to correlate, which is supplied from a signal generator for acquiring synchronization and the inputted signal are convolute-calculated in plural frequency areas by a convolution arithmetic unit 23. The convolute-calculated signal is square-processed by a squaring device 24 and then add-calculated by an integrator 25 to compare with a prescribed value by a comparator 26. At the time of obtaining signal level not less than the prescribed value, a phase and a frequency at the point of the time are selected for receive-processing the inputted signal. On the other hand, when the signal level is less than the prescribed value, a control circuit 27 changes the phase of the coded signal to correlate, which is supplied from the generator 22, and repeats the processing. Thereby, a frequency deviation and a timing phase necessary for acquiring initial synchronization are detected without repeated processing by changing frequencies as against a conventional manner.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital modulation type receiving apparatus using a carrier wave, and more particularly to a method for performing synchronization acquisition by correlating an input received signal with a synchronization acquisition signal of the reception apparatus.

[0002]

2. Description of the Related Art A digital modulation type receiving apparatus is used as a receiving section or the like of a mobile communication device, and captures initial synchronization by correlating an input received signal with a synchronization capturing signal. I have. There are various types of digital modulation type receiving devices. For example, a spread spectrum communication type receiving device performs synchronization acquisition using a spread code as a synchronization acquisition signal. For synchronization acquisition in a spread spectrum communication type receiving apparatus, a serial search,
There are methods such as a parallel search, and further, there are an active method and a passive method in the serial search method.

FIG. 4 shows a configuration of a synchronization acquisition circuit that performs synchronization acquisition by an active serial search method. In this active method, the phase of a spreading code (generally, a pseudo-random (PN) code) for correlating with an input received signal is moved in the same manner as the spreading code on the transmission side. A multiplier 2 multiplies the spread code from the signal generator 1 for use with the received signal inputted thereto, and furthermore, a detector 3 of a nonlinear circuit.
, The envelope detection or the squared detection is performed, the integrator 4 performs integration at a fixed time interval, and the signal level obtained by the integrator 4 is compared with a predetermined constant value by the comparator 5.

As a result, when the signal level is less than the predetermined value, the control circuit 6 controls the synchronization acquisition signal generator 1 to set the phase of the spread code at a predetermined interval (for example, one chip of the spread code). Half an interval)
The above processing is repeated by the spreading code whose phase has been changed. When the comparator 5 detects that the signal level has become equal to or higher than the predetermined value by such repetitive processing, the control circuit 6 stops controlling the phase of the spread code, and the phase of the spread code is corrected to the correct initial value. It is determined that the position is the synchronization position, and the operation shifts to an operation for maintaining the state in which the synchronization is captured. In the synchronization acquisition circuit shown in FIG. 4, a band-pass filter (B) is provided between the multiplier 2 and the detector 3.
Although the processing in the intermediate frequency band is performed by providing the PF) 7, the band-pass filter 7 can be omitted when processing is performed in the baseband signal region.

[0005] When synchronous acquisition is performed by a passive serial search method, processing is performed by stopping the timing phase of the synchronization acquisition signal on the receiving side using, for example, a matched filter (matched filter). That is, the input received signal is temporarily stored in a shift register or the like, and the output of the received signal at each chip time interval for each fixed delay time and the signal of the pre-stored spread code sequence are simultaneously output by each chip. Synchronous acquisition is performed by taking a correlation.

FIG. 5 shows a configuration of a synchronization acquisition circuit that performs synchronization acquisition by a parallel search method. In this parallel search method, a spread code (PN code) shifted by a certain time (phase) τ is multiplied by an input received signal, and a spread signal having the largest correlation value (signal level) is obtained. Is determined as the phase of the spread code of the received signal. That is, the spread code supplied from the synchronization acquisition signal generator 1 is delayed by the phase τ by the (n−1) delay circuits 10, and each spread code is received by the n multipliers 2. Multiply by. Then, the output signal from each multiplier 2 is detected by n detectors 3, and further, integration is performed at fixed time intervals by n integrators 4, and an n-input comparator 15 is obtained.
To enter. The comparator 15 compares the levels of the input signals and determines the spread code of the signal that has the highest signal level as the phase of the spread code of the received signal.

Here, in order to accurately acquire the above-mentioned synchronization of the received spread-spectrum signal spread signal, a point where the phase of the spread-spectrum signal added to the received signal coincides with the spread signal is detected to determine the timing phase. It is necessary to achieve "time synchronization" for suppressing the deviation within a predetermined range, and "frequency synchronization" for tracking a frequency uncertainty region and performing proper tuning. For this reason, conventionally, the synchronization acquisition circuit has been configured as shown in FIG. 6 or FIG. 7, and frequency synchronization has also been realized.

The synchronization acquisition circuit shown in FIG. 6 is obtained by improving the synchronization acquisition circuit of the serial search system shown in FIG. 4, and includes a voltage control local carrier oscillator 11 in addition to the synchronization acquisition signal generator 1. At the same time, the synchronization acquisition signal generator 1 and the voltage control local carrier oscillator 11 are controlled by the control circuit 16, and the carrier from the voltage control local carrier oscillator 11 is multiplied by the spread code from the synchronization acquisition signal generator 1. The signal is multiplied by the multiplier 12 and input to the multiplier 2.

That is, for example, a voltage controlled oscillator (VC
The control circuit 16 controls the voltage-controlled local carrier oscillator 11 composed of O: Voltage Controlled Oscillator (O: Voltage Controlled Oscillator) to generate a carrier (for example, a sine wave) of a certain frequency, and also controls the signal generator 1 for synchronization acquisition. Circuit 16
Controls to generate a certain phase spread code. Then, the carrier and the spreading code are multiplied by a multiplier 12 to generate a spread demodulation signal, and the spread spectrum demodulated signal is multiplied by a multiplier 2 by a spectrum spread received signal. The bandpass filter 7, the detector 3, and the integrator 5 sequentially apply the same processing to the output signal from the multiplier 2 and compare the level of the signal with a predetermined constant value in the comparator 5.

As a result, when the signal level is less than the predetermined value, the control circuit 16 controls the signal generator 1 for synchronizing acquisition.
Is controlled to advance the phase of the spreading code at steps of a predetermined interval, and the above processing is repeatedly performed by the spreading code having the changed phase. If the signal level does not reach the above-mentioned fixed value even after such repetitive processing, the control circuit 16 controls the voltage-controlled local carrier oscillator 11 to increase the oscillation frequency to a predetermined frequency width (for example, (The half of the bandwidth of the filter 7), and the repetition processing in which the phase of the spreading code is changed at the frequency as described above is performed until the signal level becomes equal to or more than the predetermined value. When the comparator 5 detects that the signal level has become equal to or more than the predetermined value by the repetitive processing in which the phase and the frequency are changed as described above, the control circuit 16 stops the phase control of the spread code, It is determined that the phase of the spread code is at the correct initial synchronization position, and the operation shifts to an operation for maintaining the state in which the synchronization is captured.

The synchronization acquisition circuit shown in FIG. 7 is an improvement of the synchronization acquisition circuit of the parallel search system shown in FIG. 5, and a voltage control local carrier oscillator 11 is provided in addition to the synchronization acquisition signal generator 1. At the same time, the synchronization acquisition signal generator 1 and the voltage control local carrier oscillator 11 are controlled by the control circuit 16, and the carrier from the voltage control local carrier oscillator 11 is multiplied by the spread code from the synchronization acquisition signal generator 1. The signals are multiplied by a multiplier 12 and input to the first-stage multiplier 2 and the respective delay circuits 10.

In this synchronization acquisition circuit, a spread demodulation signal obtained by multiplying a carrier and a spread code by a multiplier 12 is delayed by a phase τ by a delay circuit 10, and a spread spectrum reception signal inputted by a multiplier 2 is obtained. Multiply by. Then, the output signals from the multipliers 2 are sequentially subjected to the same processing as in the band-pass filter 7, the detector 3, and the integrator 4, and the level of the signals is compared in the comparator 15 with a predetermined constant value. As a result, when the signal level is less than the certain value, the control circuit 16 continues until the signal level becomes equal to or more than the certain value (that is, the initial synchronization is obtained).
Controls the synchronization acquisition signal generator 1 and the voltage-controlled local carrier oscillator 11 to perform repetitive processing in which the phase and oscillation frequency of the spreading code are changed.

[0013]

However, in the above-described conventional synchronization acquisition circuit, not only the phase of the spread code supplied from the synchronization acquisition signal generator 1 is changed, but also the phase of the spread code supplied from the voltage control local carrier oscillator 11 is changed. Since the frequency of the carrier wave to be performed is also changed and the repetitive processing is performed, there is a problem that it is difficult to quickly achieve synchronization acquisition. In particular, when a large frequency deviation occurs in a carrier wave due to Doppler shift or the like, it takes a considerable time to achieve synchronization acquisition.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned circumstances, and has as its object to provide a synchronization acquisition system of a receiving apparatus capable of quickly achieving synchronization acquisition.

[0015]

In order to achieve the above object, a synchronization acquisition system according to the present invention is a Fourier transformer for Fourier transforming an input signal in a receiving apparatus for receiving and processing an input signal obtained by digitally modulating a carrier wave. A synchronization acquisition signal generator that supplies a Fourier-transformed synchronization acquisition signal, a convolution operation unit that performs a convolution operation on the Fourier-transformed input signal and the Fourier-transformed synchronization acquisition signal in a plurality of frequency domains, and a convolution operation. A squarer for calculating the squared signal, an integrator for adding the squared signal, and comparing the signal level obtained by the addition with a predetermined value.
A comparator that selects a phase and a frequency that have obtained the signal level equal to or higher than the predetermined value for reception processing of the input signal, and when the signal level that is added based on the result of the determination by the comparator is less than the predetermined value. And a controller for changing the phase of the synchronization acquisition signal supplied from the synchronization acquisition signal generator.

In the synchronization acquisition system of the present invention, for example, an input signal that has been spread spectrum (directly spread) is Fourier-transformed by a Fourier transformer, and a Fourier-transformed synchronization acquisition signal supplied from a synchronization acquisition signal generator and the corresponding signal. A convolution operation is performed on the input signal in a plurality of frequency domains by a convolution operation unit. Then, the convolved signal is squared by a squarer, then added by an integrator, and the obtained signal level is compared with a predetermined value by a comparator to obtain a signal level equal to or higher than a predetermined value. Selects the phase and frequency of the synchronization acquisition signal at that time for input signal reception processing.
On the other hand, if the signal level is less than the predetermined value, the controller changes the phase of the synchronization acquisition signal supplied from the synchronization acquisition signal generator, and repeats the above processing.

That is, in the present invention, a synchronization acquisition signal (spreading code) for correlating with an input signal is, for example, Fourier-transformed in advance and prepared in a synchronization acquisition signal generator, and the received input signal is processed. After performing the Fourier transform, a convolution operation is performed on the synchronization acquisition signal in a plurality of frequency domains. As a result, the frequency deviation and the timing phase required for capturing the initial synchronization can be detected without performing the repetitive processing of changing the frequency as in the related art.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a schematic configuration of a synchronization acquisition circuit according to the present embodiment, FIG. 2 shows a configuration of a parallel search type synchronization acquisition circuit according to the embodiment, and FIG. 3 shows a synchronization acquisition circuit shown in FIG. 1 shows an example of a receiving apparatus using the sigma.

First, an outline of the synchronization acquisition circuit of the present embodiment will be described with reference to FIG. 1. This synchronization acquisition circuit is applied to a receiving apparatus for receiving and processing an input signal obtained by digitally modulating a carrier as described later. Is done. The synchronization acquisition circuit includes a Fourier transformer 21 that performs a Fourier transform on the input received signal;
A synchronization acquisition signal generator 22 that stores a spread code (synchronization acquisition signal) that has been Fourier-transformed in advance, a convolution operation unit 23 that performs a convolution operation on the Fourier-transformed received signal and the Fourier-transformed spread code in a plurality of frequency domains. A squarer 24 for squaring the convolved signal, an integrator 26 for adding the squared signal, a comparator 26 for comparing the added signal level with a predetermined threshold,
If the signal level added based on the result of the determination by the comparator 26 is less than the threshold value, the controller 2 changes the phase of the spread code supplied from the synchronization acquisition signal generator 22.
7 is provided.

In this synchronization acquisition circuit, when a signal level equal to or higher than the threshold value is obtained in the comparator 26, the phase and frequency at that time are output for reception processing of the received signal,
If the threshold value is not reached, the same process is repeated by changing the phase of the spreading code supplied from the synchronization acquisition signal generator 22. That is, the frequency deviation and the timing phase required for capturing the initial synchronization can be detected without performing the repetitive processing of changing the frequency as in the related art.

The above-described synchronization acquisition circuit can be applied to any of the serial search method and the parallel search method. When the circuit is configured as a parallel search method, for example, it is as shown in FIG. In this synchronization acquisition circuit, convolution calculators 23, squarers 24, and integrators 25 are provided in parallel for the number of stages to be processed in parallel, and outputs from the integrators 25 of the respective systems are input to a comparator 26. Here, the convolution calculators 23 perform calculations in predetermined frequency domains, respectively. The convolution calculators 23 perform the fast Fourier transform by the Fourier transformer 21 and the already-converted spread signals supplied from the synchronization acquisition signal generator 22. The code is convolved with the respective frequency domains. Then, the comparator 26 compares each signal level input from the integrator 25 with a predetermined threshold value,
When a signal level equal to or higher than the threshold value is obtained, the phase and frequency at that time are output for reception processing of the received signal.

FIG. 3 shows a configuration of a receiving device of the spread spectrum (direct spread) communication system using the above-described synchronization acquisition circuit 20 of the parallel search system. In FIG. 3, reference numeral 31 denotes a local carrier oscillator that oscillates a local carrier on the receiving apparatus side, 32 denotes a multiplier that multiplies the received signal subjected to spread spectrum by the local carrier, and 33 denotes an output signal from the multiplier 32. A low-pass filter (LPF) for band limiting, a clock oscillator for generating a clock signal, an analog-to-digital converter for digitally converting an output signal from the filter based on the clock signal, and a digital-to-digital converter The signal held in the memory 36 is a memory for holding a signal.
Is input to the receiving processing units 41 to 47 at the subsequent stage.

The subsequent reception processing unit includes a voltage-controlled local carrier oscillator 41 for oscillating a local carrier having a frequency corresponding to the control voltage, and a frequency output from the comparator 26 when a level equal to or higher than a predetermined threshold is obtained. A frequency control circuit 42 for applying a corresponding control voltage to the oscillator 41 based on the deviation (determination result), a spread code generator 43 for supplying a spread code,
A phase control circuit 4 for outputting a spread code of a corresponding phase from the generator 43 based on the phase difference (determination result) output from the comparator 26 when a level equal to or higher than a predetermined threshold is obtained.
4 and a multiplier 45 for multiplying the output from the voltage control local carrier oscillator 41 and the output from the spreading code generator 43
A multiplier 46 for multiplying the output from the multiplier 45 by the output from the memory 36, and a delay lock loop (DLL) 47 for performing phase adjustment and causing the phase control circuit 44 to perform a synchronization holding operation. Have.

In the receiving device having the above configuration, synchronization acquisition is performed as follows. First, the transmission signal is s (t), the carrier frequency is fc, the carrier frequency deviation is fd, the spread signal phase due to transmission delay is Δt, the transmission signal power is P, the information data is d (t), the sequence length is L, Assuming that the spread code signal for one chip time Tc is p (t) and Θ0 is a constant, the received signal r (t) input to the multiplier 32 is represented by Expression (1).
However, in Equation (1), the term of noise of the received signal is omitted.

[0025]

(Equation 1)

When the received signal r (t) is multiplied by the local carrier of the fixed frequency fc from the local carrier oscillator 31 by the multiplier 32, the signal y (t) output from the multiplier 32 is expressed by the following equation (2). expressed.

[0027]

(Equation 2)

The output signal y (t) is band-limited by the filter 33 and input to the A / D converter 35. The output signal y (t) is sampled at a sample time interval Ts by the clock signal from the clock oscillator 34, and the digital data y (nT
s) is stored in the memory 36. The received signal y (nTs) held in the memory 36 is input to the synchronization acquisition circuit 20 and becomes a digital signal Y _K that has been subjected to Fourier transform at N points by the fast Fourier transformer 21. Where K = 0,
1, 2,..., N−1, and Y _K is a function Y (Kf) of K frequencies. F0 = 1 / (NTs),
Assuming that N · Ts = L · Tc, the signal Y _K output from the Fourier transformer 21 is expressed by equation (3).

[0029]

(Equation 3)

Then, the spread code signal p of the phase iTs
A discrete Fourier transform of N points of ((ni) Ts) was performed.
The resulting spread code sequence P in the N frequency domains _K ⁽ⁱ⁾
Is supplied from the synchronization acquisition signal generator 22. Note that K
= 0, 1, 2,..., N−1. Where time
Time shift in the frequency domain is a phase shift in the frequency domain.
And P _K ⁽⁰⁾Is the distance of N points from the spread code signal p (t).
Given a scattered Fourier transform, P _K ⁽⁰⁾And P _K ⁽ⁱ⁾Is an expression
(4) and (5). That is, the signal for synchronization acquisition
The generator 22 has P _K ⁽⁰⁾~ P _K ⁽ⁱ⁾Is stored in advance
You.

[0031]

(Equation 4)

[0032]

(Equation 5)

Output from each convolution unit 23
Signal X _K ⁽ⁱ⁾Is Y_KAnd P _K ⁽ⁱ⁾Convolution in each frequency domain
Only the operation and is represented by equation (6). The result of equation (6)
The result is the spreading code phase Δt = iTs, the carrier frequency deviation f
Assuming d = k2πf0, X _K ⁽ⁱ⁾Integrates (adds) the square of
Is determined by the combination of i and K that maximizes the calculated value.

[0034]

(Equation 6)

Then, this output signal is squared by each squarer 24 in order to increase the detection probability, then integrated (added) by each integrator 25 and input to a comparator 26. The comparator 26 compares the levels of the input signals, selects the signal having the maximum level, and sends a control signal indicating the spread code phase to the phase control circuit 4.
4 and a control signal indicating the carrier frequency deviation fd to the frequency control circuit 42. by this,
The phase control circuit 44 controls the initial phase of the spreading code generator 43, and the frequency control circuit 42 controls the voltage control local carrier oscillator 41 to correct the carrier frequency deviation fd.

The carrier whose frequency deviation has been corrected is multiplied by the spread code signal provided with the initial phase by the multiplier 45, and the multiplication result is further multiplied by the multiplier 46 by the received signal from the memory 36. The despread signal output from the multiplier 46 is used as a signal subjected to reception processing. The output signals from the other two multipliers 46 are output from the delay lock loop 47 by a predetermined amount with respect to the reference phase. A leading and a lag are given for each phase, and a synchronization holding operation is performed by inputting these leading and lag signals to the phase control circuit 44.

Here, in the above embodiment, the A / D converter 35 has a sampling rate of about 40 MHz and the Fourier converter 2
For 1, N was 1024 points, the carrier frequency was 70 MHz, and the spreading code rate was about 4 MHz. Under this condition, the resolution of the carrier frequency deviation is fs / N =
40 × 10 ⁶ /1024=39.0625 KHz,
In principle, the resolution can be further increased by increasing the number N of points of the Fourier transform. That is, in the above embodiment, in the synchronization acquisition circuit of the receiving apparatus of the spread spectrum communication system (in particular, the direct spread system), the synchronization acquisition processing in a plurality of frequency domains is executed for each phase by using the Fourier transform. Therefore, synchronization acquisition can be achieved at high speed. In particular, the processing time of the fast Fourier transform is, as described above, a sample rate of 40 MHz, 1024
The point is 100 μs or less, which is sufficiently practical.

In the above-described embodiment, a spread code signal subjected to Fourier transform is prepared in advance in the synchronization acquisition signal generator 22. However, the spread code signal may be supplied through a Fourier transformer. . Although the above embodiment has been described by taking the spread spectrum communication system as an example, the present invention is not limited to this, and any communication system that performs synchronization acquisition (initial synchronization) by correlation reception in a digital modulation system using a carrier wave. Can be applied.

[0039]

As described above, according to the synchronization acquisition system of the present invention, in a receiving apparatus of a digital modulation system using a carrier, an input received signal and a synchronization acquisition signal of the receiving apparatus are Fourier transformed. After performing the correlation, it is possible to achieve high-speed synchronization acquisition even when a large frequency deviation occurs in the carrier of the received signal, and to improve the resolution of the frequency deviation to be corrected. Can be.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing a synchronization acquisition circuit according to one embodiment of the present invention.

FIG. 2 is a configuration diagram showing a parallel search type synchronization acquisition circuit according to one embodiment of the present invention.

FIG. 3 is a configuration diagram illustrating an example of a receiving device using a synchronization acquisition circuit according to an embodiment of the present invention.

FIG. 4 is a configuration diagram showing an example of a serial search type synchronization acquisition circuit.

FIG. 5 is a configuration diagram illustrating an example of a parallel search type synchronization acquisition circuit.

FIG. 6 is a configuration diagram showing an example of a conventional serial search type synchronization acquisition circuit.

FIG. 7 is a configuration diagram illustrating an example of a conventional parallel search type synchronization acquisition circuit.

[Explanation of symbols]

 21 Fourier Transformer, 22 Signal Generator for Acquisition, 23 Convolutional Operator, 24 Squarer, 25 Integrator, 26 Comparator, 27 Control Circuit,

Claims (1)

[Claims] 1. A receiving apparatus for receiving and processing an input signal obtained by digitally modulating a carrier wave, comprising: a Fourier transformer for performing a Fourier transform on the input signal; a synchronizing signal generator for supplying a Fourier-transformed synchronizing signal; Adds a convolution operation unit that convolves the Fourier-transformed input signal and the Fourier-transformed synchronization acquisition signal in a plurality of frequency domains, a squarer that performs a square operation on the convolved signal, and adds the squared signal An integrator for calculating, a comparator for comparing the signal level obtained by the addition operation with a predetermined value, and selecting a phase and a frequency having a signal level equal to or higher than the predetermined value for reception processing of the input signal; If the signal level added and calculated based on the result of the determination is less than a predetermined value, the phase of the synchronization acquisition signal supplied from the synchronization acquisition signal generator is changed. Synchronization acquisition method of the receiving apparatus, characterized in that it and a control unit for.