JPH1065183A - Manufacture of thin-film transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable realizing an offset structure without much increasing the number of processes by forming a second insulating film on the side wall of a gate electrode, doping a silicon thin film by using the gate electrode and the second insulating film as masks, and forming source/drain regions. SOLUTION: Patterns 602, 603 of silicon thin films are formed on an insulating substrate 601 of glass or the like. A pattern 604 which is in contact with the upper sides of both of the patterns and connects them is formed. The entire body is covered with an gate-insulating film 605, on which a gate electrode 606 is formed. After an insulating film 507 is formed on the entire body, an insulating film 607 is left only on the side wall of the gate electrode 606 by anisotropic etching. Next, ion implantation is performed, and a source region 508 and a drain region 509 are formed in the self-aligning manner. At this time, the silicon thin film 607 left on the gate side wall is turned into a stopper, so that a transistor having an offset structure is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention particularly relates to a thin film transistor applied to an active matrix type liquid crystal display, an image sensor or a three-dimensional integrated circuit.

[0002]

2. Description of the Related Art An example of the structure of a conventional thin film transistor will be described with reference to FIG. This figure is a cross-sectional view of the structure in the channel direction. A source region 202 made of a silicon thin film such as polycrystalline silicon or amorphous silicon doped with an impurity serving as a donor or an acceptor is formed on an insulating substrate 201 such as glass, quartz, or sapphire. And a drain region 203 are formed. A channel region 204 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is provided in contact with the upper side of the source region end and the upper side of the drain region so as to connect the two. A source electrode 205 made of a metal, a transparent conductive film or the like is
, And the drain region 206 is also in contact with the drain region 203. A gate insulating film 207 made of an insulating film such as a silicon oxide film covers all of them,
A gate electrode 208 made of a metal, a transparent conductive film or the like is formed thereon.
Is in both the source region 202 and the drain region 203,
It is provided so that at least part of it is covered. The gate insulating film 207 also serves as an interlayer insulating film for maintaining the green color between the wirings.

[0003]

However, the above-mentioned prior art has the following problems.

FIG. 3 is a graph showing an example of the characteristics of the thin film transistor having the structure described with reference to FIG. 2. The horizontal axis represents the gate voltage VgS, and the vertical axis represents the logarithmic value of the drain current Id. Here, a current flowing between the source and the drain when the transistor is off is called an off current Ioff, and a current flowing between the source and the drain when the transistor is on is called an on current Ion. The characteristic that the on current is large or the off current is small, in other words, the on / off ratio Ion / Ioff
Is desirable. However, generally, when the on-current is increased, the off-current also tends to increase. This is a problem particularly in realizing a liquid crystal display with a built-in driver. That is, a transistor used for a pixel portion of a liquid crystal display is required to have a characteristic with a small off-current, whereas a transistor used for a peripheral circuit is required to have a characteristic with a large on-current in order to operate at high speed.

The present invention has been made to solve such a problem, and an object thereof is to provide an on / off ratio Ion / I.
An object of the present invention is to provide a thin film transistor having a large off characteristic.

[0006]

The thin film transistor of the present invention is characterized in that the gate electrode has a so-called offset structure which does not cover the source region and the drain region.

[0007]

As can be seen from the characteristics of the conventional thin film transistor shown in FIG. 3, the off current has a gate voltage dependency, more specifically, a gate-drain voltage dependency. The value becomes minimum around the gate voltage OV unless impurities are added to the channel portion for controlling the threshold. According to the structure of the thin film transistor of the present invention, since the gate electrode has a so-called offset structure that does not cover the source region and the drain region, there is an effect of effectively reducing the voltage between the gate and the drain when off. . Therefore, as shown in FIG. 4, the off-state current can maintain the off-state current value near the gate voltage OV of the conventional transistor as it is, and the off-state characteristics are greatly improved. On the other hand, the ON current is not so reduced as compared with the conventional transistor. This is because, in a thin film transistor, the extent to which the depletion layer extends is limited because the silicon layer in the channel portion is thin, and the inversion layer is easily formed, so that if the distance of the offset portion is optimized, the decrease in on-current can be suppressed. is there. As a result, it has become possible to provide a thin film transistor having a large ON / OFF ratio and excellent characteristics.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail based on embodiments.

FIG. 1 is an example of a sectional view showing a thin film transistor according to the present invention. A source region 102 and a drain region 103 made of a silicon thin film such as polycrystalline silicon or amorphous silicon to which an impurity serving as a donor or an acceptor is added are formed on an insulating substrate 101 such as glass, quartz, or sapphire. Polycrystalline silicon is in contact with the source region and the drain region and connects the two.
Alternatively, a channel region 104 made of a silicon thin film such as amorphous silicon is provided. A source electrode 105 made of a metal, a transparent conductive film or the like is in contact with the source region 102, and a drain electrode 106 is
It touches 03. The whole of them is covered with a gate insulating film 107 made of an insulating film such as a silicon oxide film, on which a gate electrode 108 made of a metal, a transparent conductive film, a polycrystalline silicon film or the like by adding impurities is formed. The drain region 103 is provided so as not to cover at least one of the drain regions 103. The gate insulating film 107 also serves as an interlayer insulating film for maintaining insulation between wirings.

(Other Embodiment 1 of the Invention) Such a thin film transistor can be realized by, for example, the following steps. FIG.
1 is an example of a process sectional view showing a process for realizing a thin film transistor according to the present invention. Patterns 502 and 50 made of a silicon thin film such as polycrystalline silicon or amorphous silicon on an insulating substrate 501 made of glass, quartz, sapphire or the like.
Form 3 A pattern 504 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is provided so as to be in contact with the upper side and to connect the two. Next, the entirety is covered with a gate insulating film 505 made of an insulating film such as a silicon oxide film, and a gate electrode 50 made of a metal, a transparent conductive film, a polycrystalline silicon film doped with impurities, etc. is formed thereon.
6 is formed. (Refer to FIG. 5A.) Subsequently, an insulating film 50 such as a silicon oxide film
7 and an impurity serving as a donor or an acceptor is added by ion implantation to form the source region 508 in a self-aligned manner.
And a drain region 509 are formed. At this time, the silicon oxide film 507 formed on the gate side wall is an effective thick film when viewed from the vertical direction, and serves as a stopper for ions to be implanted. Therefore, a transistor having an offset structure is formed. (Refer to FIG. 5B.) Thereafter, a source electrode 510 and a drain electrode 511 made of a metal, a transparent conductive film or the like are connected to a source region 508 and a drain region 509, respectively, according to a normal process, thereby completing a thin film transistor according to the present invention. . (See FIG. 5 (c)) (Other Embodiment 2 of the Invention) FIG. 6 is a process sectional view showing another embodiment of a process for realizing a thin film transistor according to the present invention. Patterns 602 and 603 made of a silicon thin film such as polycrystalline silicon or amorphous silicon are formed on an insulating substrate 601 such as glass, quartz, or sapphire. Polycrystalline silicon in contact with the upper side and connecting the two,
Alternatively, a pattern 604 made of a silicon thin film such as amorphous silicon is provided. Next, these are entirely covered with a gate insulating film 605 made of an insulating film such as a silicon oxide film, and a gate electrode 606 made of a metal, a transparent conductive film, a polycrystalline silicon film doped with impurities, etc. is formed thereon. (FIG. 6
(See (a).) Subsequently, an insulating film 60 such as a silicon oxide film is entirely formed.
After the formation of the insulating film 6, the insulating film 6 is formed by anisotropic etching.
07 is etched and left only on the side wall of the gate electrode 606. Next, an impurity serving as a donor or an acceptor is added by ion implantation to form a source region 608 and a drain region 609 in a self-aligned manner. It serves as a stopper, forming a transistor having an offset structure. (Refer to FIG. 6B.) Thereafter, a source electrode 610 and a drain electrode 611 made of a metal, a transparent conductive film and the like are connected to a source region 608 and a drain region 609, respectively, according to a normal process, thereby completing a thin film transistor according to the present invention. . (See FIG. 6 (c)) (Other Embodiment 3 of the Invention) FIG. 7 is also a process sectional view showing another embodiment of a process for realizing a thin film transistor according to the present invention.

Insulating substrate 7 of glass, quartz, sapphire, etc.
Patterns 702 and 703 made of a silicon thin film such as polycrystalline silicon and amorphous silicon are formed on the substrate 01. A pattern 704 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is provided so as to be in contact with the upper side and to connect the two. Next, a gate insulating film 705 composed entirely of an insulating film such as a silicon oxide film and a conductive film 706 serving as a gate electrode are sequentially formed. (FIG. 7 (a)
Next, a resist pattern 707 is formed on the conductive film 706 by using a light exposure technique, and the conductive film 70 is selectively and thinly formed using the resist pattern as a mask.
6 is etched to form a gate electrode 708. Subsequently, after an impurity serving as a donor or an acceptor is added by ion implantation to form the source region 709 and the drain region 710 in a self-aligned manner, the resist pattern 707 is formed.
Is removed. (Refer to FIG. 7B.) Thereafter, a source electrode 711 and a drain electrode 712 made of a metal, a transparent conductive film or the like are connected to a source region 709 and a drain region 710, respectively, according to a normal process, thereby completing a thin film transistor according to the present invention. . (See FIG. 7C) (Fourth Embodiment of the Invention) FIG. 8 is also a process sectional view showing another embodiment of a process for realizing the thin film transistor according to the present invention.

Insulating substrate 8 of glass, quartz, sapphire, etc.
Patterns 802 and 803 made of a silicon thin film such as polycrystalline silicon and amorphous silicon are formed on the substrate 01. A pattern 804 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is provided so as to be in contact with the upper side and to connect the two. Next, a gate insulating film 805 composed entirely of an insulating film such as a silicon oxide film and a conductive film 806 serving as a gate electrode are sequentially formed. (Refer to FIG. 8A.) Next, a resist pattern 807 is formed over the conductive film 806 by using a light exposure technique, and the conductive film 806 is selectively etched using the resist pattern as a mask to form a gate electrode 808. . Subsequently, an impurity serving as a donor or an acceptor is added by ion implantation, and the source region 809 is self-aligned.
After the formation of the drain region 810, the gate electrode 808 is etched so as to be thinner than the resist pattern 807. After that, the resist pattern 807 is removed. (Refer to FIG. 8 (b).) Thereafter, a source electrode 811 and a drain electrode 812 made of a metal, a transparent conductive film or the like are connected to a source region 809 and a drain region 810, respectively, according to a normal process, thereby completing a thin film transistor according to the present invention. I do. (Refer to FIG. 8 (c)) (Fifth Embodiment of the Invention) FIG. 9 is also a process sectional view showing another embodiment of a process for realizing a thin film transistor according to the present invention.

An insulating substrate 9 made of glass, quartz, sapphire, etc.
Patterns 902 and 903 made of a silicon thin film such as polycrystalline silicon and amorphous silicon are formed on the substrate 01. A pattern 904 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is provided so as to be in contact with the upper side and to connect the two. Next, a gate insulating film 905 made of an insulating film such as a silicon oxide film and a conductive film 906 serving as a gate electrode, for example, a film 907 such as a silicon oxide film are sequentially formed. (See FIG. 9A.) Next, a resist pattern 908 is formed on the silicon oxide film 907 by using a light exposure technique, and the silicon oxide film 907 is selectively etched using the resist pattern 908 as a mask. (FIG. 9
After that, the resist pattern 908 is removed. Subsequently, using the silicon oxide film 907 as a mask, the conductive film 9 is selectively and thinly formed with respect to the silicon oxide film pattern.
06 is etched to form a gate electrode 909. Subsequently, a source region 910 and a drain region 911 are formed in a self-aligned manner by adding an impurity serving as a donor or an acceptor by ion implantation. (Refer to FIG. 9 (c).) Thereafter, a source electrode 912 and a drain electrode 913 made of a metal, a transparent conductive film or the like are connected to a source region 910 and a drain region 911, respectively, according to a normal process, thereby completing a thin film transistor according to the present invention. . (Refer to FIG. 9D) (Other Embodiment 6 of the Invention) FIG. 10 is also a process sectional view showing another embodiment of a process for realizing the thin film transistor according to the present invention.

Insulating substrate 1 of glass, quartz, sapphire, etc.
Patterns 1002 and 1003 made of a silicon thin film such as polycrystalline silicon and amorphous silicon are formed on 001. A pattern 1004 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is provided so as to be in contact with the upper side and to connect the two. Next, a gate insulating film 100 made entirely of an insulating film such as a silicon oxide film.
5. A conductive film 1006 serving as a gate electrode, for example, a film 1007 such as a silicon oxide film is sequentially formed. (FIG. 10 (a)
Next, a resist pattern 1008 is formed on the silicon oxide film 1007 by using a light exposure technique, and the silicon oxide film 1007 is selectively etched using the resist pattern 1008 as a mask.
(Refer to FIG. 10B.) Thereafter, the resist pattern 1008 is removed. continue,
The gate electrode 1009 is formed by selectively etching the conductive film 1006 using the silicon oxide film 1007 as a mask. Subsequently, an impurity serving as a donor or an acceptor is added by ion implantation, and the source region 101 is self-aligned.
0 and a drain region 1011 are formed. Next, the gate electrode 1009 is etched so that the gate electrode 1009 is thinner than the silicon oxide film 1007. (FIG. 10
(Refer to (c).) Thereafter, a source electrode 1012 and a drain electrode 1013 made of a metal, a transparent conductive film or the like are connected to the source region 1010 and the drain region 1011 according to a normal process, respectively, thereby completing the thin film transistor according to the present invention. (Figure 1
(Refer to FIG. 0 (d)) (Other Embodiment 7 of the Invention) FIG. 11 is also a process sectional view showing another embodiment of a process for realizing a thin film transistor according to the present invention.

Insulating substrate 1 of glass, quartz, sapphire, etc.
Patterns 1102 and 1103 made of a silicon thin film such as polycrystalline silicon or amorphous silicon are formed on 101. A pattern 1104 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is provided so as to be in contact with the upper side and to connect the two. Next, the gate insulating film 110 is entirely formed of an insulating film such as a silicon oxide film.
5. A conductive film 1106 serving as a gate electrode is sequentially formed.
(See FIG. 11A.) Next, a resist pattern 1107 is formed over the conductive film 1106 by using a light exposure technique, and the conductive film 1106 is selectively etched using the resist pattern as a mask to form a gate electrode 1108. (Refer to FIG. 11B.) Thereafter, the resist pattern 1107 is removed. continue,
A source region 1109 and a drain region 1110 are formed in a self-aligned manner by adding an impurity serving as a donor or an acceptor by ion implantation. Next, the gate electrode 1108 is etched to be thin. (See FIG. 11 (c).) Thereafter, the source electrode 1111 and the drain electrode 1112 made of a metal, a transparent conductive film or the like are connected to the source region 1110 and the drain region 1111 respectively according to the usual process, thereby completing the thin film transistor according to the present invention. . (Figure 1
(Refer to 1 (d)) (Embodiment 8 of the Invention) FIG. 12 is also a process sectional view showing another embodiment of a process for realizing a thin film transistor according to the present invention.

Insulating substrate 1 of glass, quartz, sapphire, etc.
Patterns 1202 and 1203 made of a silicon thin film such as polycrystalline silicon and amorphous silicon are formed on 201. A pattern 1204 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is provided so as to be in contact with the upper side and to connect the two. Next, the gate insulating film 120 is formed entirely of an insulating film such as a silicon oxide film.
5. A conductive film 1206 serving as a gate electrode, for example, an insulating film 1207 such as a silicon oxide film is sequentially formed. (FIG. 12
Next, a resist pattern 1208 is formed on the silicon oxide film 1207 by using a light exposure technique, and the silicon oxide film 1207 is selectively etched using the resist pattern 1208 as a mask.
(See FIG. 12B.) Subsequently, the conductive film 1206 is selectively etched by using the silicon oxide film 1207 as a mask to form the gate electrode 1209.
Is formed, and then the resist pattern 1208 is removed. Subsequently, after an insulating film 1210 such as a silicon oxide film is formed on the whole, the silicon oxide film 1210 is etched by anisotropic etching to form a gate electrode 1210.
09 on the side wall. At this time, the gate electrode 1209 is covered with the silicon oxide films 1207 and 1210. Subsequently, an impurity serving as a donor or an acceptor is added by ion implantation to form a source region 1211 and a drain region 1212 in a self-aligned manner. (Refer to FIG. 12 (c).) Thereafter, a source electrode 1213 and a drain electrode 1214 made of a metal, a transparent conductive film or the like are connected to the source region 1211 and the drain region 1212, respectively, according to a normal process, thereby completing the thin film transistor according to the present invention. . (Figure 1
(Refer to FIG. 2 (d)) (Ninth Embodiment of the Invention) FIG. 13 is a process sectional view showing another embodiment of a process for realizing the thin film transistor according to the present invention.

Insulating substrate 1 of glass, quartz, sapphire, etc.
A pattern 1302 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is provided on 301. Next, the entire structure is covered with a gate insulating film 1303 made of an insulating film such as a silicon oxide film, and a gate electrode 13 made of a metal, a transparent conductive film, a polycrystalline silicon film doped with impurities, etc. is formed thereon.
04 is formed. (See FIG. 13A.) Subsequently, the insulating film 13 such as a silicon oxide film is entirely formed.
After the formation of the layer 05, the silicon oxide film 1305 and the gate insulating film 1303 are selectively etched to expose at least a part of the pattern 1302 made of a silicon thin film such as polycrystalline silicon or amorphous silicon. next,
A source 1306 and a drain 1307 made of, for example, an impurity-doped polycrystalline silicon film are formed by being connected to a pattern 1302 made of a silicon thin film such as polycrystalline silicon or amorphous silicon. (FIG. 13
(See (b).) Thereafter, a source electrode 1308 made of a metal, a transparent conductive film or the like and a drain electrode 1309 are connected to a source region 1306 and a drain region 1307, respectively, according to a normal process, thereby completing a thin film transistor according to the present invention. (Figure 1
(Refer to FIG. 3 (c)) (Other Embodiment 10 of the Invention) FIG. 14 is also a process sectional view showing another embodiment of a process for realizing a thin film transistor according to the present invention.

Insulating substrate 1 of glass, quartz, sapphire, etc.
Patterns 1402 and 1403 made of a silicon thin film such as polycrystalline silicon and amorphous silicon are formed on 401. A pattern 1404 made of a silicon thin film such as polycrystalline silicon or amorphous silicon is provided so as to be in contact with the upper side and to connect the two. Next, a gate insulating film 1405 made entirely of an insulating film such as a silicon oxide film.
, And a gate electrode 1406 made of a metal, a transparent conductive film, a polycrystalline silicon film doped with impurities, or the like is formed thereon. (See FIG. 14A.) Subsequently, the insulating film 14 such as a silicon oxide film is entirely formed.
Then, a resist pattern 1408 is formed thereon by using a light exposure technique, and using this as a mask, at least a part of the patterns 1402 and 1403 made of a silicon thin film such as polycrystalline silicon or amorphous silicon. A source region 1409 and a drain region 1410 are formed by adding an impurity serving as a donor or an acceptor by ion implantation. (Refer to FIG. 14B.) Thereafter, the resist pattern 1408 is removed.
411, the drain electrode 1412 is connected to the source region 1409 and the drain region 1410, respectively, to complete the thin film transistor according to the present invention. (Refer to FIG. 14 (c).) The embodiment for realizing the present invention has been described above. However, the present invention can be realized with materials other than the materials described here and does not depart from the scope of the claims. Although the embodiment has mainly been described with a structure in which the source and drain regions and the channel portion have different silicon film thicknesses, for example, as shown in FIG. 15, the source 1501, the drain 1502 region and the channel portion 1503 have the same silicon film thickness. The thin film transistor and the like do not depart from the gist of the present invention.

[0019]

As described above, according to the thin film transistor of the present invention, it is possible to dramatically reduce the off current without substantially reducing the on current. This is an epoch-making invention that opens the way to a large liquid crystal display with a built-in driver. In addition to this, significant performance improvement and cost reduction can be expected by replacing it with a conventional thin film transistor. For example, in a conventional liquid crystal display, the off-state current of a thin film transistor used in a pixel portion is large, and thus the reduction is measured by connecting the transistors in series. However, the use of the thin film transistor of the present invention eliminates the necessity. Thereby, the yield and the image quality are improved.

As described above, the present invention can be applied to all fields using a thin film transistor such as an image sensor and a liquid crystal display, and greatly contributes to improvement of performance and cost reduction.

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of a cross-sectional structure of a thin film transistor according to the present invention.

FIG. 2 is a diagram showing an example of a cross-sectional structure of a conventional thin film transistor.

FIG. 3 is a graph showing characteristics of a conventional thin film transistor.

FIG. 4 is a graph showing characteristics of a thin film transistor according to the present invention.

FIGS. 5A to 5C are process cross-sectional views showing an embodiment for realizing a thin film transistor according to the present invention.

6 (a) to 6 (c) are process sectional views showing an embodiment for realizing a thin film transistor according to the present invention.

FIGS. 7A to 7C are process cross-sectional views showing an embodiment for realizing a thin film transistor according to the present invention.

8 (a) to 8 (c) are cross-sectional views showing steps of an embodiment for realizing a thin film transistor according to the present invention.

FIGS. 9A to 9D are process cross-sectional views showing an embodiment for realizing a thin film transistor according to the present invention.

FIGS. 10A to 10D are process cross-sectional views showing an embodiment for realizing a thin film transistor according to the present invention.

FIGS. 11A to 11D are process cross-sectional views showing an embodiment for realizing the thin film transistor according to the present invention.

FIGS. 12A to 12D are process sectional views showing an embodiment for realizing a thin film transistor according to the present invention.

13 (a) to 13 (c) are process cross-sectional views showing an embodiment for realizing a thin film transistor according to the present invention.

14 (a) to (c) are process sectional views showing an embodiment for realizing the thin film transistor according to the present invention.

FIG. 15 illustrates an example of a cross-sectional structure of a thin film transistor.

[Explanation of symbols]

101, 201, 501, 601, 701, 801, 9
01, 1001, 1101, 1201, 1301, 14
01, 1508,..., Substrate 502, 503, 511, 602, 603, 604, 7
02, 703, 704, 802, 803, 804, 90
2, 903, 904, 1002, 1003, 1004,
1102, 1103, 1104, 1202, 1203,
1204, 1302, 1402, 1403, 1404
-Silicon pattern 1077, 207, 505, 605, 705, 805,
905, 1005, 1105, 1205, 1303, 1
405, 1505... Gate insulating film 707, 807, 908, 1008, 1107, 120
8, 1408... Resist pattern 706, 806, 906, 1006, 1106, 120
6 ... conductive film 507, 607, 907, 1007, 1207, 121
0, 1305, 1407 ... silicon oxide film 108, 208, 506, 606, 708, 808, 9
09, 1009, 1108, 1209, 1304, 14
06, 1504... Gate electrode 102, 202, 508, 608, 709, 809, 9
10, 1010, 1109, 1211, 1306, 14
09, 1501,..., Source region 103, 203, 509, 609, 710, 810, 9
11, 1011, 1110, 1212, 1307, 14
..,... Drain region 104, 204, 1503... Channel region 105, 205, 510, 610, 711, 811, 9
12, 1012, 1111, 1213, 1308, 14
11, 1506... Source electrode 106, 206, 511, 611, 712, 812, 9
13, 1013, 1112, 1214, 1309, 14
12, 1507 ... Drain electrode

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[Procedure amendment]

[Submission date] July 7, 1997

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Name of invention

[Correction method] Change

[Correction contents]

Patent application title: Method of manufacturing thin film transistor

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0001

[Correction method] Change

[Correction contents]

[0001]

The present invention particularly relates to a method for manufacturing a thin film transistor applied to an active matrix type liquid crystal display, an image sensor or a three-dimensional integrated circuit.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0006

[Correction method] Change

[Correction contents]

[0006]

According to a method of manufacturing a thin film transistor of the present invention, a step of forming a silicon thin film on a substrate, a step of forming a first insulating film serving as a gate insulating film on the silicon thin film, Forming a gate electrode on the first insulating film, forming a second insulating film on a side wall of the gate electrode, and adding an impurity to the silicon thin film using the gate electrode and the second insulating film as a mask And forming a source / drain region.

[Procedure amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0019

[Correction method] Change

[Correction contents]

[0019]

As described above, according to the method for manufacturing a thin film transistor of the present invention, a second insulating film is formed on the side wall of a gate electrode, and the silicon thin film is formed using the gate electrode and the second insulating film as a mask. An offset structure can be obtained by forming a source / drain region by adding an impurity. Therefore, an offset structure can be provided without increasing the number of steps so much.

[Procedure amendment 6]

[Document name to be amended] Drawing

[Correction target item name] FIG.

[Correction method] Change

[Correction contents]

FIG. 11

Claims (10)

[Claims] 1. A silicon thin film formed between a source region and a drain region comprising a silicon thin film to which an impurity serving as a donor or an acceptor is added, and between the source region and the drain region in contact with the source region and the drain region. A channel region comprising: a gate insulating film formed to cover the source region, the drain region, and the channel region; and a thin film transistor including a gate electrode provided on the gate insulating film.
The thin film transistor, wherein the gate electrode does not cover the source region and the drain region. 2. The thin film transistor according to claim 1, wherein said gate electrode does not cover one of said source region and said drain region. 3. The thin film transistor according to claim 1, wherein said gate electrode does not cover said drain region. 4. A step of selectively etching a silicon thin film to form an element region; a step of sequentially forming the gate insulating film and a conductive film to be the gate electrode on the silicon thin film; Selectively etching to form the gate electrode, and forming an insulating film on the gate electrode, and then adding a dopant serving as a donor or an acceptor to form the source region and the drain region in a self-aligned manner. 2. The method according to claim 1, further comprising the step of: 5. A step of selectively etching a silicon thin film to form an element region, a step of sequentially forming the gate insulating film and a conductive film serving as the gate electrode on the silicon thin film, Selectively etching to form the gate electrode; forming an insulating film on the gate electrode; and etching the insulating film formed on at least the gate electrode by anisotropic etching. 2. The method of manufacturing a thin film transistor according to claim 1, further comprising: a step of leaving only on a side wall of the electrode; and a step of adding an impurity serving as a donor or an acceptor to form the source region and the drain region in a self-aligned manner. . 6. A step of selectively etching a silicon thin film to form an element region, a step of sequentially forming the gate insulating film and a conductive film serving as the gate electrode on the silicon thin film, A step of forming the gate electrode selectively by using a pattern made of a mask material as a mask and thinning the pattern made of the mask material, and adding an impurity serving as a donor or an acceptor to perform self-alignment 2. The method according to claim 1, further comprising the step of forming the source region and the drain region. 7. A step of selectively etching a silicon thin film to form an element region, a step of sequentially forming the gate insulating film and a conductive film serving as the gate electrode on the silicon thin film, Selectively etching by using a pattern made of a mask material as a mask to form the gate electrode; and adding the impurity serving as a donor or an acceptor to form the source region and the drain region in a self-aligned manner. 2. The method according to claim 1, further comprising a step of narrowing the gate electrode with respect to the pattern made of the mask material. 8. A step of selectively etching a silicon thin film to form an element region, a step of sequentially forming the gate insulating film and a conductive film serving as the gate electrode on the silicon thin film, Selectively etching by using a pattern made of a mask material as a mask to form the gate electrode, removing the pattern made of the mask material, and adding a dopant serving as a donor or an acceptor in a self-aligned manner. The thin film transistor according to claim 1, further comprising a step of forming the source region and the drain region, and a step of narrowing the gate electrode. 9. A method of manufacturing a thin film transistor in which the gate electrode does not cover the source region and the drain region, wherein a silicon thin film is selectively etched to form an element region; Sequentially forming the gate insulating film, the conductive film to be the gate electrode, and the first insulating film, and selectively etching the first insulating film and the conductive film sequentially so that the insulating film is formed thereon. Forming the gate electrode having the above structure, forming a second insulating film on the gate electrode, etching at least the second insulating film by anisotropic etching, and forming only the side wall of the gate electrode. Forming a source and drain region by forming an impurity-doped silicon film serving as a donor or an acceptor in a part of the element region. The thin film transistor as claimed in claim 1, wherein it was characterized by including that step. 10. A method of manufacturing a thin film transistor in which the gate electrode does not cover the source region and the drain region, wherein a silicon thin film is selectively etched to form an element region; Sequentially forming the gate insulating film and a conductive film to be the gate electrode, selectively etching the conductive film to form the gate electrode, and forming the gate electrode over at least a channel region. 2. The method according to claim 1, further comprising the steps of: forming a mask pattern so as to cover; and forming the source region and the drain region by adding an impurity serving as a donor or an acceptor using the mask pattern as a mask. Thin film transistor.