JPH1048668A - Liquid crystal display device and its production - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the occurrence of defects by the crack and missing of insulating layers by forming the film thickness of first insulating films thinner than the other parts on gate electrodes and gate wirings and forming second insulating films covering these first insulating films. SOLUTION: This device is provided with the first insulating films 33a covering the gate electrodes 24a, additive capacitor counter electrodes 27 and the gate wirings 22. In such a case, the thickness d1 of the first insulating films 33a in the upper parts of the gate electrodes 24a, the additive capacitor counter electrodes 27 and the gate wirings 22 is formed smaller than the thickness d2 of the other parts. The entire surface of the substrate 31 is formed with the second insulating film 33b covering the first insulating films 33a. Further, a semiconductor layer 34 is formed on the second insulating film 33b so as to cover the gate electrodes 14a. A channel protective layer 35 is disposed on the channel regions 34a of the semiconductor layer 34 existing at the gate electrodes 32a. Source regions 34b and drain regions 34c are respectively formed on both sides of the channel regions 34a of the semiconductor layer 34.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to an active matrix type liquid crystal display device having a switching element such as a thin film transistor (hereinafter referred to as a TFT) and a method of manufacturing the same.

[0002]

2. Description of the Related Art Active matrix type liquid crystal display devices include a reflection type and a transmission type, and are used for displays such as computers and televisions. A conventional active matrix liquid crystal display device will be described using a transmission type liquid crystal display device as an example.

FIG. 7 is a schematic diagram showing the configuration of a conventional transmission type active matrix type liquid crystal display device 60. As shown in FIG. The active matrix substrate of the liquid crystal display device 60 includes a plurality of pixel capacitors 1 formed in a matrix and TFs as switching elements provided in each of the plurality of pixel capacitors 1.
T2. The pixel capacitor 1 includes a pixel electrode 1a formed on an active matrix substrate, a pixel counter electrode 1b provided on a counter substrate, and a liquid crystal layer sandwiched between the pixel electrode 1a and the pixel counter electrode 1b. Is done. The pixel electrode 1a is connected to the drain electrode of the TFT2. The gate electrode of the TFT 2 is connected to a gate line 3 as a scanning signal supply line, and the TFT 2 is selectively turned on by a gate signal input to the gate electrode. The source electrode of the TFT 2 is connected to the source line 4, and when the TFT 2 is selected, a data (display) signal is input to the pixel electrode 1 a via the TFT 2.
The gate lines 3 and the source lines 4 are provided so as to pass around the pixel electrodes 1a arranged in a matrix and intersect with each other. Further, the drain electrode of the TFT 2 is connected to the pixel electrode 1 a and one electrode (additional capacitance electrode) 5 a of the additional capacitance 5, and the other electrode (additional capacitance counter electrode) 5 b of this additional capacitance 5 is connected to the common wiring 6. And the same voltage (Vcom) as that of the pixel counter electrode 1b is applied.

FIG. 8 is a sectional view of a TFT portion of an active matrix substrate of a conventional liquid crystal display device 60. A gate electrode 12 (formed continuously with the gate wiring 3) is formed on a transparent insulating substrate 11, and a gate insulating film 13 is formed so as to cover the gate electrode 12. Further, a semiconductor layer 14 is formed thereon so as to cover the gate electrode 12, and a channel protection layer 15 is formed on a central portion of the semiconductor layer 14.

The channel protection layer 15 is formed of the gate insulating film 13
In addition, it is provided so as to face the gate electrode 12 with the semiconductor layer 14 interposed therebetween. A channel region 14a is formed below the channel protection layer 15 of the semiconductor layer 14, and a source region 14b and a drain region 14c are formed on both sides of the channel region 14a. Channel protective layer 15
, And a source electrode 16a and a drain electrode 16b made of microcrystalline n ⁺ Si are formed so as to cover the end portion of the source region 14b and the drain region 14c, respectively.

On the source electrode 16a, a metal layer 17a to be the source wiring 4 shown in FIG.
b, a metal layer 17b is formed.
The drain electrode 16b and the pixel electrode 1a are connected by 7b.

Further, an interlayer insulating film 18 is formed to cover the TFT 2, the gate wiring 3 and the source wiring 4. On the interlayer insulating film 18, a pixel electrode 1a made of a transparent conductive film is formed. The pixel electrode 1a is connected to the T electrode through a contact hole 19 penetrating the interlayer insulating film 18.
It is connected to the drain electrode 16b of FT2.

As described above, since the interlayer insulating film 18 is formed between the gate wiring 3 and the source wiring 4 and the pixel electrode 1a, the pixel electrode 1a can overlap each wiring. An active matrix type liquid crystal display device as described above is disclosed, for example, in Japanese Patent Publication No. 4-74714. By forming the pixel electrode 1a on the gate line 3 and the source line 4 via the interlayer insulating film 18, the aperture ratio of the liquid crystal display device can be improved, and the gate line 3 and the source line are formed by the pixel electrode. Since the electric field from the wiring 4 can be shielded, disclination caused by the influence of the electric field from the gate wiring 3 and the source wiring 4 on the alignment of the liquid crystal molecules can be suppressed.

The gate insulating film 13 or the interlayer insulating film 18
Conventionally, silicon nitride (SiN) or silicon oxide (SiN) is used in consideration of post-processes and various conditions (resistance to temperature and chemical treatment, adhesion of laminated films, insulation, withstand voltage, reliability, yield, etc.). A single-layer or multi-layer inorganic film made of SiO ₂ ) or the like has been formed to a thickness of about 300 to 600 nm.

The configuration using a single-layer inorganic film is disclosed in Japanese Patent Publication No. 4-74714 as described above. Also,
The configuration using a multilayer inorganic film is disclosed in Japanese Patent Publication No. 7-113729 and Japanese Patent Publication No. 6-91255.

[0011]

However, the prior art disclosed in the above-mentioned Japanese Patent Publication No. 4-74714 has the following problems.

The gate insulating film 13 or the interlayer insulating film 18
In the case where SiN _x , SiO _2, or the like is formed by a CVD method or a sputtering method, the surface shapes of the gate insulating film 13 and the interlayer insulating film 18 reflect steps (unevenness) of a base film forming these insulating films. I do. Residual stress generated in the insulating film in the film forming process increases (concentrates) near this step.
When the thickness of the gate insulating film 13 or the interlayer insulating film 18 is greater than 200 to 300 nm, cracks (A or B) are formed in the insulating film 13 or 18 near the step as shown in FIG. Enters.

As a result, the semiconductor layer 14 and the source wiring 4 (17a) formed on the insulating film 13 or 18 are disconnected together with the insulating film 13 or 18 to be disconnected, or the gate wiring 3 (12) in the lower layer is disconnected. Failures such as a short circuit with the source wiring 4 (17a) increase, and the yield decreases (several% to several tens).
% Decrease), cost increases, or reliability after production may become unstable. The above-described failure also occurs at a location where the source wiring 4 crosses the gate wiring 3 (not shown in FIG. 8).

Further, in the pixel electrode 1a formed on the interlayer insulating film 18, there is a problem that a surface step is formed near the step of the interlayer insulating film 18 to cause poor alignment of liquid crystal molecules.

In order to solve this problem, the pixel electrode 1a
When an organic film such as polyimide is formed by a coating method or the like in order to flatten a portion where a film is formed, a desired pattern is formed in comparison with the case where the inorganic film is formed using a thin film deposition technique. Requires a photolithography process, which increases the number of processes. Further, in order to simplify the manufacturing process, a method using a photosensitive polyimide film is also conceivable.However, the photosensitive polyimide film has a low light transmittance and is colored, so that it is used for a transmission type liquid crystal display device. In addition, there have been problems such as a decrease in display luminance and deterioration in reproducibility of display colors.

In particular, when an organic film such as polyimide is used as the gate insulating film 13, the gate insulating film is formed at an early stage of the manufacturing process and is affected by various post-processes performed thereafter. There is. It is difficult to form a minute contact hole, and the outer diameter of the contact hole increases, and the aperture ratio decreases. The upper limit of the temperature for forming the upper source wiring and the semiconductor layer is limited (high-temperature film formation is not possible). Variations in the etching rate of the source wiring and the semiconductor layer formed on the organic film become large, and it is difficult to find optimal manufacturing conditions. Depending on the conditions of the post-process, the adhesion of the organic film is reduced, the reliability is reduced, or a component mounted on the periphery of the panel (TAB
(Tape Automated Bonding), COG (Chip On Glass) driver or FPC (Flexible Printed Circuit Bo
When the ard) is reworked and replaced, the organic film peels off and is difficult to reuse.

Further, Japanese Patent Publication No. 7-117729 discloses a thin film transistor using a two-layer insulating film. The TFT disclosed in the above patent publication has a first insulating film in a region except on the gate electrode, and has a second insulating film so as to cover the gate electrode and the first insulating film. This configuration solves the problem of TFT characteristic degradation due to the fact that the surface in which the ITO layer serving as the pixel electrode is once formed and removed is present in the gate insulating film in the conventional configuration. However,
The above publication does not recognize the problem due to the step in the laminated structure of the thin film in the thin film transistor and the problem of the stress due to the film thickness. Further, there is no mention of a configuration for improving the aperture ratio.

In the embodiment disclosed in the above-mentioned publication, the thickness of the gate electrode is only 100 nm, so that the resistance of the gate wiring is high. Is difficult to use. Further, if the thickness of the gate electrode is 20
If the thickness is set to 0 to 300 nm and an insulating film having a thickness of 50 nm or more is formed after lamination as in the embodiment, the residual stress at the step portion or the like becomes extremely large.

Further, as shown in FIG. 1 of the above publication, the portion of the insulating film located slightly inside the side portion of the gate insulating film is completely removed, so that the step portion at the edge of the gate insulating film is removed. The problem of lack is not solved, and a new step is formed inside the gate insulating film (on the gate electrode).
Further, since the insulating film on the gate electrode is composed of only the second insulating film (single-layer structure), the signal transmittance is high, the parasitic capacitance is large at the intersection of the source wiring on the gate wiring, and the driving display of the panel is difficult. Have difficulty. Further, the pixel electrode could not be formed on (or near) the gate wiring, and the aperture ratio was low.
According to this configuration, although the yield is improved, since only one insulating layer exists between the pixel electrode and the gate electrode, a short circuit occurs between the two electrodes due to a remaining pattern of the pixel electrode or a pinhole of the insulating layer. Failure is likely to occur, and the yield is not sufficiently improved. Further, when the pixel electrode is configured to be close to or overlap with the gate electrode (or gate wiring) or the like in order to improve the aperture ratio, short-circuit failure increases, the yield decreases, and the cost increases significantly. became.

A two-layer gate insulating film disclosed in Japanese Patent Publication No. 6-91255 discloses a gate insulating film (T) formed by anodizing a gate electrode (Ta).
In order to solve the problem that a ₂ O ₅ ) is damaged in the step of depositing amorphous silicon on the gate insulating film and the insulating property is deteriorated, a second insulating film made of SiN or the like is formed on the anodic oxide film. Is formed by a CVD method or a sputtering method. This publication does not recognize the problem due to the step in the laminated structure of the thin film in the thin film transistor or the problem due to the stress due to the film thickness. Since the first insulating film of the two-layered gate insulating film disclosed in this publication is formed by anodizing the gate electrode, the surface shape of the first insulating film is the cross-sectional shape (step) of the gate electrode. Is reflected as it is, so that cracks are likely to occur in the second insulating film due to residual stress. Further, this publication does not mention any configuration for improving the aperture ratio.

The present invention has been made to solve the above-mentioned conventional problems, and provides an active matrix type liquid crystal display device having high reliability, high aperture ratio, and high display quality, and a method of manufacturing the same. The purpose is to:

[0022]

A liquid crystal display device according to the present invention has a gate wiring, a source wiring, and a switching element provided near an intersection of the gate wiring and the source wiring. Is a liquid crystal display device having a gate electrode connected to the gate wiring, a source electrode connected to the source wiring, and a drain electrode connected to a pixel electrode for applying a voltage to a liquid crystal layer, The gate wiring is covered with a first insulating film and a second insulating film formed on the first insulating film, and the thickness of the first insulating film on the gate wiring is different from that of the other region. The source electrode and the pixel electrode are formed on the second insulating film, which is thinner than the thickness of the first insulating film.

The gate electrode is covered with the first insulating film and the second insulating film, and the thickness of the first insulating film on the gate electrode and on the gate wiring is set to the other region. Is preferably smaller than the thickness of the first insulating film.

It is preferable that the first insulating film and the second insulating film are formed of an inorganic material.

It is preferable that the pixel electrode is formed so as to overlap at least a part of the gate wiring.

The surface of the first insulating film is preferably flat.

It is preferable that an interlayer insulating film made of an organic material is further provided on the switching element, the gate wiring and the source wiring, and the pixel electrode is formed on the interlayer insulating film.

Preferably, the pixel electrode is formed so that at least a part of the source line overlaps.

It is preferable that the interlayer insulating film is formed of a colorless and transparent organic resin, and the pixel electrode is formed of a transparent conductive material.

In one embodiment, the liquid crystal display device further includes a connection line connecting the pixel electrode and the drain electrode, and the interlayer insulating film is also formed on the connection line. The pixel electrode and the connection electrode are connected via a contact hole penetrating the interlayer insulating film.

The interlayer insulating film is preferably made of a positive photosensitive acrylic resin.

A method of manufacturing a liquid crystal display device according to the present invention includes a gate wiring, a source wiring, and a switching element provided near an intersection of the gate wiring and the source wiring.
The switching element has a gate electrode connected to the gate wiring, a source electrode connected to the source wiring, and a drain electrode connected to a pixel electrode for applying a voltage to a liquid crystal layer. Forming a first insulating film so as to cover the gate wiring after forming the gate wiring; and adjusting a thickness of the first insulating film on the gate wiring to a thickness of another portion. Including a step of making the thickness smaller than the thickness of the first insulating film, a step of forming a second insulating film on the first insulating film, and a step of forming the pixel electrode on the second insulating film. This achieves the above object.

After forming the gate electrode, forming the first insulating film so as to cover the gate electrode, and changing the thickness of the first insulating film over the gate electrode and the gate wiring to another value. And reducing the thickness of the first insulating film to a thickness smaller than that of the first insulating film.

It is preferable that the first insulating film and the second insulating film are formed using an inorganic material.

In one embodiment, on the gate wiring and / or
Alternatively, the step of making the thickness of the first insulating film on the gate wiring thinner than the thickness of the first insulating film in another portion includes forming a resin film on the first insulating film, And dry-etching at least a part of the first insulating film on the gate wiring and / or on the gate wiring.

The step of making the thickness of the first insulating film on the gate wiring and / or the thickness of the first insulating film on the gate wiring thinner than the thickness of the first insulating film in the other portion is performed on the flat surface of the first insulating film. May be exposed.

In one embodiment, the switching element
A step of forming an interlayer insulating film using a colorless and transparent organic material over the gate wiring and the source wiring, so that at least one of the gate wiring and the source wiring overlaps at least a part thereof; Forming the pixel electrode.

In one embodiment, the liquid crystal display device further has a connection line connecting the pixel electrode and the drain electrode, and the interlayer insulating film is formed also on the connection line. Forming a contact hole that reaches the connection wiring through the interlayer insulating film, and at least partially overlaps at least one of the gate wiring and the source wiring on the interlayer insulating film and in the contact hole. Forming the pixel electrode.

The colorless and transparent organic material is a positive photosensitive transparent acrylic resin, and the step of forming the contact hole includes a step of exposing and developing the positive photosensitive transparent acrylic resin. Is preferred.

The operation of the present invention will be described below.

In the liquid crystal display device of the present invention, the thickness of the first insulating film formed so as to cover the gate electrode and the gate wiring (scanning line) is smaller than that of the other part on the gate electrode and the gate wiring. Have been. Further, the second insulating film is covered with the second insulating film.
An insulating film is formed. As a result, the step on the first insulating film is relatively small, and cracks due to residual stress and the like generated in the first insulating film near the step due to the gate electrode and the gate wiring are covered by the second insulating film. Second
Semiconductor layer, source wiring (signal line) laminated on insulating film
And the pixel electrode and the like are prevented from causing defects (such as disconnection or short circuit) due to cracking or lack of the insulating layer due to cracking.

Further, since the first and second insulating films covering the gate wiring are formed sufficiently thick, even if the pixel electrode is formed so as to overlap or be close to the gate wiring, the gate wiring and the source wiring and the pixel are formed. Capacitive coupling with the electrode is suppressed, and the potential of the source wiring and the pixel electrode can be prevented from being affected by the voltage applied to the gate wiring. That is, the voltage applied to the gate wiring disturbs the alignment of the liquid crystal molecules in the pixel region and suppresses the generation of disclination lines.

When an inorganic material is used for the insulating film on the gate wiring, a thin film can be formed with higher precision than when an organic material is used. When a thin film is used, a contact hole or the like penetrating the film can be reduced, so that a wiring loss or the like can be reduced and a decrease in aperture ratio can be suppressed. Further, heat resistance is higher than that of an organic film, and a process of forming a semiconductor layer or a conductive film thereon is performed in 300 steps.
The method can be carried out at a high temperature of not less than ° C., the outgassing from the insulating film is small, and the variation in the etching of the semiconductor layer and the conductive film is small. Furthermore, since the adhesion strength to the substrate, the upper semiconductor layer, and the conductive film is higher than that of the organic film, the reliability is high and the replacement of peripheral mounting parts is easy.

Further, by forming an interlayer insulating film made of an organic material at least between the gate wiring and the source wiring and the pixel electrode, capacitive coupling between the gate wiring and the source wiring and the pixel electrode is further suppressed. be able to. This is because the dielectric constant of an organic substance is generally an inorganic substance (Si
This is because it is smaller than the dielectric constant of O ₂ or SiN). By providing an interlayer insulating film made of an organic material, a pixel electrode can be formed so as to overlap with not only a gate wiring but also a source wiring, and the aperture ratio can be further improved. Further, when a colorless and transparent material is used, there is no reduction in display luminance or display color reproducibility even when applied to a transmissive liquid crystal display device.

[0045]

Embodiments of the present invention will be described below.

(Embodiment 1) The active matrix substrate 200 of the transmission type liquid crystal display device according to Embodiment 1 of the present invention.
FIG. 1 shows a plan view of the configuration of one pixel portion of FIG.

On the active matrix substrate 200, a plurality of pixel electrodes 21 are provided in a matrix, and pass through these pixel electrodes 21 and intersect at right angles with the gate wiring 22 as a scanning signal supply line and the display signal. Source wiring 23 is provided as a supply line. Part of each of the gate wiring 22 and the source wiring 23 overlaps with the outer peripheral portion of the pixel electrode 21 via an insulating film.

A TFT 24 for switching a voltage applied to the pixel electrode 21 is provided in the vicinity of the intersection of the wirings 22 and 23. A gate wiring 22 is connected to the gate electrode 24a of the TFT 24, and switching of the TFT 24 is controlled by a signal input to the gate electrode 24a. The source wiring 24 is connected to the source electrode 24b of the TFT 24, and a data signal is input to the source electrode 24b of the TFT 24. TFT2
The fourth drain electrode 24c is connected to the pixel electrode 21 at the contact hole 26 via the connection wiring 25, and is connected to the additional capacitance electrode 25a via the connection wiring 25. The other electrode (additional capacitor counter electrode) 27 that forms the additional capacitor is connected as a common wiring over a plurality of pixels, and is further connected to the pixel counter electrode (see FIG. 7). This structure is generally referred to as “Cs-Com
mon "method.

FIG. 2 is a sectional view taken along the line CC 'of the active matrix substrate in the transmission type liquid crystal display device of FIG.
On the transparent insulating substrate 31, the gate electrode 24a connected to the gate wiring 22, the additional capacitance counter electrode 27, and the gate wiring 22 of the adjacent pixel are all formed in the same process using the same material. I have. In the present embodiment, these are formed using a metal material. A first insulating film 33a is provided to cover the gate electrode 24a, the additional capacitance counter electrode 27, and the gate wiring 22. The thickness (d1) of the first insulating film 33a on the gate electrode 24a, the additional capacitance counter electrode 27, and the gate wiring 22 is thinner (but not completely removed) than the thickness (d2) of the other portions. In addition, cracks D may be seen in the first insulating film 33a formed near the edges of the gate electrode 24a, the additional capacitance counter electrode 27, and the gate wiring 22. A second insulating film 33b is formed on the entire surface of the substrate 31 so as to cover the first insulating film 33a.
Since the step on the surface of the first insulating film 33a is about 100 nm or less, no crack occurs in the second insulating film 33b.

Further, a semiconductor layer 34 is provided on the second insulating film 33b so as to cover the gate electrode 24a, and a channel region 34 of the semiconductor layer 34 located at the gate electrode 32a.
The channel protection layer 35 is provided on “a”. On both sides of the channel region 34a of the semiconductor layer 34, the source region 34
b and the drain region 34c are formed respectively.
The microcrystalline n ⁺ S is formed so as to cover the end of the channel protective layer 35 and the source region 34b and the drain region 34c, respectively.
i and source electrode 36a and drain electrode 36b
Are formed.

A transparent conductive film 37a and a metal layer 37b are provided on the end of the source electrode 36a, and the source wiring 23 having a two-layer structure is formed. Also, the drain electrode 3
A transparent conductive film 37a 'and a metal layer 37b' are also formed on 6b. The transparent conductive film 37a '
And functions as an additional capacitance electrode 25a. Furthermore, TF
An interlayer insulating film 38 is provided to cover T24, the gate wiring 22, the source wiring 23, the connection wiring 25 and the like. A second transparent conductive film serving as the pixel electrode 21 is provided on the interlayer insulating film 38, and is connected to the additional capacitance electrode 25 a via the contact hole 26 penetrating the interlayer insulating film 38. Since the contact hole 26 is formed on the additional capacitance counter electrode 27 made of a metal film having a light shielding property, the additional capacitance counter electrode 27 is used as a light shielding layer for hiding the alignment disorder of the contact hole 26. Also works. Therefore, there is no need to separately form the above light-shielding layer,
The manufacturing process can be simplified, and a decrease in the aperture ratio can be suppressed. When a light shielding film is separately formed, it is necessary to consider a mask alignment margin, so that the size of the light shielding layer becomes large.

In this embodiment, the gate wiring 27 is 350
A three-layer structure of TaN / Ta / TaN having a thickness of about nm, a SiN _x film having a thickness of about 300 nm as the first insulating film 33a (about 10 nm to 100 nm thick on the gate wiring), and a 200 nm thickness as the second insulating film 33b. A positive photosensitive acrylic resin having a thickness of about 3 μm was used as the SiO ₂ film and the interlayer insulating film 38. As the positive photosensitive acrylic resin, for example, a material in which a naphthoquinonediazide positive photosensitive agent is mixed with a base polymer composed of a copolymer of methacrylic acid and glycidyl methacrylate is preferable.
Since this resin contains a glycidyl group, it can be cross-linked (cured) by heating. As the physical properties after curing, a dielectric constant of about 3.4 and a transmittance for light in a wavelength range of 400 nm to 800 nm of 90% or more are obtained. Also, i
By irradiating with ultraviolet rays (365 nm), decolorization can be performed in a short time. For patterning, i
Ultraviolet rays other than lines can be used.

The heat-resistant temperature of the photosensitive acrylic resin used in the present embodiment is generally 280 ° C.
By performing a process such as formation of a pixel electrode after formation of the interlayer insulating film under a temperature condition of 80 ° C. or less, deterioration of the interlayer insulating film can be suppressed.

Recently, acrylic resins and fluorine-based polyimide resins for TFT liquid crystal panels have been developed and are being marketed. These resins, compared to conventional acrylic resins,
It has high transmittance (colorless and transparent), high reliability (high heat resistance) and low dielectric constant, and is used in the present invention.

In this embodiment, since the interlayer insulating film is formed using a positive photosensitive acrylic resin, the positive photosensitive acrylic resin is exposed and developed using a mask having a desired pattern. Thereby, a contact hole can be easily formed. Further, the steps of applying and removing the photoresist after the exposure can be reduced, the number of steps is reduced, and the yield is improved.

The contact hole of the organic film is larger than that of the inorganic film. However, by forming the contact hole on the buried or light-shielding metal wiring, the orientation defect at the step can be hidden. In addition, a decrease in aperture ratio can be suppressed. Further, if a contact hole connected to the pixel electrode via the connection wiring is formed in the drain electrode, T
Even when the FT section becomes smaller, as described above, 8 to 1
A relatively large contact hole (outside diameter of about 5 to 5 μm) is formed on a light-shielding wiring such as an additional capacitance counter electrode having a width
(Several 10 μm, taper angle of about 0 to 60 degrees) can be formed, so that the aperture ratio does not decrease. When the taper angle is increased (a taper angle of 0 degree is perpendicular to the substrate), the outer diameter of the contact hole increases, but disconnection due to a step is prevented, and a reliable contact is obtained, thereby improving the yield.

When an organic film such as an acrylic photosensitive resin is used as the interlayer insulating film, a high-quality film having a low relative dielectric constant and high transparency can be obtained with high productivity as compared with a conventionally used inorganic film such as silicon nitride. As a result, even after various materials are formed in a multilayer, a thick film can be formed so as to be sufficiently flat and to reduce the signal transmittance between the pixel electrode and each wiring. When an acrylic photosensitive resin is used, an insulating film having a thickness of 1 to several μm can be obtained with high productivity by applying by a method such as spin coating or roll coating, and exposing and patterning, and the relative dielectric constant is also high. An insulating layer having low transparency and high reliability can be formed.
When the acrylic resin is colored (has low transparency), it can be easily made transparent by optical treatment such as irradiation with i-ray ultraviolet rays or chemical treatment after pattern formation.

In this embodiment, the additional capacitance counter electrode 27 is formed substantially at the center of the pixel electrode 21. By forming the additional capacitance counter electrode 27 at a sufficient distance from the gate wiring 21, short-circuit failure between the additional capacitance counter electrode 27 and the gate wiring 22 formed in the same layer as the additional capacitance counter electrode 27 is reduced, and the yield, reliability, and the like are reduced. Can be improved.

Second Embodiment In the first embodiment (FIGS. 1 and 2), the structure of the “Cs-Common” system has been described as an example. In the second embodiment, a pixel electrode is used as an additional capacitance counter electrode. A configuration using the adjacent gate wiring 22 will be described. This configuration is called a “Cs-on-Gate” scheme. The gate wiring adjacent to the pixel electrode may be a gate wiring connected to the TFT connected to the pixel electrode (own gate wiring) and / or a gate wiring corresponding to an adjacent pixel (previous or next gate wiring). ). Note that a pixel electrode facing a gate line functioning as an additional capacitance counter electrode functions as an additional capacitance electrode. FIG. 5 shows an equivalent circuit configuration diagram thereof. In FIG. 5, for the sake of simplicity, the gate wiring 2 of the next stage is used as an additional capacitance counter electrode of the additional capacitance 45.
The case where only 2 is used is shown.

FIG. 3 is a plan view showing the structure of one pixel portion of the active matrix substrate 300 of the transmission type liquid crystal display device according to the second embodiment. 1 and 2 are denoted by the same reference numerals, and description thereof will be omitted. As shown in FIG. 3, a part 21 a of the pixel electrode 21 is connected to the gate wiring 22 of the own stage and a part 21 a ′ of the pixel electrode 21.
Are superimposed on the previous (or next) gate wiring 22, respectively, to improve the aperture ratio. In order to increase the write voltage holding capacitance and form the additional capacitance, the pixel electrode 21
It is desirable to reduce the overlap with the gate wiring of the own stage and increase the overlap with the gate wiring of the previous or next stage. In this example, the pixel electrode 21 does not overlap with the source wiring 23. However, when an interlayer insulating film is formed of a low dielectric constant organic material or the like as in the first embodiment, the capacitance between the source wiring and the pixel electrode is reduced. Since the pixel electrode can be made smaller, the pixel electrode can be overlapped with the source wiring, and the aperture ratio can be further improved.

FIG. 4 is a sectional view taken along line EE ′ of the active matrix substrate 300 shown in FIG. As shown in FIG. 4, a part of the pixel electrode 21 is overlapped with a part of the next-stage gate wiring 22 to form an additional capacitance. Opposite gate line 22 and pixel electrode 21 and gate line 22 and pixel electrode 2
The first and second insulating films sandwiched between the first and second insulating films form an additional capacitance.

In this embodiment, no channel protective layer is formed on the central portion of the semiconductor layer 34. By omitting the channel protection layer, the cost is reduced by simplifying the manufacturing process and reducing the material cost.
Such a structure can be formed by utilizing the etching selectivity (difference in etching rate) between the microcrystalline n ⁺ Si layer serving as the source electrode 36a and the drain electrode 36b and the semiconductor layer 34. Further, the semiconductor layer 34
The source and drain regions may be formed by ion implantation using a photoresist as a mask.

In this embodiment, the source wiring 37
c, the drain wiring 37c 'and the pixel electrode 21 were formed in the same step using the same transparent conductive material, thereby simplifying the manufacturing process and reducing the cost. Low resistance ITO
This structure can be obtained by using (indium tin oxide). As a low-resistance ITO, for example,
The specific resistance disclosed in SID 96 DIGEST p.93 is about 40
ITO of 0 μΩ · cm or less can be used.

In the present embodiment, 25 is used as the gate wiring 22.
2-layer structure wiring 0nm thickness of about Ti / Al, 300 nm thick about the SiN _x film as the first insulating film 33c, but using the 150nm thickness of about the SiN _x film as the second insulating film 33d, these materials, film It is not limited to the thickness and the like.

A method for manufacturing the first insulating film 33c of the active matrix substrate 300 will be described with reference to FIGS.

A lower layer 22b made of Ti and an Al layer formed on the lower layer 22b are formed on an insulating substrate 31 having a base film formed on the entire surface.
Wiring 2 having a two-layer structure having upper layer 22a made of
2 is patterned by, for example, a photolithography method. When a glass substrate is used as the insulating substrate 31, the base film is formed to prevent diffusion of ions from the glass substrate and to improve adhesion, but may be omitted.

Next, a first insulating film 33c is formed on the entire surface of the substrate 31 so as to cover the gate wiring 22 by a CVD method or the like (FIG. 6A). Thereafter, a resin layer 39 is applied to the entire surface of the substrate 31 by spin coating or the like. If necessary, the resin layer 39
Is heated or irradiated with light. As a material of the resin layer 39,
For example, a positive photoresist can be used.
Since the resin layer 29 is formed by the spin coating method, the thickness of the resin layer 39a on the gate wiring 22 is formed smaller than other portions (FIG. 6B).

When the entire surface of the resin layer 39 is etched by dry etching, the resin layer 39a having a small thickness is first removed. As a result, the insulating film 33c below the resin layer 39a is exposed and removed before other portions of the insulating film 33c (FIG. 6C).

By etching back the resin layer 39 and the insulating layer 33c until the resin layer 39 is substantially removed, a flat surface of the insulating film 33c can be formed. At this time, the etching rates of the resin layer 39 and the insulating layer 33c are substantially the same. The exposed surface of the obtained insulating film 33c is substantially flat, and the thickness of the first insulating film 33c on the gate wiring 22 is smaller than other portions (FIG. 6D). . By using the dry etching method, the thickness of the insulating film can be accurately controlled.

The first insulating film 33a of the first embodiment shown in FIG. 2 can be formed by the same method. For example, after the step of FIG. 6C, before the resin layer 39 is completely removed by the etching, the etching is terminated, and the unnecessary resin layer 39 is separately removed, so that the first resin shown in FIG. The insulating film 33a can be formed. The thickness of the first insulating film 33a on the gate wiring 22 is smaller than other portions. First insulating film 3 on gate wiring 22
The thickness of 3a is preferably about 10 nm to about 100 nm,
The thickness is more preferably about 10 nm to about 50 nm, and is appropriately set depending on conditions such as the thickness of the first insulating film 33a and the second insulating film 33b, the dielectric constant, the yield of the process, and the reliability. Although the method for forming the insulating film on the gate wiring 22 has been described, the insulating film on the gate electrode can be formed in the same manner.
They can be formed in the same process.

Other steps for forming the active matrix substrate 300 can be performed using a known method.

As a result of observing the cross section of the active matrix substrate formed in the above embodiment using a scanning electron microscope, cracks were found in the first insulating film, but cracks were found in the second insulating film. I couldn't.

In the above embodiment, the present invention has been described with reference to a transmissive liquid crystal display device. However, the present invention is not limited to this, and can be applied to a reflective liquid crystal display device.

[0074]

According to the liquid crystal display device of the present invention, the thickness of the first insulating film formed so as to cover the gate electrode and the gate wiring is smaller than that of the other portion on the gate electrode and the gate wiring. In addition, a second insulating film is formed to cover the first insulating film. As a result, the step on the first insulating film is relatively small, and cracks due to residual stress and the like generated in the first insulating film near the step due to the gate electrode and the gate wiring are covered by the second insulating film. The semiconductor layer, the source wiring, the pixel electrode, and the like stacked on the second insulating film are
It is possible to prevent a defect (a disconnection, a short circuit, or the like) due to a crack or a lack of the insulating layer due to the crack. As a result, a liquid crystal display device with high yield, low cost, and high reliability is provided.

Further, since the first and second insulating films covering the gate wiring (scanning line) are formed sufficiently thick, even if the pixel electrode is formed so as to overlap or be close to the gate wiring, Provided is a liquid crystal display device in which capacitive coupling with a source wiring and a pixel electrode is suppressed, an aperture ratio is high, and there is no crosstalk. Further, by forming an interlayer insulating film made of an organic material at least between the gate wiring and the source wiring and the pixel electrode, capacitive coupling between the gate wiring and the source wiring and the pixel electrode is further suppressed, and the crosstalk is reduced. Can be prevented, the pixel electrode can be formed so as to overlap not only with the gate wiring but also with the source wiring, and the aperture ratio can be further improved. In addition, when a colorless and transparent material is used, there is no reduction in display luminance or display color reproducibility even when applied to a transmission type liquid crystal display device. Therefore, according to the present invention, there is provided a liquid crystal display device which is brighter or has lower power consumption (can reduce power consumption by the backlight) and higher display quality than the conventional one.

[Brief description of the drawings]

FIG. 1 is a plan view of a configuration of one pixel portion of an active matrix substrate 200 of a transmission type liquid crystal display device according to a first embodiment.

FIG. 2 is a cross-sectional view taken along the line CC ′ of the active matrix substrate in the transmission type liquid crystal display device of FIG.

FIG. 3 is a plan view of a configuration of one pixel portion of an active matrix substrate 300 of a transmission type liquid crystal display device according to a second embodiment.

FIG. 4 is a diagram showing E- of the active matrix substrate 300 of FIG.
It is E 'sectional drawing.

FIG. 5 is an equivalent circuit diagram of a Cs on-gate structure.

FIG. 6 is a diagram illustrating a method of manufacturing the first insulating film 33c of the active matrix substrate 300.

FIG. 7 is a schematic diagram showing a configuration (Cs common structure) of a conventional transmission type active matrix liquid crystal display device 60.

FIG. 8 is a sectional view of a TFT portion of an active matrix substrate of a conventional liquid crystal display device 60.

[Explanation of symbols]

 Reference Signs List 1 pixel capacitance 1a, 21 pixel electrode 1b pixel counter electrode 2, 24 TFT (switching element) 3, 22 gate wiring 4, 23 source wiring 5 additional capacitance 5a additional capacitance electrode 5b additional capacitance counter electrode 6 common wiring 11 transparent insulating substrate Reference Signs List 12 gate electrode 13 gate insulating film 14 semiconductor layer 14a channel region 14b source region 14c drain region 15 channel protective layer 16a source electrode 16b drain electrode 17a, 17b metal layer 18 interlayer insulating film 19 contact hole 24a gate electrode 24b source electrode 24c drain electrode Reference Signs List 25 connection wiring 25a additional capacitance electrode 26 contact hole 27 additional capacitance counter electrode 31 transparent insulating substrate 33a, 33c first insulating film 33b, 33d second insulating film 34 semiconductor layer 34a channel region 34b source region 34c drain region 35 the channel protective layer 36a source electrode 36b drain electrode 37a 'transparent conductive film 37b' metal layer 37c source wiring (transparent conductive film) 37c 'drain wiring (transparent conductive film) 38 interlayer insulating film 39 resin layer 45 additional capacitor

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Toshihiko Hirobe 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation

Claims (18)

[Claims] And a switching element provided near an intersection of the gate wiring and the source wiring, wherein the switching element has a gate electrode connected to the gate wiring, A liquid crystal display device comprising: a source electrode connected to the source line; and a drain electrode connected to a pixel electrode for applying a voltage to a liquid crystal layer, wherein the gate line includes a first insulating film and the first insulating film. A second insulating film formed on the first insulating film, a thickness of the first insulating film on the gate wiring is smaller than a thickness of the first insulating film in other regions, The liquid crystal display device, wherein the source electrode and the pixel electrode are formed on the second insulating film. 2. The gate electrode is covered with the first insulating film and the second insulating film, and the thickness of the first insulating film on the gate electrode and the gate wiring is other than that. 2. The liquid crystal display device according to claim 1, wherein the thickness of the first insulating film in the region is thinner. 3. The first insulating film and the second insulating film,
3. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is formed of an inorganic material. 4. The liquid crystal display device according to claim 1, wherein said pixel electrode is formed so as to overlap at least a part of said gate line. 5. The liquid crystal display device according to claim 1, wherein a surface of said first insulating film is flat. 6. The semiconductor device according to claim 1, further comprising an interlayer insulating film made of an organic material above the switching element, the gate wiring, and the source wiring, and wherein the pixel electrode is formed above the interlayer insulating film. 6. The liquid crystal display device according to any one of 1 to 5. 7. The liquid crystal display device according to claim 6, wherein the pixel electrode is formed such that at least a part of the source line overlaps. 8. The liquid crystal display device according to claim 6, wherein the interlayer insulating film is formed of a colorless and transparent organic resin, and the pixel electrode is formed of a transparent conductive material. 9. The liquid crystal display device further includes a connection line connecting the pixel electrode and the drain electrode, wherein the interlayer insulating film is also formed on the connection line. 9. The liquid crystal display device according to claim 6, wherein the connection electrode is connected to the connection electrode via a contact hole penetrating the interlayer insulating film. 10. The liquid crystal display device according to claim 6, wherein said interlayer insulating film is made of a positive photosensitive acrylic resin. 11. A gate wiring, a source wiring, and a switching element provided near an intersection of the gate wiring and the source wiring, wherein the switching element has a gate electrode connected to the gate wiring; A method for manufacturing a liquid crystal display device comprising: a source electrode connected to the source wiring; and a drain electrode connected to a pixel electrode for applying a voltage to a liquid crystal layer. Forming a first insulating film so as to cover the gate wiring; reducing the thickness of the first insulating film on the gate wiring to be smaller than the thickness of the first insulating film in another portion; A method for manufacturing a liquid crystal display device, comprising: forming a second insulating film on an insulating film; and forming the pixel electrode on the second insulating film. 12. A step of forming the first insulating film so as to cover the gate electrode after forming the gate electrode, and the step of reducing the thickness of the first insulating film on the gate electrode and the gate wiring. The method of manufacturing a liquid crystal display device according to claim 11, further comprising: a step of making the thickness of the first insulating film in another portion smaller than the thickness of the first insulating film. 13. The method according to claim 11, wherein the first insulating film and the second insulating film are formed using an inorganic material. 14. The thickness of the first insulating film on the gate wiring and / or on the gate electrode is changed to the first portion of another portion.
Forming the resin film on the first insulating film; and forming at least a part of the first insulating film on the resin film and the gate wiring and / or the gate electrode. 14. The method for manufacturing a liquid crystal display device according to claim 11, comprising a step of dry-etching. 15. The thickness of the first insulating film on the gate wiring and / or on the gate electrode may be different from the first insulating film in another portion.
The method for manufacturing a liquid crystal display device according to claim 11, wherein the step of making the thickness smaller than the thickness of the insulating film is a step of exposing a flat surface of the first insulating film. 16. A step of forming an interlayer insulating film using a colorless and transparent organic material on the switching element, the gate wiring, and the source wiring, wherein at least one of the gate wiring and the source wiring is formed. The method for manufacturing a liquid crystal display device according to claim 11, further comprising: forming the pixel electrode so that at least a part of the pixel electrode overlaps the pixel electrode. 17. The liquid crystal display device further includes a connection line connecting the pixel electrode and the drain electrode, wherein the interlayer insulating film is also formed on the connection line. Forming a contact hole through the film to reach the connection wiring; and at least one of the gate wiring and the source wiring on the interlayer insulating film and in the contact hole;
17. The method of manufacturing a liquid crystal display device according to claim 11, further comprising: forming the pixel electrode so that at least a part of the pixel electrode overlaps the pixel electrode. 18. The colorless and transparent organic material is a positive photosensitive transparent acrylic resin, and the step of forming the contact hole includes exposing and developing the positive photosensitive transparent acrylic resin. The method for manufacturing a liquid crystal display device according to claim 17, further comprising: