JPH10326900A - Diode for electric power - Google Patents
Diode for electric powerInfo
- Publication number
- JPH10326900A JPH10326900A JP9136253A JP13625397A JPH10326900A JP H10326900 A JPH10326900 A JP H10326900A JP 9136253 A JP9136253 A JP 9136253A JP 13625397 A JP13625397 A JP 13625397A JP H10326900 A JPH10326900 A JP H10326900A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- layer
- conductivity type
- anode layer
- power diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Electrodes Of Semiconductors (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、電力用整流素子に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power rectifier.
【0002】[0002]
【従来の技術】電力用半導体素子は、インバータを始め
様々な用途に利用されており、現在でも、より高耐圧か
つ大容量の用途に適用範囲を拡大しつつある。近年、絶
縁ゲートバイポーラトランジスタなど、高耐圧、大容
量、かつ高周波で動作可能なスイッチング素子が開発さ
れており、それに伴い、電力用ダイオードにおいても高
周波数動作が可能な高速リカバリー特性が要求されてい
る。2. Description of the Related Art Power semiconductor devices are used in various applications such as inverters, and even now, the range of applications for applications with higher breakdown voltage and higher capacity is expanding. In recent years, switching elements, such as insulated gate bipolar transistors, which can operate at a high withstand voltage, a large capacity, and at a high frequency have been developed, and accordingly, high-speed recovery characteristics that enable a power diode to operate at a high frequency have been required. .
【0003】このような背景において、 特に高速逆回
復特性を目指して、MPS(MergedP-I-N Schottky )
ダイオードやSFD(Soft and Fast recovery Diode)
といった新しい構造のダイオードも各種報告されてお
り、電力用ダイオードの特性改善が進められている。最
も広く用いられている電力用ダイオードの代表例の一つ
としてpinダイオードがある。図4にpinダイオー
ドの部分断面図を示す。In such a background, an MPS (Merged P-IN Schottky) has been developed with a view to achieving a particularly fast reverse recovery characteristic.
Diode and SFD (Soft and Fast recovery Diode)
Various types of diodes having such a new structure have been reported, and improvements in the characteristics of power diodes have been promoted. One of the most widely used examples of power diodes is a pin diode. FIG. 4 shows a partial sectional view of the pin diode.
【0004】高比抵抗のnドリフト層(i層と呼ぶこと
もある)5の一方の側にpアノード層4が形成されてお
り、その表面にアノード電極1が接触している。nドリ
フト層5の他方の側にはn+ カソード層6が形成されて
おり、その表面にはカソード電極2が接触している。こ
のpinダイオードの逆回復特性を改善するために、現
在では電子線照射などを用いた少数キャリアのライフタ
イム制御が行われている。A p anode layer 4 is formed on one side of an n drift layer (also called i layer) 5 having a high specific resistance, and the anode electrode 1 is in contact with the surface thereof. An n + cathode layer 6 is formed on the other side of n drift layer 5, and its surface is in contact with cathode electrode 2. In order to improve the reverse recovery characteristic of the pin diode, a minority carrier lifetime control using electron beam irradiation or the like is currently performed.
【0005】[0005]
【発明が解決しようとする課題】従来、インバータなど
の実機にフリーホイールダイオード(FWD)としてp
inダイオードが使用されているが、負荷短絡など発生
した際に、そのFWDに例えば1000A/cm2 以上
といった非常に大きな電流が流れることがある。このと
きダイオードの温度が上昇し、さらに真性キャリア密度
が注入キャリア密度より大きくなると、ダイオードは負
性抵抗を示し、破壊や劣化が生じる[ 例えば、Silber,
D.and Robertson,M.J.,Solid State Electron. 16, p.1
337 (1973)参照] 。そのような場合におけるダイオード
のサージ電流耐量を向上させるには、pアノード層4の
不純物濃度を増大させ、pアノード層4からの注入キャ
リアを多くすることで対応できる。しかし、そうする
と、逆に通常の逆回復特性は悪くなる。このように、サ
ージ電流耐量と逆回復特性との間には、トレードオフ関
係がある。従って、pinダイオードの構造のみでは、
両者の特性を同時に向上させることはできなかった。Conventionally, a freewheeling diode (FWD) has been used in an actual device such as an inverter.
Although an in-diode is used, when a load short circuit or the like occurs, a very large current, for example, 1000 A / cm 2 or more may flow through the FWD. At this time, when the temperature of the diode rises and the intrinsic carrier density becomes higher than the injected carrier density, the diode exhibits a negative resistance, which causes destruction or deterioration [for example, Silver,
D. and Robertson, MJ, Solid State Electron. 16, p. 1
337 (1973)]. In such a case, the surge current withstand capability of the diode can be improved by increasing the impurity concentration of the p anode layer 4 and increasing the number of carriers injected from the p anode layer 4. However, if it does so, the normal reverse recovery characteristic will worsen. Thus, there is a trade-off between the surge current withstand capability and the reverse recovery characteristic. Therefore, only with the structure of the pin diode,
Both properties could not be improved simultaneously.
【0006】電気鉄道用インバータなど、大容量でしか
も高い周波数での動作が必要な用途へのダイオードの適
用では、大電流が流れる場合に対する高いサージ電流耐
量のみならず、高速な逆回復特性も要求される。そし
て、今後、両者を同時に満たす新しい電力用ダイオード
の開発は、その重要度が増すと考えられる。先に発明者
らは、特許願平8−132466において、pinダイ
オードと並列にサイリスタを配置することにより、高い
サージ電流耐量と良好な逆回復特性との両立を可能にし
た。しかしながら、その発明では、サージ電流耐量の向
上は目ざましいものがあったが、逆回復特性の向上につ
いては満足できるものとは言えなかった。[0006] Application of diodes to applications requiring large capacity and high frequency operation, such as inverters for electric railways, requires not only high surge current resistance against a large current flow but also high-speed reverse recovery characteristics. Is done. In the future, the development of a new power diode that satisfies both at the same time will be more important. The inventors have previously disclosed in Japanese Patent Application No. 8-132466 that a thyristor is arranged in parallel with a pin diode, thereby achieving both high surge current resistance and good reverse recovery characteristics. However, according to the invention, although the surge current withstand capability was remarkably improved, the improvement of the reverse recovery characteristic was not satisfactory.
【0007】以上の問題に鑑み本発明の目的は、上記二
つの要求すなわち、大きいサージ電流耐量と高速な逆回
復特性との両方を兼ね備えた電力用ダイオードを提供す
ることにある。In view of the above problems, it is an object of the present invention to provide a power diode having both of the above two requirements, that is, both a large surge current resistance and a high-speed reverse recovery characteristic.
【0008】[0008]
【課題を解決するための手段】上記課題解決のため本発
明は、第一導電型カソード層、その第一導電型カソード
層より低不純物濃度の第一導電型ドリフト層、第二導電
型アノード層のいずれも半導体の三層をこの順に積み重
ね、第二導電型アノード層の表面に接するアノード電極
と、第一導電型カソード層の裏面に接するカソード電極
とを有する電力用ダイオードにおいて、第二導電型アノ
ード層の表面上の一部に絶縁膜が形成され、その絶縁膜
が形成されない第二導電型アノード層の表面に前記アノ
ード電極が接するものとする。以下の記述では、すべて
第一導電型をn型、第二導電型をp型とするが、これを
逆にすることもできる。In order to solve the above problems, the present invention provides a first conductive type cathode layer, a first conductive type drift layer having a lower impurity concentration than the first conductive type cathode layer, and a second conductive type anode layer. In any of the above, three layers of semiconductors are stacked in this order, and in a power diode having an anode electrode in contact with the surface of the anode layer of the second conductivity type and a cathode electrode in contact with the back surface of the cathode layer of the first conductivity type, An insulating film is formed on a part of the surface of the anode layer, and the anode electrode is in contact with the surface of the second conductive type anode layer where the insulating film is not formed. In the following description, the first conductivity type is assumed to be n-type and the second conductivity type is assumed to be p-type, but this can be reversed.
【0009】そのような電力用ダイオードにおいて、ア
ノード電極に順方向のバイアスを加えると、第二導電型
アノード層から第一導電型ドリフト層に正孔が注入さ
れ、一方、第一導電型カソード層から第一導電型ドリフ
ト層を通じて第二導電型アノード層に電子が注入され
る。順バイアスを大きくして電流密度を増加させると、
伝導度変調により第一導電型ドリフト層のキャリア密度
が増加する。表面にある絶縁膜の下方の第二導電型アノ
ード層内部では、絶縁膜のない部分に比べて、電子濃度
が増加する。これは、以下の理由によると考えられる。
絶縁膜の形成部分では、半導体内の少数キャリア(第二
導電型アノード層内では電子)が絶縁膜にせき止められ
るような効果が生じる。このため、高注入状態になるほ
ど、絶縁膜近傍の第二導電型アノード層内の電子濃度が
増加する。さらに、中性条件を満たすように第一導電型
ドリフト層内の正孔濃度も増加する。従って、第二導電
型アノード層の表面の一部に絶縁膜を形成した場合、通
常の絶縁膜がなくてアノード電極が接触する場合に比べ
て、順方向電流が大きいほど順電圧の増加率が小さくな
る。In such a power diode, when a forward bias is applied to the anode electrode, holes are injected from the second conductivity type anode layer into the first conductivity type drift layer, while the first conductivity type cathode layer is Then, electrons are injected into the second conductivity type anode layer through the first conductivity type drift layer. By increasing the forward bias and increasing the current density,
The carrier density of the first conductivity type drift layer is increased by the conductivity modulation. In the second conductive type anode layer below the insulating film on the surface, the electron concentration increases as compared with the portion without the insulating film. This is considered for the following reason.
In the portion where the insulating film is formed, an effect is produced such that minority carriers in the semiconductor (electrons in the second conductivity type anode layer) are blocked by the insulating film. Therefore, the higher the injection state, the higher the electron concentration in the second conductivity type anode layer near the insulating film. Further, the hole concentration in the first conductivity type drift layer also increases so as to satisfy the neutral condition. Therefore, when an insulating film is formed on a part of the surface of the second conductivity type anode layer, the forward voltage increases at a higher forward current as compared with a case where the anode electrode is in contact without a normal insulating film. Become smaller.
【0010】ストライプ状またはドット状とした複数の
絶縁膜を均等に配置すると良い。そのようにすれば、高
注入状態の点が多数生じ、しかも電流が均等に分散され
る。また、第二導電型アノード層の一部に第二導電型ア
ノード層よりも高濃度の第二導電型ソース領域が形成さ
れ、その第二導電型ソース領域の表面上の一部に絶縁膜
が形成され、その絶縁膜が形成されない第二導電型ソー
ス領域および第二導電型アノード層の表面に前記アノー
ド電極が接するものとしても良い。Preferably, a plurality of striped or dot-shaped insulating films are evenly arranged. By doing so, many points of high injection state occur, and the current is evenly distributed. In addition, a second conductive type source region having a higher concentration than the second conductive type anode layer is formed in a part of the second conductive type anode layer, and an insulating film is formed on a part of the surface of the second conductive type source region. The anode electrode may be in contact with the surface of the formed second conductive type source region and the second conductive type anode layer where the insulating film is not formed.
【0011】そのようにすれば、第二導電型アノード層
は低濃度であるので、通常の定格電流密度(〜100A
/cm2 )では、正孔ルの注入が抑制され、通常のpi
nダイオードよりも逆回復特性が向上する。一方、サー
ジ電流領域では前述のように、絶縁膜の形成部分におい
て、第二導電型アノード層よりも高濃度の第二導電型ソ
ース領域から、多数の正孔が第一導電型ドリフト層に注
入され、逆に多数の電子が第一導電型ドリフト層から第
二導電型アノード層に注入されて、キャリヤ濃度が増大
する。In this case, since the second conductive type anode layer has a low concentration, it has a normal rated current density (up to 100 A).
/ Cm 2 ), the injection of holes is suppressed and the normal pi
The reverse recovery characteristic is improved as compared with the n diode. On the other hand, in the surge current region, as described above, a large number of holes are injected into the first conductivity type drift layer from the second conductivity type source region having a higher concentration than the second conductivity type anode layer in the portion where the insulating film is formed. Conversely, many electrons are injected from the first conductivity type drift layer into the second conductivity type anode layer, and the carrier concentration increases.
【0012】特に、第二導電型アノード層の拡散深さ
が、第二導電型ソース領域のそれより大きいものとす
る。そのようにすれば、第二導電型アノード層と第一導
電型ドリフト層間のpn接合に屈曲部が無いので、高耐
圧素子に適する。また、第二導電型アノード層の拡散深
さが、第二導電型ソース領域のそれより小さいものとす
ることもできる。In particular, the diffusion depth of the anode layer of the second conductivity type is larger than that of the source region of the second conductivity type. By doing so, the pn junction between the second-conductivity-type anode layer and the first-conductivity-type drift layer has no bent portion, and thus is suitable for a high breakdown voltage element. Further, the diffusion depth of the second conductivity type anode layer may be smaller than that of the second conductivity type source region.
【0013】そのようにすれば、第二導電型アノード層
の不純物総量が少なく、第一導電型ドリフト層に注入さ
れるキャリアが減少し、逆回復特性が改善される。ソー
ス層および絶縁膜を複数個、均等に配置されているもの
とする。さらにこれらがドット状、ストライプ状である
ものとする。このようにすることで、電流の分布が均一
で電流集中等がなく、特性が安定する。In this case, the total amount of impurities in the anode layer of the second conductivity type is small, carriers injected into the drift layer of the first conductivity type are reduced, and the reverse recovery characteristic is improved. It is assumed that a plurality of source layers and insulating films are evenly arranged. Further, it is assumed that these are in the form of dots and stripes. By doing so, the current distribution is uniform, there is no current concentration, and the characteristics are stable.
【0014】絶縁膜が酸化膜であるものとする。酸化膜
であれば、素子形成プロセスにおいて容易に得ることが
できる。It is assumed that the insulating film is an oxide film. An oxide film can be easily obtained in an element forming process.
【0015】[0015]
【発明の実施の形態】以下図面を参照しながら本発明の
実施例の電力用ダイオードについて説明する。以下の記
述で、n、pを冠した層、領域等はそれぞれ電子、正孔
を多数キャリアとする層、領域等を意味するものであ
る。また、すべて第一導電型をn型、第二導電型をp型
とするが、これを逆にすることもできる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A power diode according to an embodiment of the present invention will be described below with reference to the drawings. In the following description, layers, regions, and the like bearing n and p mean layers, regions, and the like, each having electrons and holes as majority carriers. In addition, the first conductivity type is all n-type and the second conductivity type is p-type, but this can be reversed.
【0016】[実施例1]図1は、本発明第一の実施例
の電力用ダイオードのチップ中央付近の単位部分の部分
断面図である。電力用ダイオードの主要部分は、多数の
図のような単位部分が繰り返されており、またチップの
周辺部分には、耐圧部として、ガードリング構造が形成
されているが、本発明の本質に係わる部分ではないので
省略している。FIG. 1 is a partial cross-sectional view of a unit portion near the center of a chip of a power diode according to a first embodiment of the present invention. The main part of the power diode is formed by repeating unit parts as shown in many figures, and a guard ring structure is formed in a peripheral part of the chip as a withstand voltage part, which is related to the essence of the present invention. It is omitted because it is not a part.
【0017】高比抵抗のnドリフト層(i層とも呼ぶ)
5の一方の側にpアノード層4が拡散により形成されて
おり、pアノード層4側のの表面上の一部には、絶縁膜
3が形成され、pアノード層4の絶縁膜3が形成されて
いない表面上に接触してアノード電極1が設けられてい
る。nドリフト層5の他方の側には、n+ カソード層6
が拡散により形成されており、n+ カソード層6のnド
リフト層5と反対側の表面上には、カソード電極2が設
けられている。図4の従来のpinダイオードと違って
いるのは、pアノード層4の表面上にpアノード層4よ
りも高濃度のp + ソース領域7が形成されており、その
p+ ソース領域7の表面に絶縁膜3が形成されている点
である。p+ ソース領域7および絶縁膜3は、平面図で
はストライプ状をなしている。図では、アノード電極1
が絶縁膜3上に延長されているが、必ずしもこのように
延長しなければならないわけではない。A high resistivity n drift layer (also called i layer)
5 is formed on one side of p anode layer 4 by diffusion.
An insulating film is provided on a part of the surface on the side of the p anode layer 4.
3 is formed, and the insulating film 3 of the p anode layer 4 is formed.
The anode electrode 1 is provided in contact with the surface
You. On the other side of the n drift layer 5, n+Cathode layer 6
Are formed by diffusion, and n+N-doped cathode layer 6
The cathode electrode 2 is provided on the surface opposite to the lift layer 5.
Have been killed. Unlike the conventional pin diode of FIG.
The p anode layer 4 is located on the surface of the p anode layer 4.
High concentration of p +A source region 7 is formed,
p+The point that the insulating film 3 is formed on the surface of the source region 7
It is. p+Source region 7 and insulating film 3 are shown in plan view.
Has a stripe shape. In the figure, the anode electrode 1
Is extended on the insulating film 3, but not necessarily
You don't have to extend it.
【0018】本発明の電力用整流素子は、通常のpin
ダイオードと同様の製造方法によりpアノード層4、n
ドリフト層5、n+ カソード層6からなる三層構造を作
製し、pアノード層4の表面層に選択的にp+ ソース領
域7を形成した後に、通常のプロセスにて得られる熱酸
化膜、CVD酸化膜などの絶縁膜3をフォトリソグラフ
ィにより部分的に残し、その上およびn+ カソード層6
の裏面に金属膜をスパッタまたは蒸着し、アノード電極
1、カソード電極2として製造される。なお、ライフタ
イム制御を、電子線照射でおこなっている。場合によっ
ては、絶縁膜3の形成を三層構造の作製前におこなって
も良い。The power rectifying element of the present invention is a conventional pin rectifier.
The p anode layer 4, n
After forming a three-layer structure including the drift layer 5 and the n + cathode layer 6 and selectively forming the p + source region 7 on the surface layer of the p anode layer 4, a thermal oxide film obtained by a normal process; the insulating film 3 such as a CVD oxide film partially leaving by photolithography, the upper and the n + cathode layer 6
A metal film is sputtered or vapor-deposited on the back surface of the substrate to produce an anode electrode 1 and a cathode electrode 2. The lifetime control is performed by electron beam irradiation. In some cases, the insulating film 3 may be formed before the formation of the three-layer structure.
【0019】この例では、例えばpアノード層4形成の
ためのほう素イオン注入量を少なくして、pアノード層
4の表面濃度を、従来のpinダイオードの場合よりも
約1桁小さくする。但し、p+ ソース領域7について
は、従来のpinダイオードの表面不純物濃度と同程度
にするか或いは数倍大きくするとよい。各層の不純物濃
度あるいは表面不純物濃度、厚さあるいは接合深さは、
例えば次のような値である。n+ カソード層:1×10
20/cm3 、80μm、nドリフト層:3×10 13/c
m3 、320μm、pアノード層:1×1015/cm
3 、6μm、p+ ソース領域7:7×1016/cm3 、
3.4μm、幅、11.4μm、酸化膜幅:6μm、膜
厚:0.5μm、酸化膜の形成されていない領域の幅:
9μm。In this example, for example, the p-anode layer 4 is formed.
The amount of boron ion implantation for p-anode layer
4 is higher than that of the conventional pin diode.
Reduce by about one digit. Where p+About source area 7
Is about the same as the surface impurity concentration of a conventional pin diode.
Or several times larger. Impurity concentration of each layer
Degree or surface impurity concentration, thickness or junction depth
For example, the values are as follows. n+Cathode layer: 1 × 10
20/ CmThree , 80 μm, n drift layer: 3 × 10 13/ C
mThree , 320 μm, p anode layer: 1 × 10Fifteen/ Cm
Three , 6 μm, p+Source area 7: 7 × 1016/ CmThree,
3.4 μm, width, 11.4 μm, oxide film width: 6 μm, film
Thickness: 0.5 μm, width of region where oxide film is not formed:
9 μm.
【0020】図5は、本発明による実施例1の電力用ダ
イオード(A)の順方向特性図である。比較例として、
半導体基板の構成は実施例1と同じで、表面上の絶縁膜
3が無い比較ダイオード(B)および従来のpinダイ
オード(C)の順方向特性をも記載してある。pinダ
イオード(C)のpアノード層4の表面不純物濃度は3
×1016/cm3 、接合深さは3.4μmとした。ライ
フタイム制御は電子線照射でおこなった。電力用ダイオ
ード(A)、比較ダイオード(B)、pinダイオード
(C)ともに耐圧は3000Vを越えている。通常定格
電流として使用される100A/cm2 で順電圧を比較
した場合、pinダイオード(C)の順電圧が2.9V
であるのに比べて、電力用ダイオード(A)および比較
ダイオード(B)は、3.1〜3.2Vとあまり差がな
い。FIG. 5 is a forward characteristic diagram of the power diode (A) according to the first embodiment of the present invention. As a comparative example,
The configuration of the semiconductor substrate is the same as that of the first embodiment, and the forward characteristics of the comparative diode (B) without the insulating film 3 on the surface and the conventional pin diode (C) are also described. The surface impurity concentration of the p anode layer 4 of the pin diode (C) is 3
× 10 16 / cm 3 , and the junction depth was 3.4 μm. Lifetime control was performed by electron beam irradiation. The breakdown voltage of the power diode (A), the comparison diode (B), and the pin diode (C) exceeds 3000 V. When the forward voltage is compared at 100 A / cm 2 which is usually used as a rated current, the forward voltage of the pin diode (C) is 2.9 V
However, the power diode (A) and the comparison diode (B) are not much different from 3.1 to 3.2 V.
【0021】一方図5において、サージ電流領域である
1000A/cm2 以上で順電圧を比較すると、比較ダ
イオード(B)の9.6V、pinダイオード(C)の
9.1Vに比べて電力用ダイオード(A)では、8.9
Vとオン電圧が低下している。したがってサージ電流通
電時の発熱が低減され、真性キャリア濃度の増加が抑え
られるので、サージ電流耐量が向上する。On the other hand, in FIG. 5, when the forward voltage is compared in the surge current region of 1000 A / cm 2 or more, the power diode is compared with 9.6 V of the comparison diode (B) and 9.1 V of the pin diode (C). In (A), 8.9
V and the on-state voltage have decreased. Therefore, heat generation during surge current application is reduced, and an increase in intrinsic carrier concentration is suppressed, so that surge current withstand capability is improved.
【0022】これは、前項において述べたように、酸化
膜を形成した電力用ダイオード(A)では、絶縁膜3の
形成領域で、半導体表層の少数キャリア(pアノード層
4内では電子)が絶縁膜にせき止められるような効果が
生じ、高注入状態になるほど、絶縁膜近傍のpアノード
層4内の電子濃度が増加し、さらに、中性条件を満たす
ようにnドリフト層5内の正孔濃度も増加するためと考
えられる。従って、絶縁膜3をpアノード層4の表面の
一部に形成した場合、絶縁膜3の無い比較ダイオード
(B)、pinダイオード(C)に比べて、順方向電流
が大きいほど順電圧の増加率は小さくなる。通常、サー
ジ電流領域では逆回復モードの動作はない。従って、そ
のような電流域での正孔の注入促進による逆回復特性へ
の影響は考慮しなくてもよい。As described in the previous section, in the power diode (A) in which the oxide film is formed, minority carriers (electrons in the p anode layer 4) of the semiconductor surface layer are insulated in the region where the insulating film 3 is formed. The effect of being blocked by the film occurs, and the higher the injection state, the higher the electron concentration in the p-anode layer 4 near the insulating film, and further, the higher the hole concentration in the n-drift layer 5 so as to satisfy the neutral condition. Is also thought to increase. Therefore, when the insulating film 3 is formed on a part of the surface of the p anode layer 4, the forward voltage increases as the forward current increases as compared with the comparative diode (B) and the pin diode (C) without the insulating film 3. The rate becomes smaller. Normally, there is no operation in the reverse recovery mode in the surge current region. Therefore, it is not necessary to consider the influence on the reverse recovery characteristic due to the promotion of hole injection in such a current region.
【0023】図6は、実施例2の電力用ダイオード
(A)および比較ダイオード(B)、従来型のpinダ
イオード(C)のリカバリー特性を比較した特性図であ
る。横軸は100A/cm2 での順電圧、縦軸は、逆回
復ピーク電流である。逆回復動作の条件はIF =100
A/cm2 、VR =1300V、−dIF /dt=25
0A/(cm2 ・μs)である。この図に見られるよう
に、順電圧と逆回復ピーク電流とはトレードオフ関係に
あり、本実施例の電力用ダイオード(A)は比較ダイオ
ード(B)に比べて若干外側にあるものの、pinダイ
オード(C)に比べて優れたトレードオフ特性を示すこ
とがわかる。すなわち、同じ順電圧のダイオードで比較
したとき、本実施例の電力用ダイオード(A)は、逆回
復ピーク電流が小さいので、スイッチング速度が速く、
スイッチング損失は少なくて済む。FIG. 6 is a characteristic diagram comparing the recovery characteristics of the power diode (A), the comparison diode (B), and the conventional pin diode (C) of the second embodiment. The horizontal axis represents the forward voltage at 100 A / cm 2 , and the vertical axis represents the reverse recovery peak current. The condition of the reverse recovery operation is I F = 100
A / cm 2, V R = 1300V, -dI F / dt = 25
0 A / (cm 2 · μs). As shown in this figure, there is a trade-off relationship between the forward voltage and the reverse recovery peak current. Although the power diode (A) of this embodiment is slightly outside the comparison diode (B), it is a pin diode. It can be seen that trade-off characteristics superior to (C) are exhibited. That is, when compared with diodes having the same forward voltage, the power diode (A) of the present embodiment has a small reverse recovery peak current, and therefore has a high switching speed.
Switching loss is small.
【0024】前節にて述べたように、pアノード層4よ
りも高濃度のp+ ソース領域7を形成し、その表面の一
部にアノード電極1が接触する構造をとっているが、通
常の定格電流密度(〜100A/cm2 )では、アノー
ド電極1と接触しているpアノード層4から主に電流が
流れる。そのpアノード層4の表面濃度を下げることに
より、従来のpinダイオードより正孔の注入が、低く
抑えられるので、逆回復特性が改善されるためである。As described in the previous section, the structure is such that the p + source region 7 having a higher concentration than the p anode layer 4 is formed and the anode electrode 1 is in contact with a part of the surface thereof. At the rated current density (〜100 A / cm 2 ), current mainly flows from the p anode layer 4 in contact with the anode electrode 1. This is because, by lowering the surface concentration of the p anode layer 4, the injection of holes is suppressed lower than in the conventional pin diode, so that the reverse recovery characteristic is improved.
【0025】すなわち、本実施例の電力用ダイオード
は、従来のpinダイオードに比べて、サージ電流領域
での順特性、および定格電流域での逆回復特性が向上
し、より高速の、過酷な動作に耐えるものである。絶縁
膜3の形成が特性に与える影響は無視できる程度である
といえる。絶縁膜3およびp+ ソース領域7の形状は、
ストライプ状やドット状など、電流集中がなく分散する
構造であれば安定した特性が得られる。絶縁膜3の厚さ
や幅、pアノード層4ならびにp+ ソース領域7の表面
濃度、幅および接合深さは、既存のプロセス技術で制御
可能であり、デバイス構造等に適合した最適化ができ
る。この例では、絶縁膜3はもっとも形成の容易な酸化
膜としたが、酸化膜以外の絶縁材料、例えば窒化膜或い
はポリイミド等でも構わない。That is, the power diode of this embodiment has improved forward characteristics in the surge current region and improved reverse recovery characteristics in the rated current region as compared with the conventional pin diode, and has a higher speed and severe operation. To withstand. It can be said that the effect of the formation of the insulating film 3 on the characteristics is negligible. The shapes of the insulating film 3 and the p + source region 7 are as follows:
Stable characteristics can be obtained if the structure is dispersed without current concentration, such as stripes and dots. The thickness and width of the insulating film 3 and the surface concentration, width, and junction depth of the p anode layer 4 and the p + source region 7 can be controlled by existing process technology, and can be optimized according to the device structure and the like. In this example, the insulating film 3 is an oxide film which is most easily formed. However, an insulating material other than the oxide film, for example, a nitride film or polyimide may be used.
【0026】[実施例2]図2は、本発明第二の実施例
の電力用ダイオードの部分断面図である。この例では、
図1の実施例1に対してpアノード層4の拡散深さが、
p+ ソース領域7のそれより小さい場合を示している。
絶縁膜3はp+ ソース領域7の表面に接触して設けられ
ている。このようにすることで、pアノード層4からn
ドリフト層5への正孔の注入を更に抑える作用が得ら
れ、逆回復特性を改善することができる。Embodiment 2 FIG. 2 is a partial sectional view of a power diode according to a second embodiment of the present invention. In this example,
The diffusion depth of the p anode layer 4 is different from that of the first embodiment in FIG.
The case where it is smaller than that of the p + source region 7 is shown.
Insulating film 3 is provided in contact with the surface of p + source region 7. By doing so, the p anode layer 4 to n
The effect of further suppressing the injection of holes into the drift layer 5 can be obtained, and the reverse recovery characteristics can be improved.
【0027】[実施例3]図3は、本発明第三の実施例
の電力用ダイオードのチップ中央付近の単位部分の部分
断面図である。図1の実施例1と違っているのは、pア
ノード層4よりも高濃度のp+ ソース領域7が形成され
ていない点である。絶縁膜3はpアノード層4の表面に
接触して設けられている。但しこの例では、pアノード
層4形成のためのほう素イオン注入量を多くして、pア
ノード層4の表面濃度を、実施例1の場合よりも約1桁
大きく、すなわち、pアノード層4の表面不純物濃度、
拡散深さをそれぞれ3×1016/cm3 、3.4μmと
している。[Embodiment 3] FIG. 3 is a partial sectional view of a unit portion near the center of a chip of a power diode according to a third embodiment of the present invention. The difference from the first embodiment shown in FIG. 1 is that the p + source region 7 having a higher concentration than the p anode layer 4 is not formed. Insulating film 3 is provided in contact with the surface of p anode layer 4. However, in this example, the boron ion implantation amount for forming the p anode layer 4 is increased so that the surface concentration of the p anode layer 4 is about one order of magnitude higher than in the case of the first embodiment. Surface impurity concentration,
The diffusion depths are 3 × 10 16 / cm 3 and 3.4 μm, respectively.
【0028】従って、この実施例3の電力用ダイオード
は、実施例1よりp+ ソース領域7を形成しない分だ
け、工数が低減できる。またこの実施例3の電力用ダイ
オードでは、サージ電流領域において、実施例1より低
い順電圧が得られた。Therefore, in the power diode of the third embodiment, the number of steps can be reduced by the amount that the p + source region 7 is not formed as compared with the first embodiment. In the power diode of the third embodiment, a lower forward voltage than that of the first embodiment was obtained in the surge current region.
【0029】[0029]
【発明の効果】以上説明したように本発明によれば、第
二導電型アノード層表面または、第二導電型ソース領域
表面の一部に絶縁膜を設け、絶縁膜の無い部分にアノー
ド電極を接触することによって、サージ電流領域でのオ
ン電圧が低減され、発熱が抑制されて、サージ電流耐量
が向上する。特に、第二導電型アノード層の不純物濃度
を低くすれば、定格電流での逆回復特性の向上も可能と
なり、従来のpinダイオードでは困難であった、大き
いサージ電流耐量と、高速な逆回復特性との両立を可能
とした電力用ダイオードが提供される。As described above, according to the present invention, an insulating film is provided on the surface of the second conductive type anode layer or a part of the surface of the second conductive type source region, and the anode electrode is provided on the part without the insulating film. The contact reduces the on-voltage in the surge current region, suppresses heat generation, and improves the surge current capability. In particular, if the impurity concentration of the anode layer of the second conductivity type is reduced, the reverse recovery characteristic at the rated current can be improved, and a large surge current withstand capability and high-speed reverse recovery characteristic, which were difficult with the conventional pin diode, can be achieved. A power diode is provided which is compatible with the above.
【図1】本発明第一の実施例の電力用ダイオードの部分
断面図FIG. 1 is a partial sectional view of a power diode according to a first embodiment of the present invention.
【図2】本発明第二の実施例の電力用ダイオードの部分
断面図FIG. 2 is a partial sectional view of a power diode according to a second embodiment of the present invention.
【図3】本発明第三の実施例の電力用ダイオードの部分
断面図FIG. 3 is a partial sectional view of a power diode according to a third embodiment of the present invention.
【図4】従来の電力用pinダイオードの部分断面図FIG. 4 is a partial cross-sectional view of a conventional power pin diode.
【図5】本発明の実施例の電力用ダイオードおよび比較
例の順方向静特性図FIG. 5 is a diagram showing forward static characteristics of a power diode according to an example of the present invention and a comparative example.
【図6】本発明の実施例の電力用ダイオードおよび比較
例の逆回復ピーク電流とオン電圧のトレードオフ特性図FIG. 6 is a trade-off characteristic diagram of the reverse recovery peak current and the on-state voltage of the power diode according to the embodiment of the present invention and the comparative example.
1 アノード電極 2 カソード電極 3 絶縁膜 4 pアノード層 5 nドリフト層 6 n+ カソード層 7 p+ ソース領域REFERENCE SIGNS LIST 1 anode electrode 2 cathode electrode 3 insulating film 4 p anode layer 5 n drift layer 6 n + cathode layer 7 p + source region
Claims (11)
ソード層より低不純物濃度の第一導電型ドリフト層、第
二導電型アノード層のいずれも半導体の三層をこの順に
積み重ね、第二導電型アノード層の表面に接するアノー
ド電極と、第一導電型カソード層の裏面に接するカソー
ド電極とを有する電力用ダイオードにおいて、第二導電
型アノード層の表面上の一部に絶縁膜が形成され、その
絶縁膜が形成されない第二導電型アノード層の表面に前
記アノード電極が接することを特徴とする電力用ダイオ
ード。A first conductive type cathode layer, a first conductive type drift layer having a lower impurity concentration than the first conductive type cathode layer, and a second conductive type anode layer are each formed by stacking three semiconductor layers in this order. In a power diode having an anode electrode in contact with the surface of the two-conductivity type anode layer and a cathode electrode in contact with the back surface of the first conductivity type cathode layer, an insulating film is formed on a part of the surface of the second conductivity type anode layer Wherein the anode electrode is in contact with the surface of the second conductivity type anode layer on which the insulating film is not formed.
ことを特徴とする請求項1記載の電力用ダイオード。2. The power diode according to claim 1, wherein the plurality of insulating films are arranged substantially evenly.
する請求項2記載の電力用ダイオード。3. The power diode according to claim 2, wherein the insulating film has a stripe shape.
請求項2記載の電力用ダイオード。4. The power diode according to claim 2, wherein the insulating film has a dot shape.
ソード層より低不純物濃度の第一導電型ドリフト層、第
二導電型アノード層のいずれも半導体の三層をこの順に
積み重ね、第二導電型アノード層の表面に接するアノー
ド電極と、第一導電型カソード層の裏面に接するカソー
ド電極とを有する電力用ダイオードにおいて、第二導電
型アノード層の一部に第二導電型アノード層よりも高濃
度の第二導電型ソース領域が形成され、その第二導電型
ソース領域の表面上の一部に絶縁膜が形成され、その絶
縁膜が形成されない第二導電型ソース領域および第二導
電型アノード層の表面に前記アノード電極が接すること
を特徴とする電力用ダイオード。5. A first conductive type cathode layer, a first conductive type drift layer having a lower impurity concentration than the first conductive type cathode layer, and a second conductive type anode layer each having three semiconductor layers stacked in this order. In a power diode having an anode electrode in contact with the surface of the two-conductivity type anode layer and a cathode electrode in contact with the back surface of the first conductivity type cathode layer, a part of the second conductivity type anode layer is A second conductive type source region having a high concentration is also formed, an insulating film is formed on a part of the surface of the second conductive type source region, and the second conductive type source region and the second conductive type where the insulating film is not formed are formed. A power diode, wherein the anode electrode is in contact with the surface of a mold anode layer.
導電型ソース領域のそれより大きいことを特徴とする請
求項5記載の電力用ダイオード。6. The power diode according to claim 5, wherein the diffusion depth of the anode layer of the second conductivity type is larger than that of the source region of the second conductivity type.
導電型ソース領域のそれより小さいことを特徴とする請
求項5記載の電力用ダイオード。7. The power diode according to claim 5, wherein the diffusion depth of the anode layer of the second conductivity type is smaller than that of the source region of the second conductivity type.
が均等に配置されていることを特徴とする請求項6また
は7に記載の電力用ダイオード。8. The power diode according to claim 6, wherein the plurality of second conductivity type source regions and the insulating film are arranged evenly.
ライプ状であることを特徴とする請求項8記載の電力用
ダイオード。9. The power diode according to claim 8, wherein the source region of the second conductivity type and the insulating film have a stripe shape.
ット状であることを特徴とする請求項8記載の電力用ダ
イオード。10. The power diode according to claim 8, wherein the source region of the second conductivity type and the insulating film are dot-shaped.
請求項1ないし10のいずれかに記載の電力用ダイオー
ド。11. The power diode according to claim 1, wherein the insulating film is an oxide film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13625397A JP3807023B2 (en) | 1997-05-27 | 1997-05-27 | Power diode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13625397A JP3807023B2 (en) | 1997-05-27 | 1997-05-27 | Power diode |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH10326900A true JPH10326900A (en) | 1998-12-08 |
JP3807023B2 JP3807023B2 (en) | 2006-08-09 |
Family
ID=15170869
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP13625397A Expired - Fee Related JP3807023B2 (en) | 1997-05-27 | 1997-05-27 | Power diode |
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JP (1) | JP3807023B2 (en) |
Cited By (8)
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---|---|---|---|---|
EP1033761A2 (en) * | 1999-03-02 | 2000-09-06 | Fuji Electric Co. Ltd. | Semiconductor diode |
JP2006179823A (en) * | 2004-12-24 | 2006-07-06 | Matsushita Electric Ind Co Ltd | Surge protecting semiconductor device and its manufacturing method |
JP2013016652A (en) * | 2011-07-04 | 2013-01-24 | Toyota Motor Corp | Diode |
CN103208532A (en) * | 2013-02-28 | 2013-07-17 | 溧阳市宏达电机有限公司 | Fin type positive-intrinsic-negative (PIN) diode |
JP2013140901A (en) * | 2012-01-06 | 2013-07-18 | Hitachi Ltd | Diode and power conversion system using the same |
EP2924734A1 (en) | 2014-03-28 | 2015-09-30 | STMicroelectronics Srl | Diode with insulated anode regions |
WO2017187477A1 (en) * | 2016-04-25 | 2017-11-02 | 三菱電機株式会社 | Semiconductor device |
DE102020119349A1 (en) | 2020-07-22 | 2022-01-27 | Infineon Technologies Austria Ag | Diode and method of making a diode |
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Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1033761A2 (en) * | 1999-03-02 | 2000-09-06 | Fuji Electric Co. Ltd. | Semiconductor diode |
US6346740B1 (en) * | 1999-03-02 | 2002-02-12 | Fuji Electric Co., Ltd. | Semiconductor device |
EP1033761A3 (en) * | 1999-03-02 | 2002-03-13 | Fuji Electric Co. Ltd. | Semiconductor diode |
JP2006179823A (en) * | 2004-12-24 | 2006-07-06 | Matsushita Electric Ind Co Ltd | Surge protecting semiconductor device and its manufacturing method |
JP2013016652A (en) * | 2011-07-04 | 2013-01-24 | Toyota Motor Corp | Diode |
JP2013140901A (en) * | 2012-01-06 | 2013-07-18 | Hitachi Ltd | Diode and power conversion system using the same |
CN103208532A (en) * | 2013-02-28 | 2013-07-17 | 溧阳市宏达电机有限公司 | Fin type positive-intrinsic-negative (PIN) diode |
EP2924734A1 (en) | 2014-03-28 | 2015-09-30 | STMicroelectronics Srl | Diode with insulated anode regions |
US9419148B2 (en) | 2014-03-28 | 2016-08-16 | Stmicroelectronics S.R.L. | Diode with insulated anode regions |
US9564541B2 (en) | 2014-03-28 | 2017-02-07 | Stmicroelectronics S.R.L. | Diode with insulated anode regions |
WO2017187477A1 (en) * | 2016-04-25 | 2017-11-02 | 三菱電機株式会社 | Semiconductor device |
JPWO2017187477A1 (en) * | 2016-04-25 | 2018-07-05 | 三菱電機株式会社 | Semiconductor device |
DE102020119349A1 (en) | 2020-07-22 | 2022-01-27 | Infineon Technologies Austria Ag | Diode and method of making a diode |
US11664464B2 (en) | 2020-07-22 | 2023-05-30 | Infineon Technologies Austria Ag | Diode and method of producing a diode |
US12132122B2 (en) | 2020-07-22 | 2024-10-29 | Infineon Technologies Austria Ag | Single chip power diode and method of producing a single chip power diode |
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