JPH10294493A - Semiconductor light-emitting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enlarge the light-emitting area of light extraction plane side in a semiconductor light-emitting device. SOLUTION: A light-emitting diode has a GaN based multi-layered structure 45 arranged on a sapphire substrate 11. A pair of electrode pads 31, 32 are arranged on the light extraction plane side of the multi-layered structure 45. The whole projection area of the pair of electrode pads 31, 32 to the projection area of the light extraction plane is set not more than 25%. The pair of electrode pads 31, 32 are joined to electrode pads 36, 37 of a mount frame via solder wiring layers 41, 42 arranged on an insulating film 40 covering the side of the multi-layered structure 45.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor light-emitting device formed on an insulating substrate, and more particularly to a semiconductor light-emitting device formed of a gallium nitride-based compound semiconductor formed on a sapphire substrate.

[0002]

2. Description of the Related Art In recent years, short-wavelength light emitting diodes (LEDs) and semiconductor laser devices (L
As a material for D), gallium nitride-based compound semiconductors such as GaN have attracted attention. A blue semiconductor laser device using this material system is expected to be applied as a light source for high-density information processing because of its short oscillation wavelength.

[0003] Conventional gallium nitride-based compound semiconductors have been grown using sapphire as a substrate. Since sapphire is an insulator, the surface layer must be removed by etching when making electrical contact with a layer close to the substrate among the films stacked on the substrate. Such a process leads to a reduction in the light emission area in a device such as a light emitting diode for discussing the entire light emission intensity, which directly leads to a decrease in the light emission intensity.

[0004] In an attempt to enlarge the light emitting area, a proposal has been made to dispose a pair of electrodes diagonally as disclosed in Japanese Patent Application Laid-Open No. 6-338632. However, this proposal merely shows an efficient flow of the electrodes depending on the positional relationship of the electrodes, and does not mention a method for enlarging the area of the light emitting portion or reducing the electrode area. In terms of enlarging the light emitting area itself, see Japanese Patent Application Laid-Open No. Hei 4-27317.
As shown in Japanese Patent Publication No. 5 and the like, it is better to form a hole from the surface and take an electrode. However, even in this proposal, when viewed from a plane, the light-emitting portion is shielded by the spread electrodes, which does not lead to a substantial increase in the light-emitting area.

As described above, conventionally, in a compound semiconductor light emitting device formed on an insulating substrate, it is necessary to form a pair of electrodes on the light extraction surface side. These electrodes cannot be made too small to connect the bonding wires. For this reason, the presence of the electrode is a factor that reduces the light emitting area.

[0006]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor light emitting device provided on an insulating substrate, which enlarges a light emitting area on a light extraction surface side and sufficiently connects external leads to electrode pads. To do.

[0007]

SUMMARY OF THE INVENTION A first aspect of the present invention is as follows.
A semiconductor light emitting device having a light extraction surface facing in a first direction, comprising: a plurality of semiconductor layers stacked along the first direction so as to form a pn junction for light emission; And a plurality of the semiconductor layers, the first and second semiconductor layers being located with the pn junction interposed therebetween, respectively.
Including first and second conductive semiconductor layers;
A first main electrode provided on a semiconductor layer, the first main electrode including a first electrode pad that covers the light extraction surface and does not transmit emitted light, and is provided on the second semiconductor layer. A second main electrode, and the second main electrode includes a second electrode pad that covers the light extraction surface and does not transmit emitted light, and the first and second electrodes with respect to a projected area of the light extraction surface. The total projected area of the pad is set to 25% or less, and the first and second pads disposed on the side wall of the multilayer structure.
An insulating layer; and a first layer disposed on the first and second insulating layers.
And the second wiring layer, and the first and second wiring layers are the first wiring layer.
And being connected to the second electrode pad.

Here, the projection area of the light extraction surface and the electrode pad means an area in a plan view showing the light extraction surface. According to a second aspect of the present invention, in the device according to the first aspect, the first and second wiring layers may be formed at 150 ° C. to 3 ° C.
It is characterized by being basically made of a metal material having a melting point of 50 ° C.

According to a third aspect of the present invention, there is provided the device according to the second aspect, further comprising a mount frame having a pair of mount electrode pads for supporting the multilayer structure and serving as n-side and p-side electrodes. The first and second electrode pads are electrically connected to the pair of mount electrode pads substantially only by the metal material of the first and second wiring layers.

According to a fourth aspect of the present invention, in the device according to the first aspect, the first and second insulating layers have a portion covering the light extraction surface and are formed of a common insulating film that transmits emitted light. It is characterized by being part.

A fifth aspect of the present invention is the device according to the fourth aspect, further comprising an insulating support substrate for supporting the multilayer structure, wherein the insulating film extends from the light extraction surface to the support substrate. It is characterized by being formed in.

A sixth aspect of the present invention is a device according to the fourth aspect, wherein the multilayer structure is a II-VI compound semiconductor or a III-VI compound semiconductor.
Basically, the insulating film is made of a group V compound semiconductor.
O _x N _y (x + y ≠ 0, 0 ≦ x, 0 ≦ y).

According to a seventh aspect of the present invention, in the device according to the first aspect, at least one of the first and second main electrodes has a conductive layer that transmits emitted light. An eighth aspect of the present invention is the device according to the first aspect, wherein the first and second electrode pads are arranged at different height levels located across the pn junction.

According to a ninth aspect of the present invention, in the device according to the first aspect, the light extraction surface is rectangular, and
And the second electrode pad is located on a diagonal line of the light extraction surface.
It is characterized by being arranged at each of two corners.

According to a tenth aspect of the present invention, in the device according to the ninth aspect, the second electrode pad has an extension extending along two adjacent sides of the light extraction surface. .

According to an eleventh aspect of the present invention, in the device according to the ninth aspect, the light extraction surface is formed in a diamond shape, and the first and second electrode pads are formed by two acute corners of the light extraction surface. , Respectively.

According to a twelfth aspect of the present invention, in the device according to the first aspect, the light extraction surface is rectangular, the first electrode pad is arranged at a corner of the light extraction surface, and the second electrode A pad is arranged at the center of the light extraction surface.

According to a thirteenth aspect of the present invention, there is provided a semiconductor light emitting device functioning as a semiconductor laser device, wherein the semiconductor light emitting device is laminated on a support substrate which is basically made of sapphire and forms a laser resonator. A multi-layer structure having a plurality of gallium nitride-based compound semiconductor layers, the plurality of semiconductor layers including n and p-type semiconductor layers located on both sides of an active layer, and the n-type semiconductor layer is a p-type semiconductor layer. An extraction groove formed in the multilayer structure at a depth from the p-type semiconductor layer to the n-type semiconductor layer and in parallel with the laser resonator; A first main electrode that contacts the n-type semiconductor layer at the bottom of the extraction groove, a second main electrode that contacts the p-type semiconductor layer, and the first and second main electrodes are formed with the extraction groove interposed therebetween. To characterized by comprising the method comprising respectively comprising first and second electrode pads disposed on the same surface.

According to a fourteenth aspect of the present invention, in the device according to the thirteenth aspect, the first and second electrode pads are provided on a common insulating film. According to a fifteenth aspect of the present invention, in the device according to the fourteenth aspect, the insulating film is provided on the p-type semiconductor layer.

According to a sixteenth aspect of the present invention, in the device according to the fourteenth aspect, the insulating film is disposed on the mesa of the n-type semiconductor layer immediately below the first electrode pad, and
The insulating film is provided on the p-type semiconductor layer immediately below the electrode pad.

According to a seventeenth aspect of the present invention, in the device according to the thirteenth aspect, there is provided a mount frame having a pair of mount electrode pads serving as n-side and p-side electrodes disposed on substantially the same plane. The first and second electrode pads are connected to the pair of mount electrode pads in a state of facing each other via a metal material layer.

According to an eighteenth aspect of the present invention, in the device according to the seventeenth aspect, the mount frame has a width larger than the width of the multilayer structure and has a mounting groove for guiding the multilayer structure. The pair of mounting electrode pads are provided at the bottom of the mounting groove.

According to a nineteenth aspect of the present invention, in the device according to the seventeenth aspect, the mount frame has a separation groove along the lead groove between the pair of mount electrode pads.

According to a twentieth aspect of the present invention, in the device according to the seventeenth aspect, the mount frame includes a separation projection along the lead groove between the pair of mount electrode pads.

According to a twenty-first aspect of the present invention, there is provided a semiconductor light emitting device functioning as a semiconductor laser device, comprising: an insulating support substrate; and a plurality of semiconductor light emitting devices stacked on the support substrate so as to form a laser resonator. A multi-layer structure having a group III nitride semiconductor layer, wherein the plurality of semiconductor layers include first and second conductivity type first and second semiconductor layers, respectively, located on both sides of an active layer; First and second main electrodes respectively disposed on the first and second semiconductor layers, and the first and second main electrodes.
A main electrode including first and second electrode pads; an insulating layer disposed on a side wall of the multilayer structure; and an n-side electrode and a p-side electrode supporting the multilayer structure via the support substrate. And a first wiring layer disposed on or above the insulating layer and electrically connecting the first electrode pad to one of the pair of mount electrode pads. And the first wiring layer has a thickness greater than that of the first electrode pad so as to function as a heat dissipation member for releasing heat generated in the multilayer structure. A second wiring layer electrically connecting the other of the mount electrode pads.

[0026]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) FIG. 1 is a vertical sectional side view showing a main part of one chip of a light emitting diode which is a semiconductor light emitting device according to a first embodiment of the present invention. This light-emitting diode chip has a sapphire substrate 11 having a C-plane as a main surface, on which a multilayer structure of a GaN-based material is formed. This multi-layer structure is formed by a well-known metal organic chemical vapor deposition (MOCVD).
Method).

First, the manufacturing process of this multilayer structure will be described. The organometallic raw materials used were trimethyl gallium (TMG), trimethyl aluminum (TMA), trimethyl indium (TMI), biscyclopentadienyl magnesium (Cp ₂ Mg), and dimethyl zinc (DMZ). The used gas raw materials are ammonia and silane. Note that hydrogen and nitrogen were used as carrier gases.

First, the sapphire substrate 11 treated by organic cleaning and acid cleaning was placed in a reaction chamber of a MOCVD apparatus, and was mounted on a susceptor which could be heated by high frequency.
Next, while flowing hydrogen at a flow rate of 10 L / min at normal pressure, gas phase etching was performed at a temperature of 1100 ° C. for about 10 minutes to remove a natural oxide film formed on the surface. Note that the temperature here is the indicated temperature of the thermocouple in contact with the susceptor.

Next, the temperature was lowered to 550 ° C., and 15 L / min of hydrogen, 5 L / min of nitrogen, and 10 L / min of ammonia.
By flowing TMG at a flow rate of 25 cc / min for about 4 minutes, a GaN buffer layer 12 having a thickness of about 20 nm was formed.

Next, 15 L / min of hydrogen and 5 L / min of nitrogen
After raising the temperature to 1100 ° C. while flowing ammonia at a flow rate of 10 L / min, 15 L / min of hydrogen, 5 L / min of nitrogen, 10 L / min of ammonia and 100 c of TMG
By flowing at a flow rate of c / min for about 60 minutes, a thickness of about 2 μm
An undoped GaN layer 13 of m was formed. Next, 3 cc / SiH ₄ diluted to 10 ppm with hydrogen was added thereto.
And flow for about 120 minutes to obtain a thickness of about 4 μm.
The n-type GaN layer 14 was formed.

Next, the temperature was lowered to 800 ° C. in about 3 minutes while flowing nitrogen at about 20 L / min and ammonia at 10 L / min. At this temperature, about 20 L / min of nitrogen and 10
L / min, TMG 10cc / min, TMI 450cc /
And silane at a flow rate of 10 cc / min and DMZ at a flow rate of 30 cc / min for about 30 minutes to obtain a D having a thickness of about 0.1 μm.
An A-light-emitting InGaN light-emitting layer 15 was formed.

Next, 15 L / min of hydrogen, 5 L / min of nitrogen,
Ammonia 10 L / min, TMG 100 cc / min, C
The p-type GaN layer 16 was formed by flowing p ₂ Mg at a flow rate of 50 cc / min for about 3 minutes. Next, about 20 nitrogen
The temperature was raised to 1100 ° C. in about 3 minutes while flowing L / min and ammonia at 10 L / min. At this temperature, 15 L of hydrogen
/ Min, nitrogen 5 L / min, ammonia 10 L / min, TM
G: 100 cc / min, TMA: 50 cc / min, Cp ₂ M
g at a flow rate of 50 cc / min for about 10 minutes,
A p-type AlGaN layer 17 having a thickness of about 0.3 μm was formed.

Next, about 20 L / min of nitrogen, 10 L / min of ammonia, 100 cc / min of TMG, and 1 Cp ₂ Mg
By flowing at a flow rate of 00 cc / min for about 3 minutes, a p-type GaN contact layer 18 having a thickness of about 0.1 μm was formed.
Thereafter, the temperature was lowered to 350 ° C. with the supply of TMG and Cp ₂ Mg stopped, and further, the supply of nitrogen and ammonia was stopped at 350 ° C., cooled to room temperature, and the growth wafer was taken out of the reaction chamber.

Next, a well-known CVD is formed on the p-type GaN layer 18.
A SiO ₂ film and a photoresist film are formed by using a method or the like, and holes 21 having a size of 100 μmφ are formed at a pitch of 700 μm as shown in FIG.
Was formed. These holes 21 were etched by a reactive ion etching method using chlorine gas or the like until the n-type GaN layer 14 was exposed. Further, a groove 22 having a width of 20 μm (that is, a vertical and horizontal pitch of the groove 22 was 350 μm) was formed in the multilayer structure along a line connecting the holes 21 and a line extending in parallel between the lines. Groove 22
Was formed by etching until reaching the sapphire substrate 11.

Next, the SiO ₂ film and the photoresist film were removed, an SiO ₂ film 40 was formed on the entire surface, and a photoresist film patterned corresponding to the following holes 23 and 24 was formed thereon. . Next, the SiO ₂ film 40 is etched using the photoresist film as a mask, and a hole 2 of 80 μmφ is formed concentrically with the hole 21 of 100 μmφ previously formed.
3 at a position shifted by 350 μm in the vertical and horizontal directions from the hole 23 (that is, a position on a diagonal line of one block).
A hole 24 of mφ was formed.

Next, an In film was formed on the entire surface by a known deposition method or the like. Then, lift-off is performed by a photoresist film, and the n-side electrode pad 31 and the p-side electrode pad 3 are lifted off.
2 was formed. This wafer was subjected to a heat treatment at 250 ° C. for about 30 seconds in nitrogen, and the n-side electrode pad 31 and the p-side electrode pad 32 were used as ohmic electrodes.

Next, the sapphire substrate 11 is mirror-polished to about 80 μm, and 350
The chip was formed into a size of about μm square. FIG. 3 is a plan view of the chip in this state. A region surrounded by a broken line in FIG. 2 corresponds to one chip. An n-side electrode pad 31 is provided at one corner of the rectangular chip, and a p-side electrode pad 32 is provided at a corner facing the n-side electrode pad 31.

Next, this chip was mounted on a mount frame (external frame) 35 having a pair of mount electrode pads 36 and 37 serving as n-side and p-side electrodes. Chip electrode pads 31 and 32 and mount electrode pad 3
The electrical connection between 6 and 37 was made by In solder. At this time, In solder was dropped from the electrode pads 31 and 32 to the mount electrode pads 36 and 37. As a result, as shown in FIG.
5, the In wiring layers 41 and 42 could be formed so as to crawl on the insulating film 40 made of SiO ₂ or the like covering the insulating film 5.

The semiconductor light emitting device, that is, the light emitting diode, disposed on the mount frame 35 by the above method has a light extraction surface facing upward. The GaN-based semiconductor multilayer structure 45 that defines the light extraction surface has a light emitting pn
The plurality of semiconductor layers 1 vertically stacked on the sapphire substrate 11 so that a junction is formed in the light emitting layer 15.
2-18.

On the n-type GaN contact layer 14 and the p-type GaN contact layer 18 positioned with the light-emitting layer 15 interposed therebetween, an n-side electrode pad 31 and a p-side electrode pad 32 that do not transmit emitted light are provided, respectively. The total projected area of the electrode pads 31 and 32 in the plan view showing the light extraction surface is set to 25% or less of the projection area of the light extraction surface.

Most of the side surface and the light extraction surface of the multilayer structure 45 are made of SiO _x N _y (x + y ≠ 0, 0 ≦
x, 0 ≦ y), for example, with an insulating film 40 such as SiO ₂ . The electrode pads 31 and 32 of the chip and the mount electrode pads 36 and 37 are electrically connected only by the In wiring layers 41 and 42 so as to crawl on the insulating film 40.

In such a light emitting diode, the ratio of the electrode pads 31 and 32 on the light extraction surface is reduced. According to the experiment, when the orientation angle was 8 °, the on-axis luminous intensity showed an average value of 1.5 cd. In addition, since the connection of the electrode pads 31 and 32 to the external frame is performed not by wire bonding but by the solder wiring layers 41 and 42, there is no problem even if the electrode pads 31 and 32 are small. From this viewpoint, the wiring layers 41 and 42 are
Desirably, it is basically made of a metal material having a melting point of from 350C to 350C.

FIG. 5 shows a comparative example of this embodiment. In this comparative example, the electrode pad 32 on the p-type GaN layer 18
Is a 120 μm square electrode pad 31 to the n-type GaN layer 14.
Was set to 120 μmφ. In such a device, the luminous intensity was 1 cd on average when the orientation angle was 8 °.

In this embodiment, the reason why the total projected area of the electrode pad is 25% or less of the projected area of the light extraction surface, that is, the projected area of the light emitting region is 75% or more of the projected area of the light extraction surface is as follows. It is on the street.

In many devices formed on an insulating substrate, p- and n-side electrodes are formed on the same plane. At this time, it is necessary to perform etching or the like for at least one of the electrodes. The side surface of the step formed by the etching or the like causes a deterioration in device characteristics. That is, most of the electric field is extremely concentrated on the step due to the presence of the electrodes along the edge of the step, and the characteristics are greatly deteriorated, such as a decrease in the emission characteristics of the device and a shortened life of the device. In order to solve this, it is necessary to reduce the area of the electrode and reduce the step boundary surface as much as possible. According to the experiments of the present inventors, in a square LED having a side of 300 μm,
When the etching area is about 20% of the whole, the characteristic deterioration can be suppressed, and particularly when the etching area is about 10%, a great effect is obtained. That is, as long as the ratio of the total electrode area to the whole of the p-side and n-side electrodes is about 20%, this characteristic deterioration was not observed.

In the p-side and n-side electrodes, the portion that most affects the deterioration of the light-emitting characteristics is a portion that does not transmit light (light due to light emission), for example, a portion generally called an electrode pad. The transparent electrode portion that transmits the emitted light does not significantly affect the emission characteristics. According to the experiment, the electrode portion that does not transmit the emitted light is set to 25% or less of the projected area of the light extraction surface in the plan view showing the light extraction surface, and the arrangement of these electrode portions is specified, thereby emitting light. It has been found that the properties are improved. Furthermore, one side of the device is 150 μm
In such a case, it was also found that making the electrode pad smaller has a greater effect of improving the device characteristics than making the etching step smaller.

Next, the effect of this embodiment will be described with reference to FIGS. FIGS. 6A and 6B are plan layout views showing devices according to the related art and the present embodiment, respectively. FIGS. 7A and 7B are diagrams showing light emission patterns of the devices according to the related art and the present embodiment.

In the electrode pattern shown in FIG. 6A, since the light emitting portion 33 is separated, only the characteristics of the light emitting pattern shown in FIG. 7A can be obtained. On the other hand, in the electrode pattern of FIG. 6B, light is emitted concentrically from the center of the light emitting section 33, so that the characteristics of the light emitting pattern are improved as shown in FIG. 7B. Therefore, according to the electrode pattern of the present embodiment, the design of the lens system is simplified, and the characteristics are improved. Also, unlike the conventional electrode pattern, according to the electrode pattern of the present embodiment, since the distance between the electrodes is almost constant, local electric field concentration is avoided, and the life of the device can be extended. it can.

As described above, according to the present embodiment, the luminous efficiency can be improved by reducing the electrode area and widening the light emitting region. In addition, the characteristics of the light emitting pattern are improved. Therefore, a light-emitting diode with high luminance can be manufactured. In addition, an increase in luminous efficiency means that each chip can be made smaller if the same luminous intensity as in the related art is obtained. Accordingly, the number of chips cut out from a single wafer can be increased, which leads to a reduction in manufacturing cost.

FIG. 8 is a vertical sectional side view showing a device according to a first modification of the first embodiment. In this modification, the p-side electrode pad 32 does not directly contact the p-type layer,
The contact is made through a transparent conductive film 48 that transmits light such as ITO. With such a structure, the luminous intensity can be further improved.

FIG. 9 is a cross-sectional plan view showing a device according to a second modification of the first embodiment. In this modification, in addition to the electrode arrangement of the first embodiment shown in FIG. 3, the p-side electrode pad 32 has an extension extending along two adjacent sides of the light extraction surface. That is, the p-side electrode pad 32 is not limited to only one corner,
1 extends to the corner where it is not installed.

With such an arrangement, the current can be expanded without using a transparent conductive film or the like, and light emission can be uniformly generated in a wide area. (Second Embodiment) FIG. 10 is a cross-sectional plan view showing a light emitting diode according to a second embodiment of the present invention. In this embodiment, electrode pads 51, 5 are provided at four corners of the device.
This is an example in which 2, 53, and 54 are provided. In such an arrangement, two electrode pads at diagonal positions are used as electrodes for the same layer. That is, in FIG. 10, the electrode pads 51 and 53 are used as electrodes for the p-type layer and the electrode pads 52 and 54 are used.
Is desirably an electrode to the n-type layer.

However, such an arrangement is, for example, shown in FIG.
As shown in (1), since the n-type and p-type frames 61 and 62 must have a complicated structure, a problem remains in terms of mass productivity. Therefore, a method of using three as the electrodes for the p-type layer and one as the electrode for the n-type layer, or using the same two at 51 and 52
Can be adopted as p-side electrodes, and 53 and 54 as n-side electrodes. These methods are excellent in terms of simplifying the frame structure.

(Third Embodiment) FIG. 12 is a cross-sectional plan view showing a light emitting diode according to a third embodiment of the present invention. In this embodiment, electrode pads 71, 72, 73 and 74 are provided at four corners of the device, and an electrode pad 70 is provided at the center. Here, the electrode pad 70
And one of the electrode pad groups 71 to 74 is a p-side electrode,
The other is an n-side electrode. The electrode pad 7 at the center position
0 is desirably 120 μmφ or less, preferably 80 μmφ or less.

In the above-described first and second embodiments, the current intensity has a distribution and the emission intensity tends to have an in-plane distribution. However, the present embodiment has a relatively symmetrical structure. It is advantageous in that it is excellent.

(Fourth Embodiment) FIG. 13 is a perspective view showing a light emitting diode according to a fourth embodiment of the present invention. In the present embodiment, an arrangement is made in which an n-side electrode (electrode pad) 81 and a p-side electrode (electrode pad) 82 are arranged in parallel to allow a current to flow uniformly. In the figure, reference numeral 80 denotes an insulating film such as SiO ₂ , and 85 denotes a multilayer structure of a GaN-based material.

In this embodiment, each electrode width is 2
It is desirable that the thickness be 0 μm or less. Under this condition, the etching area for exposing the n-type layer is about 40 μm or less, which does not lead to a large decrease in the light emitting area. Further, in this embodiment, the p-side electrode 82 is an electrode having a width of 20 μm, but a transparent conductive film may be formed on the entire p-type layer.

FIG. 14 is a vertical sectional side view showing a modification of the fourth embodiment. In this modification, n-side electrodes 81 (electrode pads 81a and 81b) are formed at both ends of the device, and p-side electrodes (electrode pads) 82 are formed linearly at a width of 10 μm or less at the center. The electrodes on the mount frame may be connected at a position where the p side is the upper side and the n side is the lower side in FIG.

In the above-described embodiments and their modifications, the electrode surface is on the opposite side as viewed from the frame,
That is, the type seen above a general light emitting diode lamp has been described. However, when a translucent substrate such as sapphire is used, it is also possible to arrange the mount frame so that the electrode surface faces. For example, the structure as shown in FIG. 14 can be easily realized by preparing a stepped mount frame and arranging the chips as shown in FIG. That is, the mount frame side may be formed according to the chip shape, the electrode pads 91 and 92 may be provided, and the chips may be connected face down.

It should be noted here that an appropriate insulating protective film is formed in order to prevent short-circuiting of the pn junction due to creeping up of solder or the like. (Fifth Embodiment) FIG. 16 is a plan layout view showing a light emitting diode according to a fifth embodiment of the present invention. The sapphire substrate is easily broken in the <11-20> direction, but relatively hard to break in the <1-100> direction perpendicular thereto. Therefore, to split sapphire efficiently, 6
It is desirable to divide in the <11-20> direction that exists every 0 degree.

In the light emitting device on sapphire divided into diamonds as described above, the light emitting device on a longitudinal diagonal line as shown in FIG.
That is, the electrodes (electrode pads) 101 and 102 are provided at the sharp corners of the rhombus.
Is arranged, the electrode area can be reduced. In addition, since the current flow is easier to spread than the rectangular shape, uniform light emission can be observed.

The present invention is not limited to the above embodiments. In the embodiment, In has been described as an electrode pad, but is not limited thereto. For example, for a p-type layer, In, Al,
Pt, Ti, Ni, Mg, Zn, Be, Ge, Pd, S
It is also possible to use a single layer, a multilayer structure, or an alloy such as n or Au. Further, for the n-type layer, In, Ti,
It is also possible to use a single layer, a multilayer structure, or an alloy of Al, Ag, Cr, Ge, Sn, Au, or the like.

The layer structure used for the light emitting device is shown in FIG.
However, the present invention is not limited to the structure shown in FIG. For example, the light emitting layer
Multiple quantum well structure (MQW) or single quantum well structure (SQ
W) or those obtained by adding an appropriate amount of impurities thereto. As for the growth substrate, it is possible to use other surfaces of sapphire, for example, M-plane, A-plane, R-plane, or the like, or oxide such as spinel (MgAl ₂ O ₄ ) or CaF ₂ . It is also possible to use fluoride.

Further, the semiconductor multilayer structure laminated on the substrate is not limited to GaN-based compound semiconductor materials,
Group V compound semiconductors and II-VI compound semiconductors can be used. Further, the film formation method is not limited to the MOCVD method, but may be a molecular beam epitaxy (MBE) method, a CVD method using a hydride raw material or a chloride raw material, or the like. In addition, the first to fifth embodiments are
Various modifications can be made.

(Sixth Embodiment) Next, an embodiment in which the present invention is applied to a semiconductor laser device will be described.

FIG. 17 is a vertical sectional side view showing a gallium nitride-based compound semiconductor laser device 200 according to a sixth embodiment of the present invention. The present embodiment will be described below in accordance with the manufacturing steps shown in FIGS.

As shown in FIG. 18A, a metalorganic vapor phase epitaxy (M
A GaN-based material was laminated by an OCVD method to form a multilayer structure constituting a laser resonator. First, after GaN serving as a buffer layer is deposited, the n-type GaN contact layer 20 is deposited.
2, n-type GaAlN cladding layer 203, InGaN active layer 204, p-type GaAlN cladding layer 205, p-type Ga
N contact layers 206 were sequentially stacked. In this embodiment, crystal growth is performed by MOCVD, but another crystal growth method such as MBE may be used.

Next, as shown in FIG. 18B, a resist pattern 207 was formed by photolithography. Next, using the resist pattern 207 as a mask, a groove 208 was formed in the multilayer structure by reactive ion beam etching (RIBE) using Cl ₂ gas.
The groove 208 is formed by the p-type GaN contact layer 206 and the p-type Ga
AlN cladding layer 205, InGaN active layer 204, n
It was formed so as to penetrate the n-type GaN contact layer 202 through the n-type GaAlN cladding layer 203.

[0069] After removing the etching mask 207, as shown in FIG. 18 (c), SiO ₂ film 20 on the entire surface of the wafer
9 was deposited. Next, a resist pattern was formed by photolithography, and using this resist pattern as a mask, the SiO ₂ film 209 was etched to form an opening for an n-side electrode at the bottom of the groove 208. Further, an n-side electrode and an electrode pad 211 connected to the n-side electrode were formed by a lift-off method using a resist and an oblique evaporation method.

Next, as shown in FIG. 18D, a resist pattern is formed by photolithography, and this resist pattern is used as a mask to form an SiO ₂ film 209.
Was selectively etched to expose the p-type GaN layer 206. Thereafter, an electrode metal was deposited, and a p-side electrode and an electrode pad 212 connected to the p-side electrode were formed by a lift-off method.

In this embodiment, the n-side electrode pad 211 and the p-side electrode pad 212 are formed on the same plane. That is, the n-side electrode is formed at the bottom of the groove,
The n-side electrode pad 211 connected thereto is formed on a mesa having the same height as the surface on which the p-side electrode pad 212 is formed.

In the conventional laser device structure, since the p-side electrode pad and the n-side electrode pad on the semiconductor substrate are arranged on surfaces having different heights, the height between the p-side electrode pad and the n-side electrode pad is increased. Need to compensate for the differences. This means that, for example, a p-side electrode pad and an n-side electrode pad on a mount frame such as a heat sink are provided with a step,
This is performed by means such as thickening the solder for connection. In such a method, there are problems that it is difficult to mount the device on a heat sink, and that a thick solder is used, so that a short circuit between the electrodes occurs due to the wraparound of the solder.

On the other hand, in the gallium nitride compound semiconductor laser device according to the present embodiment, the n-side electrode and the p-side electrode are arranged on the same plane. Therefore, the amount of solder for connection to the heat sink can be reduced. In addition, mounting to a heat sink is facilitated, and device failure due to a short circuit at a connection portion of an electrode generated at the time of mounting can be reduced.

In this embodiment, a laser device having an electrode stripe structure has been described as an example. However, the present invention can be easily applied to a laser device having another structure such as an internal current confinement structure. Further, as shown in FIG.
A mesa of the type GaN contact layer 202 may be formed, and an n-side electrode pad 211 may be formed thereon.

(Seventh Embodiment) FIG. 20 is a vertical sectional side view showing a state where the semiconductor laser device 200 shown in FIG. 17 is mounted on a mount frame 301 according to a seventh embodiment of the present invention.

As shown in FIG. 20, the semiconductor laser device 200 described in the sixth embodiment was connected to a mount frame 301 such as a heat sink by junction-down. FIG. 21A shows a mount frame 301 according to the present embodiment. Mount frame 30
1 n-side electrode pad 303 and p-side electrode pad 302
Were formed on the same surface at a distance substantially equal to the electrode interval of the semiconductor laser device 200 to be mounted. Solder material 305 was also deposited on electrode pads 302 and 303 in advance. The semiconductor laser device 2 is mounted on this mount frame.
00 was connected at the junction down.

The feature of this embodiment is that any one of the p of the semiconductor laser device 200 and the mount frame 301
That the side electrode pad and the n-side electrode pad are formed on the same surface, and that the semiconductor laser device 200
Are connected on the mount frame 301 in a junction-down manner.

In the conventional mount frame, a step is formed to match the height of the electrode pad of the semiconductor laser device to be mounted, and the n-side electrode pad and the p-side electrode pad are arranged on surfaces of different heights. In this method, the step of the mount frame and the step of the semiconductor laser device need to be aligned with high precision, and mounting is very difficult. Furthermore, it is necessary to increase the thickness of the solder for connection, which causes a problem of poor adhesion of the solder and device deterioration due to short circuit. On the other hand, according to the present embodiment, such high-precision alignment is not required at the time of mounting.

The electrode pad may have any shape. For example, a pad portion for wire bonding may be provided as shown in FIG. (Eighth Embodiment) FIG. 22 is a vertical sectional side view showing a state where the semiconductor laser device 200 shown in FIG. 17 is mounted on a mount frame 401 according to an eighth embodiment of the present invention.

A groove 404 wider than the width of the semiconductor laser device 200 to be mounted is formed in the mount frame 401, and electrode pads 402 and 403 are formed on the bottom of the groove.
Is arranged. The semiconductor laser device 200 is mounted in a groove formed in the mount frame 401 by junction down. The groove 404 is the laser device 20
It serves as a guide when mounting 0. Thus, the electrode pads formed on the semiconductor laser device 200 and the electrode pads formed on the mount frame 401 can be accurately overlapped.

In this embodiment, a groove and an electrode-shaped mount frame as shown in FIG. 23 (a) are used, but the mount frame having a shape as shown in FIGS. 23 (b), (c) and (d) is used. May be used.

(Ninth Embodiment) FIG. 24 is a longitudinal sectional side view showing a state where the semiconductor laser device 200 shown in FIG. 17 is mounted on a mount frame 501 according to a ninth embodiment of the present invention.

An n-side electrode pad 503 and a p-side electrode pad 502 are provided on the same surface of the mount frame 501. A groove 50 having a width smaller than the width of the semiconductor laser device 200 to be mounted is provided between the electrode pads 502 and 503.
4 are formed. The semiconductor laser device 200 is mounted on an electrode pad formed on the mount frame 501 in a junction-down manner. Thus, the electrode pads formed on the semiconductor laser device 200 and the electrode pads formed on the mount frame 501 can be connected with high accuracy. At this time, since the grooves 504 are formed between the electrode pads on the device mounting substrate 501, mounting can be performed without a problem such as a short circuit due to the solder sneaking into a portion other than the electrodes during connection.

In this embodiment, a mount frame having a groove and an electrode as shown in FIG. 25A is used, but a mount frame having a shape as shown in FIG. 25B may be used. Alternatively, a mount frame having a convex portion 508 at a portion corresponding to the groove 504 as shown in FIG. 26 may be used.

(Tenth Embodiment) FIG. 27 is a vertical sectional side view showing a group III nitride semiconductor laser device 600 according to a tenth embodiment of the present invention.

The semiconductor laser device 600 has a sapphire substrate 601 having a thickness of about 60 μm with the C-plane as a main surface, that is, an insulating substrate. On the sapphire substrate 601, a multilayer structure of the following GaN-based semiconductor is formed.

First, on a substrate 601, a GaN buffer layer 602, a GaN quality improvement layer 603, and an n-type GaN contact layer 604 are provided in this order. On the contact layer 604, a portion other than the region where the n-side electrode 621 is formed,
N-type AlGaN cladding layer 605 of 7% Al composition, n-type GaN guide layer 606, active layer 607 having a multiple quantum well (MQW) structure, overflow prevention layer 608 of p-type AlGaN (25% Al composition), p-type GaN guide Layer 60
9, a p-type AlGaN cladding layer 610 having an Al composition of 7%,
A p-type GaN first contact layer 611 is sequentially provided.
On the contact layer 611, an n-type current block layer 612 having an opening for forming a current confinement structure is provided, and further, a p-type GaN second contact layer 61 covering the same.
3. An uppermost high carrier concentration p-type GaN third contact layer 614 is sequentially disposed.

An SiO ₂ insulating film 620 is formed to protect the side surface of p-type third contact layer 614 from n-type contact layer 604. An n-side electrode (electrode pad) 621 and a p-side electrode (electrode pad) 622 are provided on the n-type contact layer 604 and the p-type contact layer 614, respectively. The n-side electrode 621 includes a Ti layer, Au
The p-side electrode 622 has a structure in which a Pt layer, a Ti layer, a Pt layer, and an Au layer are sequentially stacked from the semiconductor layer side.

In a GaN-based semiconductor laser device having such a structure, it is required that the current be concentrated on the active layer.
For this reason, even if the same current value is taken, the light emitting diode and the semiconductor laser device are greatly different in terms of current density. Since the heat value is determined by the product of the voltage and the current, the heat value of the GaN-based semiconductor laser device becomes large.

As a current supply means, a bonding wire using gold or the like is generally known. However, it is difficult to efficiently release the heat generated in the active layer with such a small cross-sectional area wire. Also, Ga
The multilayer structure of the N-based semiconductor is usually formed on a sapphire substrate, but an insulating material such as sapphire has a low thermal conductivity and does not easily escape heat. The part generating the largest amount of heat is the active layer, which is usually located relatively far from the substrate.
Therefore, it is more difficult to release the heat of the active layer from the substrate.

FIG. 28 is based on this viewpoint.
FIG. 13 is a vertical sectional side view showing a state where the illustrated semiconductor laser device (chip) 600 is mounted on a mount frame 630. The mount frame 630 is generally flat, and has a pair of mount electrode pads 631 serving as n-side and p-side electrodes on both sides.
632. The device (chip) 600 and the mount frame 630 are fixed via an adhesive layer 633. The n-side electrode (electrode pad) 621 of the device 600 and the corresponding mount electrode pad 631 are electrically connected by a normal bonding wire 636.

On the other hand, the p-side electrode (electrode pad) 622 of the device 600 and the corresponding mount electrode pad 63
2 is an In wiring layer 642 disposed on the insulating film 620
Are electrically connected by The In wiring layer 642 is made of Ga
The electrode pad 622 serves as a heat dissipation member for releasing heat generated at the interface between the N-type semiconductor multilayer structure, particularly the active layer 607 and the interface between the p-side electrode 622 and the p-type layer 614.
Has a greater thickness. The In wiring layer 642 is formed by applying In solder from the electrode pad 622 to the electrode pad 632.

As a material of the solder for forming the wiring layer 642, in addition to In, other metals such as Au, Sn and their alloys, a resin containing Ag, and a conductive oxide such as ITO. Can be used.

FIG. 29 is a vertical sectional side view showing a modification of the tenth embodiment. In this modification, similarly to the p-side, the n-side electrode (electrode pad) 621 of the device 600 and the corresponding mount electrode pad 631 are also formed of the insulating film 6.
20 are electrically connected to each other by an In wiring layer 641 disposed on the substrate 20. The In wiring layer 641 has a thickness larger than that of the electrode pad 621 in order to function as a heat dissipation member. I
The n wiring layer 641 is formed by applying In solder from the electrode pad 621 to the electrode pad 631.

Most of the heat generated in the semiconductor laser device 600 is generated by the active layer 607, the p-side electrode 622 and the p-type layer 6.
It occurs at the interface with. For this reason, it is more advantageous to radiate heat from the p-side electrode 622 which is close to them.
However, since the heat generation region does not exist on the n-type layer side, it is effective that the n-side wiring layer 641 has the same heat radiation structure as the p-side.

(Eleventh Embodiment) FIG. 30 is a longitudinal sectional side view showing a state where the semiconductor laser device (chip) 600 shown in FIG. 27 is mounted on a mount frame 730 according to the eleventh embodiment.

The mounting frame 730 has a groove 735 wider than the width of the semiconductor laser device 600 to be mounted. In the groove 735, the device (chip) 600
And the mount frame 730 are fixed via an adhesive layer 733. Outside the groove 735, a flat portion 73 that is the same height as the two electrode pads 621 and 622 of the device 600.
6 and 737 are formed, and a pair of mount electrode pads 731 and 732 serving as n-side and p-side electrodes are provided thereon. The electrode pads 621 and 622 of the device 600 and the mount electrode pads 731 and 732 are electrically connected by In wiring layers 741 and 742, respectively. The In wiring layers 741 and 742 have a thickness larger than the electrode pads 621 and 622 because they function as a heat radiating member for releasing heat generated in the GaN-based semiconductor multilayer structure.

The In wiring layers 741 and 742 are formed by applying In solder from the electrode pads 621 to the electrode pads 731 and from the electrode pads 622 to the electrode pads 732. As the solder material for forming the wiring layers 741 and 742, those described in the tenth embodiment can be used. In the present embodiment, as compared with the tenth embodiment, the distance between the electrodes between the chip and the mount frame is short, so that connection of wiring and heat radiation are easy.

The tenth and eleventh embodiments are intended to form a wiring between a chip and a mount frame with a coated conductive material in a group III nitride semiconductor laser device. Therefore, the spirit of these embodiments is not limited by the internal structure of the laser device. For example, in the case of a multilayer structure in which the current is further reduced, such as a BH structure, a portion that may generate heat increases, so that the present invention can be applied more effectively. Although the substrate is not limited to sapphire, a remarkable effect can be obtained when a substrate having low thermal conductivity is used.

[0100]

According to the present invention, by reducing the size of the electrode pad on the light extraction surface side, the light emitting area can be expanded, and a light emitting device with high luminance can be realized. Further, by connecting the electrode pads of the chip and the electrode pads of the mount frame not by wire bonding but by soldering or face-down, sufficient connection can be achieved even if the electrode pads are small. Therefore, even in a device having a semiconductor multilayer structure on an insulating substrate, the light emitting area on the light extraction surface side can be increased, and the wiring can be sufficiently connected to the electrode pads. Further, by connecting the electrode pads of the chip and the electrode pads of the mount frame with a thick wiring layer formed by coating, the heat radiation characteristics of the device can be improved.

[Brief description of the drawings]

FIG. 1 is a vertical sectional side view showing a main part of a light emitting diode according to a first embodiment of the present invention.

FIG. 2 is a plan view showing contact holes and scribe grooves in a state before the wafer is divided into chips according to the first embodiment.

FIG. 3 is a cross-sectional plan view of the light emitting diode according to the first embodiment.

FIG. 4 is a vertical sectional side view showing a state where the light emitting diode according to the first embodiment is mounted on a mount frame.

FIG. 5 is a cross-sectional plan view showing a device of a comparative example with respect to the first embodiment.

FIGS. 6A and 6B are plan layout diagrams respectively showing a device according to a conventional example and a device according to the first embodiment.

FIGS. 7A and 7B are diagrams respectively showing light emission patterns of a device according to the related art and the first embodiment.

FIG. 8 is a vertical sectional side view showing a device of a first modification example of the first embodiment.

FIG. 9 is a cross-sectional plan view showing a device according to a second modification of the first embodiment.

FIG. 10 is a plan layout view showing a light emitting diode according to a second embodiment of the present invention.

FIG. 11 is a perspective view showing a mount frame according to a second embodiment.

FIG. 12 is a cross-sectional plan view showing a light emitting diode according to a third embodiment of the present invention.

FIG. 13 is a perspective view showing a light emitting diode according to a fourth embodiment of the present invention.

FIG. 14 is a vertical sectional side view showing a modified example of the fourth embodiment.

FIG. 15 is a longitudinal sectional side view showing a state in which a light emitting diode according to a modification of the fourth embodiment is mounted on a mount frame.

FIG. 16 is a plan layout view showing a light emitting diode according to a fifth embodiment of the present invention.

FIG. 17 is a vertical sectional side view showing a semiconductor laser device according to a sixth embodiment of the present invention.

FIGS. 18A to 18D are vertical cross-sectional side views illustrating a method of manufacturing a laser device according to a sixth embodiment in the order of steps.

FIG. 19 is a vertical sectional side view showing a modification of the sixth embodiment.

FIG. 20 is a vertical sectional side view showing a state where the semiconductor laser device shown in FIG. 17 is mounted on a mount frame according to a seventh embodiment of the present invention.

FIGS. 21A and 21B are perspective views respectively showing a mount frame according to a seventh embodiment and a modified example thereof.

FIG. 22 is a vertical sectional side view showing a state where the semiconductor laser device shown in FIG. 17 is mounted on a mount frame according to an eighth embodiment of the present invention.

FIGS. 23A to 23D are perspective views respectively showing a mount frame according to an eighth embodiment and a modification example thereof.

FIG. 24 is a vertical sectional side view showing a state where the semiconductor laser device shown in FIG. 17 is mounted on a mount frame according to a ninth embodiment of the present invention;

FIGS. 25A and 25B are perspective views respectively showing a mount frame according to a ninth embodiment and a modified example thereof.

FIG. 26 is a longitudinal sectional side view showing a state where the semiconductor laser device shown in FIG. 17 is mounted on still another mount frame according to the ninth embodiment;

FIG. 27 is a vertical sectional side view showing a group III nitride semiconductor laser device according to a tenth embodiment of the present invention.

28 is a vertical sectional side view showing a state where the semiconductor laser device shown in FIG. 27 is mounted on a mount frame.

FIG. 29 is a longitudinal sectional side view showing a modification of the tenth embodiment.

FIG. 30 shows a semiconductor laser device shown in FIG.
FIG. 4 is a longitudinal sectional side view showing a state where it is attached to the mount frame according to the embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 11 ... Sapphire substrate 12 ... GaN buffer layer 13 ... Undoped GaN layer 14 ... N-type GaN layer 15 ... InGaN light emitting layer 16 ... P-type GaN layer 17 ... P-type AlGaN layer 18 ... P-type GaN contact layer 21,23,24 ... Holes 22 scribe grooves 31, 32, 51 to 54, 70 to 74, chip electrode pads 35 mount frames 36, 37 mount electrode pads 40 insulating films 41, 42 wiring layers

Claims (5)

[Claims] 1. A semiconductor light emitting device having a light extraction surface facing in a first direction, comprising a plurality of semiconductor layers stacked along the first direction so as to form a pn junction for light emission. And a multi-layer structure defining the light extraction surface and the plurality of semiconductor layers,
The first and second conductivity type first
A first main electrode disposed on the first semiconductor layer, and the first main electrode includes a first electrode pad that covers the light extraction surface and does not transmit emitted light. A second main electrode provided on the second semiconductor layer, the second main electrode including a second electrode pad that covers the light extraction surface and does not transmit emitted light; A total projection area of the first and second electrode pads with respect to a projection area of the extraction surface is set to 25% or less; first and second insulating layers disposed on sidewalls of the multilayer structure; First and second wiring layers provided on first and second insulating layers, and the first and second wiring layers are connected to the first and second electrode pads, respectively. A semiconductor light emitting device characterized by the above-mentioned. 2. The method according to claim 1, wherein the first and second electrode pads are provided with the pn.
The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device is arranged at different height levels located across the junction. 3. The light extraction surface according to claim 1, wherein the light extraction surface has a rectangular shape, and the first and second electrode pads are respectively disposed at two diagonal corners of the light extraction surface. The semiconductor light-emitting device according to claim 1. 4. A semiconductor light emitting device functioning as a semiconductor laser device, comprising: a support substrate basically made of sapphire; and a plurality of gallium nitride-based compounds stacked on the support substrate so as to form a laser resonator. A multi-layered structure having a semiconductor layer; the plurality of semiconductor layers including n and p-type semiconductor layers located on both sides of an active layer; And an extraction groove formed in the multilayer structure at a depth from the p-type semiconductor layer to the n-type semiconductor layer and parallel to the laser resonator, and at the bottom of the extraction groove, a first main electrode in contact with the n-type semiconductor layer; and a second main electrode in contact with the p-type semiconductor layer, wherein the first and second main electrodes are substantially the same with the extraction groove interposed therebetween. The semiconductor light emitting device, characterized in that the first and second electrode pads each comprising disposed thereon. 5. A semiconductor light emitting device functioning as a semiconductor laser device, comprising: an insulating support substrate; and a plurality of group III nitride semiconductor layers stacked on the support substrate so as to form a laser resonator. A multilayer structure having
The plurality of semiconductor layers include first and second conductivity-type first and second semiconductor layers, respectively, located on both sides of an active layer; and the plurality of semiconductor layers are disposed on the first and second semiconductor layers, respectively. First and second main electrodes, and the first and second main electrodes are first and second main electrodes.
Comprising an electrode pad; an insulating layer disposed on a side wall of the multilayer structure; and a pair of mount electrode pads that support the multilayer structure via the support substrate and serve as n-side and p-side electrodes. A first wiring layer disposed on or above the insulating layer and electrically connecting the first electrode pad and one of the pair of mounting electrode pads; and a first wiring layer, Having a thickness greater than the first electrode pad to function as a heat radiating member for releasing heat generated in the multilayer structure; and electrically connecting the second electrode pad and the other of the pair of mount electrode pads to each other. And a second wiring layer that is electrically connected.