JPH10229377A - Test signal generator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a test signal with high quality at a small cost by power- amplifying a combined modulation signal, resulting from applying orthogonal transformation to a combined base-band signal outputted from a band-stop filter, so as to obtain a combined test signal. SOLUTION: An in-phase component Res1 (m)-sk (m) and a quadrature component Ims1 (m)-sk (m) of each of base-band signals s1 (m)-sk (m) which are outputted from each gain adjustment device 12 and whose gain is adjusted are given to digital signal adders 14a, 14b. Each of band stop filters 15a, 15b limits a pass frequency band of each of combined base-band signals ReS(m) and ImS(m) into a prescribed frequency band. An orthogonal modulator 18 applies orthogonal modulation processing to each of received analog combined base band signals ReS(t), ImS(t), based on a local oscillation signal from a local oscillator 17 to provide an output of an analog combined modulation signal S(t). The combined modulation signal S(t) is given to a power amplifier 19, where the signal is power-amplified, and a resulting combined test signal R(t) is outputted to the outside.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CDMA (code division multiple access) communication system employed in a car telephone system, a portable telephone system, a simple portable telephone system and the like, and more particularly, to a CDMA communication system incorporated therein. The present invention relates to a test signal generator for generating a test signal for measuring characteristics of various electronic devices.

[0002]

2. Description of the Related Art In a CDMA communication system employed in the above-mentioned various mobile communication systems, as shown in FIG. 5, time-division access is not performed to one base station 1 in the same frequency band. For example, k mobile stations (subscriber terminals) 2 can communicate. Accordingly, the base station 1 receives a composite modulated signal modulated signals k channels modulated by CDMA scheme from the channel CH ₁ assigned to each mobile station 2 transmitted to the channel CH _k from each mobile station 2 I do. The base station 1 performs spectrum despreading processing on the received combined modulation signal with each PN (pseudo-random signal) pattern code sequence predetermined for each channel, and extracts communication data for each channel from the combined modulation signal. I do.

[0005] A test signal generator for generating a test signal for confirming that the base station 1 having such a function operates normally has, for example, a configuration as shown in FIG.

In this test signal generator, channels CH ₁ to C are assumed for each mobile station 2 in FIG.
The _k signal generators 3 up to H _k output analog baseband signals p ₁ (t) to p _k (t) of the CDMA system corresponding to the channels CH _{1 to} CH _k respectively allocated thereto. (T is time). Each baseband signal p ₁ (t) ~
The in-phase component Re (t) and the quadrature component Im (t) of p _k (t) are input to the band limiting filters 4a and 4b, respectively.

[0005] Each band-limiting filter 4a, 4b has a predetermined transfer function h (t), a band limitation to the passage frequency of the input baseband signal _{p 1 (t) ~p k (} t) To implement new baseband signals s ₁ (t) to s _k
Output as (t). The baseband signals s ₁ (t) to s _k (t) output from the band limiting filters 4a and 4b are
After the signal level is adjusted by the level adjusters 5 respectively,
Each is orthogonally modulated by the orthogonal modulator 6.

The modulated signals output from each quadrature modulator 6 are power-amplified to a predetermined signal level by a power amplifier 7 having the following fixed amplification factor A, and then input to a signal adder 8. The signal adder 8 combines the modulated signals of the respective channels and outputs the combined signal as a final combined test signal R (t).

The gains a ₁ -a of each level adjuster 5
_k are individually controlled by the amplitude controller 9. Also,
Each of the quadrature modulators 6 is supplied with a local oscillation signal from a local oscillator 10.

[0008]

However, the above-described test signal generating apparatus has the following problems to be improved. That is, in this test signal generator, the signals of each channel before being input to the signal adder 8 pass through individual signal paths for each channel. Therefore, the number of electronic components (hardware) constituting the test signal generator increases in proportion to the required number of multiplexed CDMA channel signals. As a result, the test signal generator becomes large-scale.

In addition, signal processing is performed independently on each channel signal for each channel. As a result, even if the electronic components incorporated in the signal path of each channel have exactly the same specifications, the dispersion of the delay amount τ in the signal line between the channels and the local oscillation There is a variation in the initial phase φ of the signal.

In general, the variation in the delay amount τ is mainly caused by the unequal length of the signal line between the channels, and the variation in the initial phase φ is mainly caused by the local oscillator 10 and each quadrature. This occurs due to the unequal length of the signal line between the carriers and the modulator 6.

In the North American Digital Cellular Telephone System Standard (hereinafter abbreviated as TIA / EIA / IS-95), which is one of the currently operating CDMA communication systems, signal multiplexing is performed as shown in FIG. CD as a method
A quadrature modulation method is added to the MA modulation method.

Therefore, in order for the base station 1 to assign CDMA channels using orthogonal spreading codes, the channels need to be synchronized with extremely high accuracy.
For this reason, variations in the delay amount τ between channels and variations in the initial phase φ of each local oscillation signal used in each quadrature modulator 6 adversely affect the communication quality of the entire CDMA communication system.

Therefore, even in a test signal generator for applying a test signal to a corresponding electronic device in order to evaluate the characteristics of various electronic devices constituting the CDMA communication system, the variation of the delay amount τ between the respective channels also occurs. In addition, it is necessary to minimize variations in the initial phase φ of each local oscillation signal.

Here, the influence of the variation of the delay amount τ between channels and the variation of the initial phase φ of each local oscillation signal on the finally output synthesized test signal R (t) is quantitatively determined.

First, the analog baseband signal s _n (t) output from each of the band limiting filters 4a and 4b is converted using the transfer function H (t) of each of the band limiting filters 4a and 4b.
It is shown by equation (1).

[0016]

(Equation 1)

Next, as shown in FIG. 6, each baseband signal s ₁ (t) generated on the signal line in each channel
Let the delay amount of s _K (t) be τ ₁ to τ _k . The baseband signals s ₁ (t) to s _K whose signal levels have been adjusted by the level adjusters 5 having gains a _{1 to} a _k , respectively.
Let the amplitude of (t) be α _{1 to} α _k . Further, assuming that a synthesized baseband signal obtained by simply synthesizing each of the baseband signals s ₁ (t) to s _k (t) obtained by the equation (1) is S (t), the synthesized baseband signal S (t) Is given by equation (2). The amplification factor A of each power amplifier 7 is fixed and is not considered.

[0018]

(Equation 2)

Further, the local oscillator 10 transmits each quadrature modulator 6
Assuming that the initial phase of the local oscillation signal to be applied to is φ ₁ to φ _k , the final synthesized test signal R (t) is represented by the product of the real part and the imaginary part of the synthesized baseband signal S (t). ,
Equation (3) is obtained.

[0020]

(Equation 3)

For example, the aforementioned TIA / EIA / IS-
Orthogonal (synchronous orthogonal) type CDM such as 95 base station signals
In the A signal, the delay amount τ between the channels described above
Of the ideal combined baseband signal S ′ (t) and each channel when it is assumed that there is no quadrature shift due to the variation of the initial phase φ of each local oscillation signal used for each quadrature modulator or the like. Baseband signal s _n (t)
Correlation (inner product) power value p _'n between is indicated by ideally (4). Note that the amplitude value of each baseband signal s _n (t) is α _n .

[0022]

(Equation 4)

It should be noted that the integration interval (σ ₁ , σ
₂ ) is a section where each baseband signal is orthogonally synchronized. The integration section (σ ₁ , σ ₂ ) is the cycle length of the spreading code (PN pattern code sequence).

That is, in a signal in which quadrature synchronization is guaranteed, any channel does not cause interference with other channels. As a result, the correlation (inner product) power value ρ ′ _n becomes the received power value of the demodulated symbol. In this case, since the ideal amplitude value of the baseband signal s _n (t) of each channel is α _n as described above, the received power has no loss, and as shown in equation (4), Α _n ² which is the square of the value.

However, in reality, a variation in the initial phase φ _{n and} a variation in the delay amount τ _n occur between the baseband signals s ₁ (t) to s _k (t) of each CDMA channel. , The actual correlation (inner product) power value ρ _n is (5)
It is shown by the formula.

[0026]

(Equation 5)

That is, in this case, the baseband signals s ₁ (t) to s _k of an arbitrary channel are generated due to the non-orthogonality caused by the variation of the initial phase φ _{n and} the variation of the delay amount τ _n.
(t) is a baseband signal s ₁ (t) to s _{k of} another channel
Interference power of λ _n with respect to (t) (reception gain or reception loss)
Can be understood.

Also, any channel itself has interference power λ _n
Affected by For this reason, when viewed from the whole CDMA channel, interference increases, and the reception quality of a receiving apparatus that receives such a signal deteriorates.

The line quality of a CDMA communication system generally includes a signal-to-noise ratio (SN or Eb / N), a reception error rate (bit error rate BER, and a symbol error rate SE).
R, frame error rate FER).

At this time, even if the CDMA channel signal, which is each modulated signal before being input to the signal adder 8, is controlled by a high-precision amplitude controller to maintain a constant signal-to-noise ratio, the orthogonality is lost. Since the non-orthogonality changes further depending on the number of multiplexed channels, the signal cannot be easily managed.

In particular, in a test signal generator used for evaluating each electronic device of a CDMA communication system,
It is necessary to minimize the deterioration of signal quality caused by this non-orthogonality in the finally output synthesized test signal R (t).

As described above, the non-orthogonality between CDMA channels is caused by generating each channel signal by independent signal processing. These are caused by the analog signal processing process including the conversion timing shift of the D / A conversion and the propagation delay in the signal line.

The present invention has been made in view of such circumstances, and the signal processing components for each channel are reduced by minimizing the number of signal processing components existing in the signal path of each channel up to the signal adder. A test signal generator capable of suppressing variations in the initial phase and delay amount between channel signals, reducing the number of signal processing members incorporated in the device, and obtaining a high-quality test signal at a low cost. The purpose is to provide.

[0034]

In order to solve the above-mentioned problems, a test signal generator according to the present invention comprises a plurality of signal generators each outputting a CDMA baseband signal assigned to its own channel; A plurality of level adjusters are provided for each signal generator and adjust the signal level of the baseband signal output from the corresponding signal generator, and the baseband signals output from each level adjuster are added. Adder that outputs the combined baseband signal as a combined baseband signal, a band limiting filter that limits a frequency component of the combined baseband signal output from the signal adder to a predetermined frequency range, and a signal that is output from the band limited filter. A quadrature modulator that quadrature-modulates the composite baseband signal and outputs the resultant as a composite modulation signal, and a quadrature modulator output from the quadrature modulator. And a power amplifier signal by power-amplifying the output as a composite test signal.

In the test signal generator configured as above, each baseband signal output from the signal generator of each channel is adjusted in level by the level adjuster, and then synthesized by the signal adder. . After the signals are synthesized, the frequency is band-limited by the band-limiting filter, and then quadrature-modulated and power-amplified to become the final synthesized test signal.

Therefore, the only signal processing component existing in the signal path of each channel up to the signal adder is a level adjuster, and the band limiting filter, quadrature modulator and power amplifier provided for each channel are not included in the signal adder. Has moved to the next stage. As a result, signal processing for each channel is reduced, and the number of signal processing members incorporated in the test signal generator is reduced.

Further, since the quadrature modulator is not provided for each channel, there is no variation in the initial phase between the channels of the local oscillation signal. Further, in a test signal generator of another invention, a plurality of signal generators each outputting a CDMA modulation signal allocated to its own channel, and a plurality of signal generators are provided for each of the signal generators. A plurality of level adjusters for adjusting the signal level of the output modulated signal, a signal adder for adding each modulated signal output from each level adjuster and outputting as a combined modulated signal, A band limiting filter that limits a frequency component of the output composite modulated signal to a predetermined frequency range; and a power amplifier that power-amplifies the composite modulated signal output from the band limited filter and outputs the amplified signal as a composite test signal. ing.

The test signal generator of the present invention does not include a quadrature modulator. Therefore, the synthesized test signal output from the test signal generator is modulated by the CDMA system but is not quadrature modulated.

Even with such a configuration, the only signal processing component existing in the signal path of each channel up to the signal adder is a level adjuster, and the band limiting filter and power amplifier provided for each channel are not provided. It is located after the signal adder. As a result, signal processing for each channel is reduced, and the number of signal processing members incorporated in the test signal generator is reduced.

[0040]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a block diagram showing a schematic configuration of a signal generator according to a first embodiment of the present invention.

Each of the k signal generators 11 for channels CH ₁ to CH _k for each mobile station is CDMA-based.
Using a (code division multiple access) method, predetermined test data is spectrum-spread with a PN pattern code sequence different from that of another channel specified in advance for its own channel, and the data obtained is spread at the transmission rate of this data. In synchronization with the clock corresponding to (transmission speed), digital baseband signals p ₁ (m), p ₂ (m), p ₃ (m), ..., _pn (m), ...,
Output as _pk (m).

Each digital baseband signal _pn
(m) is configured de-phase component Rep _n (m) and a quadrature component Imp _n (m). Here, m (= 0, 1, 2, 3...) Indicates each time (value) in the output time series, and the larger the time (value) m, the later the output time from each signal generator 11.

The baseband signals p ₁ (m) to _pk (m) output from each signal generator 11 are input to a digital gain adjuster 12, respectively. Each gain adjuster 12 adjusts the amplitude α _{1 of} each of the baseband signals p ₁ (m) to _pk (m) according to each gain a _{1 to} a _k set by the amplitude controller 13.
~ Adjust α _k to create a new baseband signal s ₁ (m) ~
Output as s _k (m).

The in-phase component Res _n (m) and the quadrature component Ims _n (m) of each of the gain-adjusted baseband signals s ₁ (m) to s _k (m) output from each gain adjuster 12 are individually Are input to the digital signal adders 14a and 14b.

One of the signal adders 14a receives the input k
In-phase components R of the baseband signals s ₁ (m) to s _k (m)
es _n (m) is signal-synthesized and sent to the next band-limiting filter 17a as one synthesized baseband signal ReS (m). Similarly, the other signal adder 14b receives the input k
And sends the number of the baseband signal _{s 1 (m) ~ s k} (m) quadrature component Ims _n (m) the signal synthesized by one composite baseband signal IMS (m) as the next band-limiting filter 17b of.

Each of the band limiting filters 15a and 15b is composed of a digital filter having a low-pass type transfer function H (m).
The pass frequency components of eS (m) and ImS (m) are band-limited to a predetermined frequency range. The preset frequency range is a frequency range when the above-described predetermined test data is spread with a PN pattern code string, and is, for example, 1.25 MHz around the carrier frequency f _C.
Frequency range.

The transfer function H (m) in the digital filter is a filter coefficient sequence in the case where the characteristics of the digital filter are simulated. The combined baseband signals ReS (m) and ImS (m) band-limited by the band-limiting filters 15a and 15b are input to D / A converters 16a and 16b, respectively. D / A converter 16
a and 16b respectively convert the inputted digital combined baseband signals ReS (m) and ImS (m) into analog combined baseband signals ReS (t) and ImS (t), and perform the next quadrature modulation. To the container 18.

The quadrature modulator 18 performs quadrature modulation processing on each of the analog synthesized baseband signals ReS (t) and ImS (t), which are local oscillation signals input from the local oscillator 17. It is output as an analog composite modulated signal S (t).

The analog composite modulated signal S (t) output from the quadrature modulator 18 is power-amplified by the power amplifier 19 having the following predetermined amplification factor A, and the final composite test signal R (t) is output.
Output to the outside as (t).

In the test signal generator configured as described above, the band limiting filters 15a and 15b and the power amplifier 19 are provided with the respective base band signals s ₁ (m) for each channel.
To s _k (m), respectively.
14b is provided after.

Therefore, as compared with the case where the band limiting filters 4a and 4b and the power amplifier 7 are provided for each channel as in the conventional apparatus shown in FIG. Can be greatly reduced. Therefore, the configuration of the entire apparatus can be simplified, and the manufacturing cost can be significantly reduced. In particular, the saving effect of the band limiting filters 15a and 15b constituted by digital filters having large-scale device elements cannot be achieved.

In this embodiment, the band limiting filters 15a and 15b are constituted by digital filters. The digital filter can easily obtain steep rising and falling characteristics as shown in FIG. 3 by improving the setting accuracy of the transfer function H (m). In comparison, the leakage power with respect to the adjacent channel adjacent in the frequency direction can be further reduced.

Further, the power consumption of the entire apparatus can be reduced. That is, at present, the logic circuit of a general digital signal processing device is configured by CMOS logic. The power consumption of CMOS logic increases almost in proportion to the operating speed. Normally, digital filters operate at four times or more the input signal (oversampling rate> 4).

In the first embodiment shown in FIG. 1, the combined baseband signal S '(m) obtained by summing the baseband signals s ₁ (m) to s _k (m) is converted into a band-limited filter composed of a digital filter. It becomes an input signal to 15a and 15b. At this time, the information rate of the synthesized baseband signal S ′ (m) is D. The synthesized baseband signal S '(m) has already been oversampled in accordance with the oversampling rate of the digital filters 15a and 15b.
When the oversampling rate is L, the synthesized baseband signal S '(m / L) at the time when m / L is an integer
Takes an arbitrary value other than 0 only for the sample of.

For this reason, the synthesized baseband signal S '(m)
Since digital multiplication and digital addition are performed by the leveler adjuster 12 and the signal adders 14a and 14b before the digital filter processing by the band-limiting filters 15a and 15b, the digital multiplier / adder is a D / L. Only the operating speed is required.

On the other hand, in the conventional apparatus shown in FIG. 6, before signal addition, band limitation processing, orthogonal transformation processing, and power amplification processing are performed for each channel, so that the power consumption is large. .

Next, the amount of delay τ generated in the signal line of each channel will be verified. In FIG. 1, each adder 14
Each of the baseband signals s _n (m) after the level adjustment input to the signals a and 14b are represented by the following equation (6).

S _n (m) = α _{n pn} (m) (6) Next, the combined baseband signal ReS (m) of the in-phase component output from each of the signal adders 14a and 14b and the combined quadrature component A combined baseband signal S ′ (m) obtained by combining the baseband signal ImS (m) is expressed by the following equation (7).

[0059]

(Equation 6)

Further, the synthesized baseband signal S '
When (m) is band-limited by the digital band-limiting filters 15a and 15b, the combined baseband signal S ″ (m) of equation (8) is obtained.

[0061]

(Equation 7)

As described above, since most of the signal processing of the test signal generator is performed by digital signal processing, the synthesized baseband signal S '(m) after signal synthesis by the signal adders 14a and 14b is represented by ( As is apparent from the equation (7), the delay amount due to the unequal length of the signal line between the respective channels is apparent as compared with the combined baseband signal S (t) shown in the equation (2) in the conventional device. The influence of the variation in τ can be eliminated.

That is, at this point, the factor of non-orthogonality of the baseband signal caused by the propagation delay in the signal line does not theoretically occur. Further, only one quadrature modulator 18 is provided at the subsequent stage of the signal adders 14a and 14b. Therefore, as in the conventional device shown in FIG. 6, the dispersion of the initial phase φ of the local oscillation signal caused when a plurality of quadrature modulators 6 are installed in the signal path of each channel before the signal adder 8 is reduced. It is possible to eliminate the influence on the synthesized test signal that is ultimately output.

As described above, in the present embodiment, since the signal of each channel is subjected to signal level adjustment and signal addition processing by digital processing, temperature and humidity, frequency characteristics, isolation, and linearity (distortion) are obtained. Since the adverse effect on the CDMA channel amplitude control caused by the analog amplitude controller / adder does not exist theoretically, the amplitude ratio of each channel can be set very accurately.

Next, the test signal generator of this embodiment is
FIG. 2 shows the result of applying the above-described signal generation method based on TIA / EIA / IS-95. FIG. 2 shows a code area (1) based on the above-mentioned equation (4) in channels 0 to 63.
To m) are the results of measuring the received powers ρ _{1 to} ρ ₆₃ . In this case, as shown in Table 1, the power ratio of each channel was set.

[0066]

[Table 1] As a result, the results shown in Table 2 were obtained.

[0067]

[Table 2]

According to the results shown in Table 2, the power loss λ _n is 1% or less for each channel, and the performance is close to the measurement accuracy of the received power ρ _n in the code domain. It was demonstrated that orthogonality could be established.

The received power ρ _n in the code area of the CDMA channel signal that is not actually output is about −50.
This is also proved from the fact that the signal is suppressed to dB (0.00001).

(Second Embodiment) FIG. 4 is a block diagram showing a schematic configuration of a test signal generator according to a second embodiment of the present invention.

The k signal generators 21 from channel 1 to channel k use the CDMA system to convert predetermined test data into a PN pattern code sequence different from that of the other channels specified in advance for its own channel. The transmission rate (transmission speed) of the data obtained by spreading the data
In synchronization with the clock corresponding to
₁ (m), q ₂ (m), q ₃ (m), ..., q _n (m), ..., q _k
Output as (m).

The digital modulation signals q ₁ (m) to q _k (m) output from the signal generators 21 are input to the digital gain adjusters 22, respectively. Each gain adjuster 22 adjusts the amplitudes α _{1 to} α _k of the modulated signals q ₁ (m) to q _k (m) according to the gains a _{1 to} a _k set by the amplitude controller 23, and newly adjusts the amplitudes. outputs Do as a modulated signal _{r 1 (m) ~ r k} (m).

[0073] Each modulation signal r ₁ output from the gain adjuster _{22 (m) ~ r k (} m) is being signal synthesized by the signal adder 24, is one of the composite modulation signal Q (m). One combined modulation signal Q (m) output from the signal adder 24 is input to the band limiting filter 25. The band limiting filter 25 constituted by a digital filter is constituted by a digital filter having a transfer function H (m) similarly to the band limiting filters 15a and 15b in the first embodiment shown in FIG. The pass frequency component of the synthesized modulated signal Q (m) is band-limited to a predetermined frequency range.

The digital combined modulated signal Q (m) output from the band limiting filter 25 is converted by the following D / A converter 26 into an analog combined modulated signal Q (t). The analog composite modulated signal Q (t) output from the D / A converter 26 is power-amplified by a power amplifier 27 having the following predetermined amplification factor A, and is externally output as a final composite test signal R (t). Output to

In the test signal generator of the second embodiment configured as described above, the quadrature modulator 18 is eliminated as compared with the test signal generator of the first embodiment shown in FIG. That is, the synthesized test signal R (t) output from the test signal generator of the second embodiment is modulated by the CDMA method, but is not quadrature modulated.

However, also in the test signal generator having such a configuration, the band limiting filter 25 and the power amplifier 2
Since 7 is installed at the subsequent stage of the signal adder 24, the required number of electronic components can be reduced, and almost the same effects as those of the first embodiment shown in FIG. 1 can be obtained.

[0077]

As described above, in the test signal generator of the present invention, the band limiting filter and the power amplifier are moved to the subsequent stage of the signal adder, and the signal of each channel from the signal generator to the signal adder is transferred. The number of signal processing components existing on the road is reduced as much as possible.

Therefore, the signal processing for each channel can be reduced, and the cause of the failure caused by the variation in the phase and the delay amount between the respective channel signals included in the finally output synthesized test signal can be suppressed. Thus, the number of signal processing members to be incorporated in the device can be reduced, and a high-quality test signal can be obtained at a small cost.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a test signal generator according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a measurement result of received power in the first embodiment device;

FIG. 3 is a diagram showing a frequency characteristic of a band limiting filter in the first embodiment.

FIG. 4 is a block diagram illustrating a schematic configuration of a test signal generator according to a second embodiment of the present invention.

FIG. 5 is a schematic diagram showing a general digital communication system.

FIG. 6 is a block diagram showing a schematic configuration of a conventional test signal generator.

[Description of Signs] 11, 21 Signal generator 12, 22 Level adjuster 13, 23 Amplitude controller 14a, 14b, 24 Signal adder 15a, 15b, 25 Band limiting filter 16a, 16b, 26 ... D / A converter 17 Local oscillator 18 Quadrature modulator 19, 27 Power amplifier

Claims (2)

[Claims] 1. C assigned to its own channel
A plurality of signal generators (11) for outputting a baseband signal of a DMA system; and a plurality of level adjusters provided for each of the signal generators for adjusting the signal level of the baseband signal output from the corresponding signal generator. (12), signal adders (14a, 14b) for adding the respective baseband signals output from the respective level adjusters and outputting as a synthesized baseband signal, and a synthesized base output from the signal adder A band-limiting filter (15a, 15b) for limiting a frequency component of the band signal to a predetermined frequency range, and a quadrature modulator for quadrature-modulating a combined baseband signal output from the band-limited filter and outputting as a combined modulation signal A test signal generator comprising: (18), and a power amplifier (19) for power-amplifying the combined modulated signal output from the quadrature modulator and outputting the amplified signal as a combined test signal. 2. C assigned to its own channel
A plurality of signal generators for outputting a modulation signal of a DMA system (21)
A plurality of level adjusters (22) provided for each of the signal generators for adjusting the signal level of the modulation signal output from the corresponding signal generation unit; and each of the modulation signals output from each of the level adjusters. A signal adder (24) that adds the resultant signals and outputs a synthesized modulation signal; a band-limiting filter (25) that limits a frequency component of the synthesized modulation signal output from the signal adder to a predetermined frequency range; A power amplifier (27) that power-amplifies the composite modulated signal output from the band-limiting filter and outputs it as a composite test signal
And a test signal generator comprising: