JPH10144723A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent stress from remaining in a inner lead subsequent to a bonding. SOLUTION: In a connection process, a chip 10 is bonded to a tape carrier 1 with an inner lead 4 and outer leads 5, which are laid on one main surface of the chip 10, via an insulating film 8. A notch 6 is formed in the inner lead 4 at a biased position on the inner lead 4. In an inner lead bonding process, the short part 4a of the inner lead 4 is tapped with a bonding tool 13, is cut and thereafter, a cut part piece on the side of the long part 4 of the inner lead 4 is curved by the tool 13 and is thermally pressure-bonded to an electrode pad 12. In a resin sealing process, a silicone rubber is potted in a window hold 3 formed in a carrier main body 2 and a resin-sealed part 14 is formed. Bumps 15 are respectively formed on bump formation holes 7 formed in the outer leads 5. Accordingly, as a stress can be prevented from remaining in the inner lead subsequent to the bonding, the inner lead can be prevented from being disconnected by a thermal stress to act on a CSB(chip size package) and an IC.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for manufacturing a semiconductor device, and more particularly to a technique for bonding an inner lead laid on a carrier to an electrode pad formed on a semiconductor chip (hereinafter referred to as a chip). ,
A chip with a size equal to or approximately equal to the chip size
Size Package (Chip Size Packa)
ge or Chip Scale Package. Hereinafter, it is called CSP. ) That are effective for use in a method of manufacturing a semiconductor integrated circuit device (hereinafter, referred to as an IC).

[0002]

2. Description of the Related Art As electronic devices using ICs have become smaller and thinner, there has been a demand for smaller IC packages. Various CSPs have been developed to meet this demand,
One example is a CSP configured as follows. That is, the tape carrier is mechanically connected to the main surface of the chip on the electrode pad side by an insulating film, and each inner lead laid on the tape carrier is inner lead bonded to each electrode pad of the chip. Bumps as external terminals are protruded from the outer leads by soldering.

[0003] As an inner lead bonding method in this CSP, there is a method in which an inner lead is dropped down on an electrode pad by a bonding tool and subjected to ultrasonic thermocompression bonding.

[0004] As an example describing the CSP, a press release from Press Journal Inc., May 1995, "Monthly Se
Micon conductor World "P103-P1
There are 31.

[0005]

However, in the above-mentioned inner lead bonding method, the inner lead extending horizontally and straight is hit down on the electrode pad by a bonding tool, so that the inner lead is distorted due to distortion. Stress remains in the inner lead after lead bonding, and as a result, when a stress due to a difference in thermal expansion coefficient (hereinafter referred to as thermal stress) acts during a temperature cycle acceleration test or the like, a crack is formed in the stress remaining portion of the inner lead. There is a problem that enters.

An object of the present invention is to provide a semiconductor device manufacturing technique capable of preventing a stress from remaining in an inner lead after inner lead bonding.

[0007] The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0008]

The outline of a typical invention among the inventions disclosed in the present application is as follows.

That is, at the time of inner lead bonding, after a part of the inner lead is hit and cut by the bonding tool, one of the cut pieces is bent by the bonding tool and pressed against the electrode pad for bonding. It is characterized by the following.

According to the above-mentioned means, since the cut piece of the inner lead that is cut by hitting with the bonding tool is bent by the bonding tool and bonded to the electrode pad, distortion occurs in the inner lead during the inner lead bonding. Can be prevented, and stress due to distortion can be prevented from remaining in the inner lead after the inner lead bonding.

[0011]

1A and 1B show a method of manufacturing a CSP IC according to an embodiment of the present invention. FIG. 1A is a front sectional view showing a state after a tape carrier and a chip are connected.
(B) is a front sectional view showing a cutting step of the inner lead,
(C) is a front sectional view showing a bonding step after cutting an inner lead, (d) is a front sectional view showing a state after a potting step, and (e) is a front sectional view showing a state after a bump forming step. 2A and 2B show a tape carrier, wherein FIG. 2A is a partially omitted plan view, and FIG. 2B is a front sectional view. 3A and 3B show a chip, wherein FIG. 3A is a plan view and FIG. 3B is a front sectional view. FIG. 4 is an external perspective view showing the manufactured CSP IC.

In the present embodiment, a method of manufacturing a semiconductor device according to the present invention includes an IC having a CSP (hereinafter referred to as an IC).
It is called CSP IC. ). The tape carrier 1 shown in FIG. 2 is used for the method of manufacturing the CSP / IC. The tape carrier 1 as a carrier is used in a TCP / IC (IC having a tape carrier package) manufacturing method.
It corresponds to an AB (tape automated bonding) tape. Since the tape carrier 1 is configured so that the same pattern is repeated in the longitudinal direction, the description and illustration of the configuration are made for only one unit.

The tape carrier 1 is provided with a carrier body 2 formed of an insulating resin such as polyimide and having the same pattern integrally formed in a tape shape that is continuous in the longitudinal direction. The carrier body 2 is elongated in the width direction. A rectangular window hole 3 is opened. A plurality of inner leads 4 are wired on one main surface (hereinafter, referred to as a lower surface) of the carrier body 2 so as to straddle the window hole 3. Each outer lead 5 is connected to one end of each inner lead 4 in series. That is, the inner lead 4 and the outer lead 5 which are arranged in series are mechanically and electrically integrated with each other. The group of inner leads 4 and the group of outer leads 5 are formed using a conductive material such as copper or gold. As a method of forming the inner lead 4 group and the outer lead 5 group, a copper foil fixed to the carrier main body 2 by an appropriate means such as welding or bonding is patterned by lithography and etching, or the carrier main body 2 is lithographically processed. And a method of selectively performing a gold plating process.

The inner leads 4 are wired in parallel with each other at intervals in the width direction of the carrier body 2. A pair of triangular notches 6 are formed at both ends of a portion of each inner lead 4 cross-linked to the window hole 3 so as to cut inward at the pointed end. That is, the inner lead 4 can be easily cut at the line connecting the notches 6. In each inner lead 4, the pair of notches 6, 6 are arranged at positions offset from the center to one side of the window hole 3 (hereinafter, referred to as a left side). That is, both notches 6 in the inner lead 4 are closer to the left side of the window hole 3 (hereinafter, referred to as short portions).
The length of 4a is equal to both notches 6, 6 in inner lead 4.
Is shorter than the length of a portion (hereinafter, referred to as a long portion) 4b far from the left side of the window hole 3.

The adjacent outer leads 5, 5 extend alternately in the left and right directions with respect to the window hole 3. A bump forming hole 7 is formed at a predetermined position of each outer lead 5 in the carrier body 2, and a bump soldering surface of the outer lead 5 is exposed at the bottom of the bump forming hole 7.

An insulating film 8 made of silicon rubber is adhered to the lower surface of the carrier body 2 by an appropriate means such as bonding, and the inner lead 4 group and the outer lead 5 group are covered with the insulating film 8. At a portion of the insulating film 8 facing the window hole 3 of the carrier body 2, the window hole 9 having a rectangular hole shape is slightly larger than the window hole 3 of the carrier body 2 so that the inner leads 4 are exposed to the outside. It is open. Therefore, the tape carrier 1 is composed of the carrier body 2,
It is composed of a group of inner leads 4, a group of outer leads 5 and an insulating film 8.

As shown in FIG. 3, the chip 10 is formed in the shape of a rectangular flat plate having a size substantially equal to one unit of the tape carrier 1, and its one main surface side (hereinafter referred to as the active area side). ) Includes a desired semiconductor integrated circuit (not shown) including a semiconductor element. In other words, the chip 10 is manufactured by forming a semiconductor integrated circuit on the active area side in the state of a semiconductor wafer (not shown) in a so-called IC manufacturing pre-process, and cutting the chip into a rectangular flat plate shape in a dicing process. Chip 1
0 is covered with a passivation film 11.
The electrode pad 12 is formed in an opening formed in the substrate so as to be exposed to the outside. A plurality of electrode pads 12 are formed, and each inner lead 4 in the tape carrier 1 is formed.
It is supported.

The chip 10 configured as described above is mechanically connected to the tape carrier 1 according to the above configuration as shown in FIG. That is, the chip 10 is disposed on the tape carrier 1 such that the electrode pads 12 are aligned with the respective inner leads 4, and is bonded and mechanically connected between the passivation film 11 and the insulating film 8. In this state, each inner lead 4 is connected to each electrode pad 1
2 are opposed to each other at positions separated upward by the thickness of the insulating film 8 and the adhesive layer (not shown).
In each of the inner leads 4, the pair of notches 6, 6 are arranged at a position deviated to the left from directly above the electrode pad 12, and the substantially central portion of the long portion 4b of the inner lead 4 is The state is located directly above the pad 12.

Next, as shown in FIG.
The bonding tool 13 is a short portion 4a of the inner lead 4.
Is shot down at high speed from the tape carrier 1 side. That is, the short portion 4 a of the inner lead 4 is strongly beaten by the bonding tool 13. The short portion 4a of the inner lead 4 is cut off from the line connecting the notches 6, 6 by the impact force of the bonding tool 13, and the cut piece forms an adhesive portion with the carrier body 2 at the opening edge of the window hole 3. From the starting point. As a result, the long part 4b of the inner lead 4
Is cut off from the line connecting both notches 6 and 6 with respect to the bent short portion 4a, and the cut piece is horizontally moved from the right side opening edge of the window hole 3 of the carrier body 2 to the electrode pad
Overhanging for a long time. Incidentally, the length of the short portion 4a of the inner lead 4 is
It is desirable that the width be determined in accordance with the width of No. 3.

Thereafter, as shown by the trajectory line in FIG. 1C, the bonding tool 13 is slightly raised and lowered to the cut-side end of the cut piece of the long portion 4b of the inner lead 4, It is moved to the position of the electrode pad 12. By the operation of the bonding tool 13,
The cut end of the cut portion of the long portion 4 b of the inner lead 4 is bent and pressed against the electrode pad 12. The bonding tool 13 presses the cut-side end of the cut piece of the long portion 4b of the inner lead 4 against the electrode pad 12, and performs thermocompression bonding by applying heat and ultrasonic energy. Incidentally, it is desirable that the long portion 4b of the inner lead 4 is determined according to the position with respect to the electrode pad 12 and the thickness of the insulating film 8.

In the above-described inner lead bonding, the short portion 4a of the inner lead 4 is cut by the bonding tool 13 at the boundary between the notches 6, 6 before the inner lead 4 is locally thermocompressed (bonded) to the electrode pad 12. It is hit and cut at the notch 6, and the cut end of the cut portion of the long portion 4b after cutting is bonded to the electrode pad 12 by the bonding tool 13, so that the bonding portion of the inner lead 4 has a large bending. No stress is applied. As a result, no stress remains on the inner leads 4 after the inner lead bonding.

Thereafter, the chip 10 is electrically connected to the tape carrier 1 by repeating the above-described inner lead bonding operation for each inner lead 4.

When the above-described inner lead bonding operation is completed for all the inner leads 4, FIG.
As shown in (1), the inner lead 4 group is resin-sealed by the resin sealing portion 14 by potting an insulating material such as silicon rubber inside the window hole 3 of the tape carrier 1.

Next, as shown in FIG. 1E, a solder ball (not shown) is soldered to the bump forming hole 7 of each outer lead 5 of the tape carrier 1, so that the bump 15 is taped. It is formed so as to protrude from the upper surface of the carrier 1.

According to the above embodiment, the following effects can be obtained. When bonding the inner lead 4 to the electrode pad 12, a short portion 4 a of the inner lead 4 is used.
Is cut by hitting with a bonding tool 13, and then the long portion 4 of the inner lead 4 is cut by the bonding tool 13.
By bending the cut piece on the b side and pressing the cut side end against the electrode pad 12, it is possible to prevent the inner lead 4 from being distorted during the inner lead bonding. It is possible to prevent a stress due to distortion from remaining in the inner lead 4 beforehand.

By preventing the residual stress from being generated in the inner lead 4 after the inner lead bonding, it is possible to prevent the inner lead 4 from being disconnected due to a thermal stress acting during a temperature cycle acceleration test or the operation of the CSP / IC. Therefore, the quality and reliability of the CSP IC and the production yield can be improved.

Since the cutting of the inner lead 4 and the bonding after the cutting are continuously performed by a series of operations of the same bonding tool 13, the inner lead bonding operation can be completed at the same stage. The working time for bonding can be reduced, and the structure of the inner lead bonding apparatus can be simplified. By the way,
By using an existing wire bonding apparatus, the same bonding tool can continuously perform the cutting operation of the inner lead and the bonding operation after cutting.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above-described embodiments and can be variously modified without departing from the gist thereof. Needless to say, there is.

The carrier body, which is a carrier of the inner lead group and the outer lead group, is not limited to a tape, and may be made of a material such as a resin film having an insulating property, a ceramic or a resin having an insulating property. It may be constituted by a rigid substrate formed in this way.

The inner lead bonding is not limited to being sequentially performed for each inner lead, and a plurality of inner leads may be collectively gang bonded.

The bonding tool may be composed of a bonding tool that taps the inner lead and a bonding tool that presses the beaten inner lead against the electrode pad.

The bonding method for electrically connecting the inner lead to the electrode pad is not limited to the ultrasonic thermocompression bonding method, but may be a pressure welding method or a eutectic method.

In the above description, the invention made mainly by the inventor has been described in terms of the CSP which is the application field in which the invention is based.
-The case where the method is applied to an IC manufacturing method has been described.
The present invention is not limited to this, and can be applied to all methods of manufacturing semiconductor devices such as a method of manufacturing an IC having a face down ball grid array package.

[0034]

The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.

In bonding the inner lead to the electrode pad of the chip, the inner lead is cut by hitting the inner lead with a bonding tool, and one of the cut pieces is bent by the bonding tool and bonded to the electrode pad. Since the occurrence of distortion in the inner leads during bonding can be prevented, it is possible to prevent the stress due to the distortion from remaining in the inner leads after the inner lead bonding.

[Brief description of the drawings]

FIGS. 1A and 1B show a method of manufacturing a CSP IC according to an embodiment of the present invention, wherein FIG. 1A is a front sectional view showing a state after a tape carrier and chip are connected, and FIG. , (C) is a front sectional view showing a bonding step after cutting the inner lead, (d) is a front sectional view showing after a potting step, and (e) is a front sectional view showing after a bump forming step. It is.

FIGS. 2A and 2B show a tape carrier, wherein FIG. 2A is a partially omitted plan view and FIG. 2B is a front sectional view.

3A and 3B show a chip, wherein FIG. 3A is a plan view and FIG.
Is a front sectional view.

FIG. 4 is an external perspective view showing the manufactured CSP IC.

[Explanation of symbols]

1 ... tape carrier (carrier), 2 ... carrier body,
3 ... window hole, 4 ... inner lead, 4a ... short part, 4b ...
Long part (cut piece), 5 ... Outer lead, 6 ... Notch, 7 ... Bump forming hole, 8 ... Insulating film, 9 ... Window hole, 10 ...
Chip, 11: passivation film, 12: electrode pad, 13: bonding tool, 14: resin sealing part, 15
…bump.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Tomoaki Shimoishi 5-20-1, Kamimizuhoncho, Kodaira-shi, Tokyo Nichicho Cho LSI Engineering Co., Ltd. (72) Inventor Yukiharu Akiyama Tokyo Hitachi, Ltd. Semiconductor Division, 5-2-1, Josuihoncho, Kodaira City, Tokyo (72) Inventor: Mamoru Mita 3-1-1, Sukekawacho, Hitachi City, Ibaraki Prefecture Inside the cable plant of Hitachi Cable, Ltd.

Claims (4)

[Claims] A semiconductor chip is mechanically connected via an insulating film to a carrier having an inner lead group and an outer lead group laid on one main surface, and each of the inner leads is connected to each electrode pad of the semiconductor chip. A method of manufacturing a semiconductor device having inner lead bonding, wherein in the inner lead bonding, after a part of the inner lead is hit and cut by a bonding tool, one of the cut pieces is bent by the bonding tool. And bonding by being pressed against the electrode pad. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor chip is mechanically mounted on the carrier having an inner lead group and an outer lead group laid on one main surface via the insulating film. A connecting step of connecting, and after a part of the inner lead is beaten and cut by a bonding tool, one of the cut pieces is bent by the bonding tool and pressed against the electrode pad to be bonded. A method for manufacturing a semiconductor device, comprising: a lead bonding step. 3. A notch is formed on each inner lead at a position deviated from the center, and a portion of the inner lead on the side of the notch deviated is hit by the bonding tool and cut at the notch. 3. The method according to claim 1, wherein a portion of the inner lead on the side where the notch has been moved away is bonded to the electrode pad by the bonding tool.
13. The method for manufacturing a semiconductor device according to item 5. 4. The method according to claim 1, wherein the cutting of the inner lead and the bonding after the cutting are continuously performed by a series of operations of the same bonding tool.
4. The method for manufacturing a semiconductor device according to 2 or 3.