JPH0382085A - Semiconductor photodetector and manufacture thereof - Google Patents
Semiconductor photodetector and manufacture thereofInfo
- Publication number
- JPH0382085A JPH0382085A JP1218209A JP21820989A JPH0382085A JP H0382085 A JPH0382085 A JP H0382085A JP 1218209 A JP1218209 A JP 1218209A JP 21820989 A JP21820989 A JP 21820989A JP H0382085 A JPH0382085 A JP H0382085A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type
- type impurity
- inp
- junction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000012535 impurity Substances 0.000 claims abstract description 101
- 230000031700 light absorption Effects 0.000 claims abstract description 13
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 238000002513 implantation Methods 0.000 claims description 40
- 238000009792 diffusion process Methods 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 8
- 238000002347 injection Methods 0.000 claims description 6
- 239000007924 injection Substances 0.000 claims description 6
- 238000009826 distribution Methods 0.000 abstract description 12
- 238000005468 ion implantation Methods 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 240000002329 Inga feuillei Species 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052793 cadmium Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910001425 magnesium ion Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
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- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
[概要]
半導体受光素子及びその製造方法、特にInGaAsを
光吸収層としInPを増倍層としたInp/InGaA
sアバランシェフォトダイオード及びその製造方法に関
し、
接合面における濃度分布が急峻なpn接合を有し、製造
上の再現性も高い素子構造の半導体受光素子及びその製
造方法を提供することを目的とし、n型I rxGaA
s光吸収層とn型InP層の中間にn型1 nGaAs
P中間層を設け、前記n型InP層の表面にn型不純物
拡散領域を設けた半導体受光素子において、前記n型I
rhPjl中の前記n型不純物拡散領域下にP型不純物
をイオン注入して形成したP型不純物注入層と、前記P
型不純物注入層下にn型不純物をイオン注入して形成し
たn型不純物注入層とを有し、前記n型不純物注入層と
n型不純物注入層が接する界面でpn接合を形成するよ
うに構成するや
[産業上の利用分野]
本発明は半導体受光素子及びその製造方法、特にI n
GaAsを光吸収層としInPを増倍層とし?InP/
InGaAsアバランシェフォトダイオード及びその製
造方法に関する。[Detailed Description of the Invention] [Summary] A semiconductor light-receiving device and its manufacturing method, especially Inp/InGaA with InGaAs as a light absorption layer and InP as a multiplication layer.
Regarding an avalanche photodiode and a method for manufacturing the same, the purpose of the present invention is to provide a semiconductor light-receiving device having a pn junction with a steep concentration distribution at the junction surface and a device structure with high manufacturing reproducibility, and a method for manufacturing the same. Type I rxGaA
n-type 1 nGaAs between the s light absorption layer and the n-type InP layer
In the semiconductor light-receiving element in which a P intermediate layer is provided and an n-type impurity diffusion region is provided on the surface of the n-type InP layer, the n-type I
A P-type impurity implantation layer formed by ion-implanting a P-type impurity under the n-type impurity diffusion region in rhPjl;
An n-type impurity implantation layer formed by ion-implanting an n-type impurity under the type impurity implantation layer, and configured to form a pn junction at the interface where the n-type impurity implantation layer and the n-type impurity implantation layer contact. [Industrial Field of Application] The present invention relates to a semiconductor photodetector and a method for manufacturing the same, particularly an I n
What about GaAs as a light absorption layer and InP as a multiplication layer? InP/
The present invention relates to an InGaAs avalanche photodiode and a method for manufacturing the same.
[従来の技術]
近年、1こ3μm又は1.55μm波長で数ギガビット
/秒の超高速システムの実用化が検討される段階にきて
いる。このような超高速システム用では高感度で高速応
答可能な半導体受光素子が要求される。現在供給可能な
半導体受光素子のなかでは、I nGaAsを光吸収層
としInPを増倍層としたInP/InGaAsアバラ
ンシ正フォトダイオードが最も高感度で最も高速応答可
能なものとして期待されている。[Prior Art] In recent years, we have reached the stage where the practical application of ultra-high-speed systems of several gigabits/second at a wavelength of 1 to 3 μm or 1.55 μm is being considered. For such ultra-high-speed systems, a semiconductor light-receiving element that is highly sensitive and capable of high-speed response is required. Among currently available semiconductor photodetectors, an InP/InGaAs avalanche positive photodiode with an InGaAs light absorption layer and an InP multiplication layer is expected to have the highest sensitivity and the fastest response.
従来のI nP/I nGaAsアバランシェフォトダ
イオードである半導体受光素子を第4図に示す。FIG. 4 shows a semiconductor light receiving element which is a conventional InP/InGaAs avalanche photodiode.
n型InP基板10上に形成されたn−型InGaAs
光吸収層12とn−型InP層16の間にn−型InG
aAsP中間層14が形成されている。n−型InP層
1層中6中81等のn型不純物を注入したn型不純物注
入層18が形成されている。n−型InP116表面に
は、Beのイオン注入により形成したリング形状のガー
ドリング20と、受光部分にCdを熱拡散したP型不純
物拡散領域22が形成されている。このn型不純物拡散
領域22とn型不純物注入層18とでρn接合を形成し
ている。n型不純物注入層18hp型不純物拡散fi域
22との間に増倍領域が形成される。n-type InGaAs formed on n-type InP substrate 10
n-type InG between the light absorption layer 12 and the n-type InP layer 16
An aAsP intermediate layer 14 is formed. An n-type impurity implantation layer 18 is formed in which n-type impurities such as 81 out of 6 in one n-type InP layer are implanted. A ring-shaped guard ring 20 formed by Be ion implantation and a P-type impurity diffusion region 22 formed by thermally diffusing Cd into the light receiving portion are formed on the surface of the n-type InP 116. This n-type impurity diffusion region 22 and the n-type impurity injection layer 18 form a ρn junction. A multiplication region is formed between the n-type impurity implantation layer 18 and the hp-type impurity diffusion fi region 22.
n−型InP層1層上6上保護膜24を介してT i
/ P t / A uのPE極26が形成され、n、
jlJInP基板】Oの背面にはA u / G eの
n t % 28が形成されている。Ti
/ P t / A u PE pole 26 is formed, n,
jlJInP substrate] On the back surface of O, nt% 28 of A u/G e is formed.
一般にInP/InGaAsアバランシェフォトダイオ
ードにはa B[(Gain BandwidthM)
ニよる帯域制限がある。すなわち、利得である増倍率
を大きく取ろうとすると応答できる周波数帯域が低下す
る。I nP/I nGaAsアバランシェフォトダイ
オードの場合、GB積は通常30〜50GH2であり、
数ギガビット/秒の超高速システムに利用する場合、さ
らに大きなGB積を有し、しかも製造上、再現しやすい
素子構造が必要となる。Generally, InP/InGaAs avalanche photodiodes have a B[(Gain BandwidthM)
There are bandwidth limitations due to That is, if an attempt is made to increase the multiplication factor, which is the gain, the frequency band that can respond will decrease. For InP/InGaAs avalanche photodiodes, the GB product is typically 30-50GH2;
When used in an ultrahigh-speed system of several gigabits/second, an element structure that has a larger GB product and is easy to reproduce in manufacturing is required.
[発明が解決しようとする課題]
上述のように、第4図に示す従来のInP/InGaA
sアバランシェフォトダイオードは、pn接合を形成す
る一方のn型不純物拡散領域22がn型不純物の熱拡散
により形成されている。しかしながら、熱拡散では精密
な深さ制御ができないため安定したpn接合を形成する
ことが困難であるという問題があった。また、良好なp
n接合を形成し、大きなGB積を確保するためには、濃
度プロファイル自身もテール部のない急峻なものが求め
られているが、不純物拡散ではそのような濃度プロファ
イルを形成することが困難であるという問題があった。[Problem to be solved by the invention] As mentioned above, the conventional InP/InGaA shown in FIG.
In the s-avalanche photodiode, one n-type impurity diffusion region 22 forming a pn junction is formed by thermal diffusion of n-type impurities. However, thermal diffusion has a problem in that it is difficult to form a stable pn junction because precise depth control cannot be performed. Also, good p
In order to form an n-junction and secure a large GB product, a steep concentration profile with no tail is required, but it is difficult to form such a concentration profile with impurity diffusion. There was a problem.
本発明は上記事情を考慮してなされたもので、接合面に
おける濃度分布が急峻なpn接合を有し、製造上の再現
性も高い素子構造の半導体受光素子及びその製造方法を
提供することを目的とする。The present invention has been made in consideration of the above circumstances, and it is an object of the present invention to provide a semiconductor light-receiving device having a pn junction with a steep concentration distribution at the junction surface and a device structure with high manufacturing reproducibility, and a method for manufacturing the same. purpose.
[flBを解決するだめの手段]
上記目的は、n型I nGaAs光吸収贋とnlIrx
P層の中間にn型InGaAsP中間層を設け、前記n
型In1層の表面にP型不純物拡散領域を設けた半導体
受光素子において、前記n型InP層中の前記P型不純
物拡散領域下にP型不純物をイオン注入して形成したP
型不純物注入Mと、前記P型不純物注入層下にn型不純
物をイオン注入して形成したn型不純物注入層とを有し
、前記n型不純物注入層とn型不純物注入層が接する界
面でpn接合を形成したことを特徴とする半導体受光素
子によって達成される。[Means to solve flB] The above purpose is to reduce n-type I nGaAs light absorption and nlIrx.
An n-type InGaAsP intermediate layer is provided between the P layers, and the n-type InGaAsP intermediate layer is provided between the P layers.
In a semiconductor light-receiving element in which a P-type impurity diffusion region is provided on the surface of an In1 layer, a P
type impurity implantation M, and an n-type impurity implantation layer formed by ion-implanting an n-type impurity under the P-type impurity implantation layer, and at an interface where the n-type impurity implantation layer and the n-type impurity implantation layer contact. This is achieved by a semiconductor light-receiving element characterized by forming a pn junction.
また、上記目的は、n型InP基板上にn型InGaA
s光吸収層、n型InGaAsP中間層及び第1のn型
In1層をエピタキシャル成長させる工程と、前記第1
のn型In1層にn型不純物をイオン注入してn型不純
物注入層を形成すると共に、p型不純物をイオン注入し
て前記n型不純物注入層上にP型不純物注入層を形成す
る工程と、前記第1のn型IrhPl上に第2のn型I
n1層をエピタキシャル成長させる工程と、前記第2の
n型InP層表面にp型不純物を拡散して前記n型不純
物注入層に連続するp型不純物拡散領域を形成する工程
ヒを有するこεを特徴とする半導体受光素子の製造方法
によって達成される。Moreover, the above purpose is to form n-type InGaA on an n-type InP substrate.
a step of epitaxially growing an s-light absorption layer, an n-type InGaAsP intermediate layer, and a first n-type In1 layer;
ion-implanting n-type impurities into the n-type In1 layer to form an n-type impurity implantation layer, and ion-implanting p-type impurities to form a p-type impurity implantation layer on the n-type impurity implantation layer; , a second n-type IrhPl on the first n-type IrhPl
It is characterized by comprising a step of epitaxially growing an n1 layer, and a step of diffusing a p-type impurity into the surface of the second n-type InP layer to form a p-type impurity diffusion region continuous to the n-type impurity implantation layer. This is achieved by a method of manufacturing a semiconductor light receiving element.
[作用]
本発明によれば、pn接合をm戒する不純物層を共にイ
オン注入により形成したので、接合面における濃度分布
が急峻なpn接合を再現性よく実現できる。[Operation] According to the present invention, since the impurity layers forming the pn junction are both formed by ion implantation, a pn junction with a steep concentration distribution at the junction surface can be realized with good reproducibility.
[実施例]
本発明の一実施例による半導体受光素子を第1図を用い
て説明する。第4図に示す従来の半導体受光素子ε同一
の構成要素には同一の符号を付して説明を省略又は簡略
にする。[Example] A semiconductor light receiving element according to an example of the present invention will be described with reference to FIG. The same components in the conventional semiconductor light-receiving element ε shown in FIG. 4 are given the same reference numerals to omit or simplify the explanation.
nffJInP基板10上には、約2μm厚で不純物濃
度が5X10”am−″のn−型I nGaAsGaA
s光吸収層成2れている。n−型I nGaAsGaA
s光吸収層成2には、約0.5μm厚で不純物濃度が5
X10”erri−のn−型I nGaAsP中間[1
4が形成され、更にn−型I nGaAsP中間層14
上には約2μm厚で不純物濃度が5X10”am−’の
n−型InP層16が形成されている。なお、n−型1
nGaAsP中間層14はエネルギーギャップEg=
0゜9〜1.2e■であることが望ましい。On the nffJInP substrate 10, there is an n-type InGaAsGaA film with a thickness of about 2 μm and an impurity concentration of 5×10”am-”.
It has two light absorption layers. n-type I nGaAsGaA
The light absorption layer 2 has a thickness of about 0.5 μm and an impurity concentration of 5.
n-type I nGaAsP intermediate [1
4 is formed, and further an n-type InGaAsP intermediate layer 14 is formed.
An n-type InP layer 16 with a thickness of about 2 μm and an impurity concentration of 5×10” am is formed thereon.
The nGaAsP intermediate layer 14 has an energy gap Eg=
It is desirable that it be 0°9 to 1.2e■.
さらに、SN等のΩ型不純物をイオン注入したn型不純
物注入層18が、n−型InP層16下部に形成され、
このn型不純物注入層18に接してMg等のP型不純物
をイオン注入したP型不純物注入層19が形成されてい
る。これらP型不純物注入層19とn型不純物注入NJ
isによりpn接合を形成している。なお、P型不純物
注入層19は上部に形成されたP型不純物拡散領域22
と連続している。Furthermore, an n-type impurity implantation layer 18 in which Ω-type impurities such as SN are ion-implanted is formed under the n-type InP layer 16.
In contact with this n-type impurity implantation layer 18, a P-type impurity implantation layer 19 is formed by ion-implanting a P-type impurity such as Mg. These P-type impurity implantation layers 19 and n-type impurity implantation NJ
A pn junction is formed by is. Note that the P-type impurity implantation layer 19 has a P-type impurity diffusion region 22 formed thereon.
It is continuous.
第1図に示す半導体受光素子のa−a’面の濃度分布を
第2図に示す。横軸を深さとし、縦軸を不純物濃度1ρ
1とする。不純物濃度が約5XIQ ”c rn−″の
バックグラウンドに対して、比較的なだらかなP型不純
物拡散領域22の濃度分布のテール部にn型不純物注入
層19が連続しており、さらにn型不純物注入層19と
n型不純物注入層18が共に急峻な濃度分布をもって接
している。FIG. 2 shows the concentration distribution on the aa' plane of the semiconductor photodetector shown in FIG. 1. The horizontal axis is the depth, and the vertical axis is the impurity concentration 1ρ.
Set to 1. Against a background with an impurity concentration of about 5XIQ "crn-", the n-type impurity implantation layer 19 is continuous in the tail part of the relatively gentle concentration distribution of the P-type impurity diffusion region 22, and further n-type impurity The injection layer 19 and the n-type impurity injection layer 18 are in contact with each other with a steep concentration distribution.
P型不純物注入層19及びn型不純物注入層18は共に
不純物をイオン注入することにより形成しているので、
第2図に示すようにp型及びn型の不純物濃度分布が急
峻であって良好なpn接合が達成できる。Since both the P-type impurity implantation layer 19 and the N-type impurity implantation layer 18 are formed by ion-implanting impurities,
As shown in FIG. 2, the p-type and n-type impurity concentration distributions are steep, and a good pn junction can be achieved.
このように本実施例によ九ばn型不純物注入層及びn型
不純物注入層により形成しているので、濃度分布が急峻
である良好なpn接合を実現できる。As described above, since the present embodiment is formed by the nine n-type impurity implantation layers and the n-type impurity implantation layer, a good pn junction with a steep concentration distribution can be realized.
次に、本実施例の半導体受光素子の製造方法について第
3図を用いて説明する。Next, a method for manufacturing the semiconductor light-receiving device of this example will be explained using FIG. 3.
まず、n型InP基板10上に2μm厚のnをInGa
As光吸収層12.0.5ツノrn厚のn−型1 nG
aA白P中白層中間層14タキシャル成長させるや更に
、n−型NnGaAsP中間層As上にn−’型InP
層16aを0.5μrnだけエピタキシャル成長させて
1四目成長を終了する(第3図(a))。First, a 2 μm thick layer of InGa is deposited on the n-type InP substrate 10.
As light absorption layer 12.0.5 horn thick n-type 1 nG
aA White P middle white layer As soon as the intermediate layer 14 is taxially grown, n-' type InP is grown on the n-type NnGaAsP intermediate layer As.
The layer 16a is epitaxially grown by 0.5 .mu.rn to complete the 14-thick growth (FIG. 3(a)).
次に、表面より81イオンを300keV、ドーズi2
〜4 x l 012 / c m 2の条件でイオン
注入し、n−型InP層16a中にn型不純物注入層1
8を形成する。続いてMgイオンを100keV、ドー
ズ量lXl0”/am2の条件でイオン注入し、n−型
InP層16a表面にn型不純物注入層18に接するよ
うにn型不純物注入層19を形成する(第3図(b))
。Next, 81 ions were applied from the surface at 300 keV and at a dose of i2.
Ion implantation was performed under the conditions of ~4 x l 012 / cm 2 to form an n-type impurity implantation layer 1 in the n-type InP layer 16a.
form 8. Subsequently, Mg ions are implanted under the conditions of 100 keV and a dose of lXl0''/am2 to form an n-type impurity implantation layer 19 on the surface of the n-type InP layer 16a so as to be in contact with the n-type impurity implantation layer 18 (third Figure (b))
.
次に、n−型InP層16a上に、n−型InP層16
の残りの1.5μm厚のn″′型InP層16bをエピ
タキシャル成長(2四目成長)させる(第3図(C))
。Next, the n-type InP layer 16 is placed on the n-type InP layer 16a.
The remaining 1.5 μm thick n''' type InP layer 16b is epitaxially grown (24-row growth) (FIG. 3(C)).
.
次に、n−型InP層1層表6表面eを拡散してリング
形状のガードリング20を形成し、また受光部分にCd
を拡散してn型不純物注入層19に連続するようにn型
不純物拡散領域22を形成する。続いて、n−型InP
層1層上6上保護膜24を介してT I / P t
/ A uのp@極26を形威し、n型InP基板10
の背面にA u / G eのn電fli28を形成し
て、半導体受光素子を完成させる(第3図(d))。Next, the n-type InP layer 1 layer 6 surface e is diffused to form a ring-shaped guard ring 20, and the light receiving part is covered with Cd.
An n-type impurity diffusion region 22 is formed so as to be continuous with the n-type impurity implantation layer 19. Next, n-type InP
T I / P t through the protective film 24 on layer 1 and layer 6
/ A u's p@ pole 26 is formed, and the n-type InP substrate 10
An A u/G e n-electrode fli 28 is formed on the back surface of the semiconductor light receiving element to complete the semiconductor light receiving element (FIG. 3(d)).
このように本実施例ではpn接合を構成するn型不純物
注入層及びnW不純物注入層をイオン注入により形成し
ているので、注入深さや不純物濃度を精密に制御するこ
とができ、ウェーハ内及びウェーハ間での増fΔ領域の
均一性を飛躍的に向上させ、高歩留まりを実現できる。In this example, since the n-type impurity implantation layer and the nW impurity implantation layer constituting the pn junction are formed by ion implantation, the implantation depth and impurity concentration can be precisely controlled, and the It is possible to dramatically improve the uniformity of the increased fΔ region between the layers and achieve a high yield.
しかも、pn接合の濃度分布を急峻にして増倍領域の幅
を狭くするこ七ができるので、50GHz以上のG6積
の半導体受光素子を実現できる。また、受光面の不純物
領域はイオン注入でなく熟拡散により形成しでいるので
、表面がダメージを受けずリーク電流の発生を防止でき
る。Moreover, since the concentration distribution of the pn junction can be steepened to narrow the width of the multiplication region, it is possible to realize a semiconductor light-receiving device with a G6 product of 50 GHz or more. Furthermore, since the impurity region on the light-receiving surface is formed by mature diffusion rather than ion implantation, the surface is not damaged and leakage current can be prevented.
本発明は上記実施例に限らず種々の変形が可能である6
例えば、上記実施例ではイオン注入するn型不純物とし
てSlを用いたが、他のn型不純物でもよい、また、n
型不純物としてMgを用いたが、Cd、Zn等の他のn
型不純物を用いてもよい。The present invention is not limited to the above embodiments, and various modifications are possible6.
For example, in the above embodiment, Sl was used as the n-type impurity to be ion-implanted, but other n-type impurities may also be used.
Mg was used as the type impurity, but other n such as Cd and Zn
Type impurities may also be used.
[発明の効果]
以上の通り、本発明によれば、pn接合を構成する不純
物層をイオン注入して形成したので、接合面における濃
度分布が急峻なpn接合を実現でき、しかも注入深さや
不純Th濃度を精密に制御することができるので、ウェ
ーハ内及びウェーハ間での増倍領域の均一性が飛躍的に
向上し、高歩留まりが実現できる。[Effects of the Invention] As described above, according to the present invention, since the impurity layer constituting the pn junction is formed by ion implantation, it is possible to realize a pn junction with a steep concentration distribution at the junction surface. Since the Th concentration can be precisely controlled, the uniformity of the multiplication region within a wafer and between wafers can be dramatically improved, and a high yield can be achieved.
第1図は本発明の一実施例による半導体受光素子の断面
図、
第2図は同半導体受光素子の不純!l!!濃度分布を示
すグラフ、
第3図は同半導体受光素子の製造方法の工程断面図、
第4図は従来の半導体受光素子の断面図である。
図において、
10・・−″n型1rhP基板
12・・・n−型I nGaAs光吸収層t 4−=
n−型I nGaAsP中間層16−−− n−型In
P層
18・・・n型不純物注入層
19・・・n型不純物注入層
20・・・ガードリング
22・・・n型不純物拡散領域
24・・・保護膜
26・・・P電極
28・・・rxt&Fig. 1 is a cross-sectional view of a semiconductor photodetector according to an embodiment of the present invention, and Fig. 2 is a cross-sectional view of the semiconductor photodetector according to an embodiment of the present invention. l! ! A graph showing the concentration distribution, FIG. 3 is a cross-sectional view of the process for manufacturing the same semiconductor light-receiving element, and FIG. 4 is a cross-sectional view of a conventional semiconductor light-receiving element. In the figure, 10...-''n-type 1rhP substrate 12...n-type InGaAs light absorption layer t4-=
n-type In nGaAsP intermediate layer 16 --- n-type In
P layer 18...n type impurity injection layer 19...n type impurity injection layer 20...guard ring 22...n type impurity diffusion region 24...protective film 26...P electrode 28...・rxt&
Claims (1)
n型InGaAsP中間層を設け、前記n型InP層の
表面にp型不純物拡散領域を設けた半導体受光素子にお
いて、 前記n型InP層中の前記p型不純物拡散領域下にp型
不純物をイオン注入して形成したp型不純物注入層と、 前記p型不純物注入層下にn型不純物をイオン注入して
形成したn型不純物注入層とを有し、前記p型不純物注
入層とn型不純物注入層が接する界面でpn接合を形成
したことを特徴とする半導体受光素子。 2、n型InP基板上にn型InGaAs光吸収層、n
型InGaAsP中間層及び第1のn型InP層をエピ
タキシャル成長させる工程と、前記第1のn型InP層
にn型不純物をイオン注入してn型不純物注入層を形成
すると共に、P型不純物をイオン注入して前記n型不純
物注入層上にP型不純物注入層を形成する工程と、 前記第1のn型InP層上に第2のn型InP層をエピ
タキシャル成長させる工程と、 前記第2のn型InP層表面にp型不純物を拡散して前
記p型不純物注入層に連続するP型不純物拡散領域を形
成する工程と を有することを特徴とする半導体受光素子の製造方法。[Claims] 1. In a semiconductor light-receiving element in which an n-type InGaAsP intermediate layer is provided between an n-type InGaAs light absorption layer and an n-type InP layer, and a p-type impurity diffusion region is provided on the surface of the n-type InP layer. , a p-type impurity implantation layer formed by ion-implanting a p-type impurity under the p-type impurity diffusion region in the n-type InP layer; and a p-type impurity implantation layer formed by ion-implanting an n-type impurity under the p-type impurity implantation layer. 1. A semiconductor light-receiving device comprising: an n-type impurity implanted layer; and a pn junction is formed at an interface where the p-type impurity implanted layer and the n-type impurity implanted layer contact. 2. n-type InGaAs light absorption layer on n-type InP substrate, n
A step of epitaxially growing an InGaAsP intermediate layer and a first n-type InP layer, ion-implanting an n-type impurity into the first n-type InP layer to form an n-type impurity implantation layer, and ion-implanting a p-type impurity. forming a P-type impurity implantation layer on the n-type impurity implantation layer by implanting; epitaxially growing a second n-type InP layer on the first n-type InP layer; 1. A method for manufacturing a semiconductor light-receiving device, comprising the step of diffusing p-type impurities into a surface of an InP layer to form a p-type impurity diffusion region continuous to the p-type impurity injection layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1218209A JPH0382085A (en) | 1989-08-24 | 1989-08-24 | Semiconductor photodetector and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1218209A JPH0382085A (en) | 1989-08-24 | 1989-08-24 | Semiconductor photodetector and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0382085A true JPH0382085A (en) | 1991-04-08 |
Family
ID=16716332
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1218209A Pending JPH0382085A (en) | 1989-08-24 | 1989-08-24 | Semiconductor photodetector and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0382085A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007312864A (en) * | 2006-05-23 | 2007-12-06 | Inax Corp | Attaching structure of bathtub apron to bathtub and connecting structure of bathtub aprons with each other |
JP2009028320A (en) * | 2007-07-27 | 2009-02-12 | Inax Corp | Structure for attaching outer lid to bathtub apron |
US9497387B2 (en) | 2007-01-23 | 2016-11-15 | Sharp Laboratories Of America, Inc. | Methods and systems for inter-layer image prediction signaling |
-
1989
- 1989-08-24 JP JP1218209A patent/JPH0382085A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007312864A (en) * | 2006-05-23 | 2007-12-06 | Inax Corp | Attaching structure of bathtub apron to bathtub and connecting structure of bathtub aprons with each other |
US9497387B2 (en) | 2007-01-23 | 2016-11-15 | Sharp Laboratories Of America, Inc. | Methods and systems for inter-layer image prediction signaling |
JP2009028320A (en) * | 2007-07-27 | 2009-02-12 | Inax Corp | Structure for attaching outer lid to bathtub apron |
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