JPH036390U

JPH036390U -

Info

Publication number: JPH036390U
Application number: JP6657289U
Authority: JP
Priority date: 1989-06-07
Filing date: 1989-06-07
Publication date: 1991-01-22

Description

[Brief explanation of drawings]

第１図および第２図は本考案の第１の実施例に
かかる信号入出力回路を説明する図であり、第１
図は同信号入出力回路の構成を示す回路図、第２
図は同実施例の信号入出力回路の変形例の構成を
示す回路図、第３図および第４図は本考案の第２
の実施例にかかる信号入出力回路を説明する図で
あり、第３図は同信号入出力回路の構成を示す回
路図、第４図は同実施例の信号入出力回路の変形
例の構成を示す回路図、第５図乃至第８図は従来
技術を説明する図である。１０，２０，３０，４０……信号入出力回路、
１ａ，１ｂ，１ｃ……レシーバ、３ａ，３ｂ，３
ｃ……プルアツプ抵抗、４ａ，４ｂ，４ｃ……ド
ライバ、７ａ，７ｂ，７……リレー、８ａ，８ｂ
，８ｃ……信号入出力端子、１１ａ，１１ｂ，１
１ｃ……ダイオード、３１……外部電源端子。 1 and 2 are diagrams for explaining a signal input/output circuit according to a first embodiment of the present invention.
The figure is a circuit diagram showing the configuration of the signal input/output circuit.
The figure is a circuit diagram showing the configuration of a modified example of the signal input/output circuit of the same embodiment, and FIGS.
FIG. 3 is a circuit diagram showing the configuration of the signal input/output circuit according to the embodiment, and FIG. 4 is a diagram illustrating the configuration of a modified example of the signal input/output circuit of the embodiment. The circuit diagrams shown in FIGS. 5 to 8 are diagrams for explaining the prior art. 10, 20, 30, 40...signal input/output circuit,
1a, 1b, 1c...Receiver, 3a, 3b, 3
c...Pull-up resistor, 4a, 4b, 4c...Driver, 7a, 7b, 7...Relay, 8a, 8b
, 8c...Signal input/output terminal, 11a, 11b, 1
1c...Diode, 31...External power supply terminal.

Claims

[Claims for Utility Model Registration] (1) Control of the objects to be controlled by turning ON/OFF the current supply from the first power supply means to each object to be controlled in accordance with a control signal given from the outside. A plurality of signal output buffers to be output, and a plurality of signals whose outputs of currents supplied from a single second power supply means via respective pull-up resistors are turned ON/OFF according to the state of each input target switch means. an input buffer, one of the plurality of signal output buffers and one of the plurality of signal input buffers are paired, and an output end of the pair of signal output buffers and an input end of the signal input buffer. connected to a common signal input/output terminal, the signal input/output circuit comprising: a directional element for blocking current flowing through the pull-up resistor toward the second power supply means; . (2) a plurality of signal output buffers that control the controlled objects by turning ON/OFF the current supply from the first power supply means to the respective controlled objects according to control signals given from the outside; and a plurality of signal input buffers in which the output of the current supplied from the single second power supply means through the respective pull-up resistors is turned ON/OFF according to the state of the switch means to be inputted, respectively, One of the plurality of signal output buffers and one of the plurality of signal input buffers are paired, and the output end of the pair of signal output buffers and the input end of the signal input buffer are connected to a common signal input/output terminal. When operating as a signal output circuit, the first power supply means is connected to the side of the pull-up resistor to which the second power supply means is connected. Input/output circuit.