[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

JPH0346239U - - Google Patents

Info

Publication number
JPH0346239U
JPH0346239U JP1989058851U JP5885189U JPH0346239U JP H0346239 U JPH0346239 U JP H0346239U JP 1989058851 U JP1989058851 U JP 1989058851U JP 5885189 U JP5885189 U JP 5885189U JP H0346239 U JPH0346239 U JP H0346239U
Authority
JP
Japan
Prior art keywords
input
turned
input signal
circuit
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1989058851U
Other languages
Japanese (ja)
Other versions
JPH0733462Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989058851U priority Critical patent/JPH0733462Y2/en
Publication of JPH0346239U publication Critical patent/JPH0346239U/ja
Application granted granted Critical
Publication of JPH0733462Y2 publication Critical patent/JPH0733462Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Pulse Circuits (AREA)
  • Electronic Switches (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例の回路図、第2図は
本考案の一実施例の動作を説明するための図、第
3図は従来の一例の回路図、第4図は従来の一例
の動作を説明するための図である。 1……スイツチ回路、2……コンデンサ、3…
…電流供給回路。
Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is a diagram for explaining the operation of an embodiment of the invention, Fig. 3 is a circuit diagram of a conventional example, and Fig. 4 is a circuit diagram of a conventional example. FIG. 3 is a diagram for explaining an example operation. 1...Switch circuit, 2...Capacitor, 3...
...Current supply circuit.

補正 平2.11.2 図面の簡単な説明を次のように補正する。 明細書第14頁第18行目記載の「第4図」と
「は従来の」の間に「、第5図」を加入する。
Amendment 2.11.2 The brief description of the drawing is amended as follows. ``, 5'' is inserted between ``Figure 4'' and ``is conventional'' in the 18th line of page 14 of the specification.

Claims (1)

【実用新案登録請求の範囲】 第1の入力信号が入力されている状態で第2の
入力信号が入力されたときに該第2の入力信号が
入力された時点より所定時間経過し出力信号が出
力されるタイマ回路において、 前記第1の入力信号が入力されたときオンとな
り、前記第2の入力信号が入力されたとき前記第
1の入力信号に無関係にオフとなるスイツチ回路
と、 前記スイツチ回路がオンのときにのみ両端が短
絡されるコンデンサと、 前記第1の入力信号が入力され、前記スイツチ
回路がオンとなつた時点から前記第1の入力信号
が入力されている間電流を前記コンデンサへ供給
して充電する電流供給回路と、 前記スイツチ回路のオフ時点から前記所定時間
経過して前記コンデンサの端子電圧が前記充電に
より所定の電圧に達した時点でオンとなり前記電
流供給回路からの電流に基づく出力信号を出力す
る出力回路とを具備してなるタイマ回路。
[Claims for Utility Model Registration] When a second input signal is input while the first input signal is being input, a predetermined period of time has elapsed since the second input signal was input, and the output signal is The output timer circuit includes: a switch circuit that is turned on when the first input signal is input, and is turned off when the second input signal is input regardless of the first input signal; a capacitor whose ends are short-circuited only when the circuit is on; the first input signal is input, and the current is supplied to the capacitor from the time the switch circuit is turned on until the first input signal is input; a current supply circuit that supplies and charges the capacitor; and a current supply circuit that is turned on when the terminal voltage of the capacitor reaches a predetermined voltage due to the charging after the predetermined time has elapsed from the time when the switch circuit is turned off, and the current supply circuit is turned on. A timer circuit comprising an output circuit that outputs an output signal based on current.
JP1989058851U 1989-05-22 1989-05-22 Timer circuit Expired - Lifetime JPH0733462Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989058851U JPH0733462Y2 (en) 1989-05-22 1989-05-22 Timer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989058851U JPH0733462Y2 (en) 1989-05-22 1989-05-22 Timer circuit

Publications (2)

Publication Number Publication Date
JPH0346239U true JPH0346239U (en) 1991-04-30
JPH0733462Y2 JPH0733462Y2 (en) 1995-07-31

Family

ID=31584836

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989058851U Expired - Lifetime JPH0733462Y2 (en) 1989-05-22 1989-05-22 Timer circuit

Country Status (1)

Country Link
JP (1) JPH0733462Y2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6080314A (en) * 1983-10-07 1985-05-08 Rohm Co Ltd One-shot circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6080314A (en) * 1983-10-07 1985-05-08 Rohm Co Ltd One-shot circuit

Also Published As

Publication number Publication date
JPH0733462Y2 (en) 1995-07-31

Similar Documents

Publication Publication Date Title
JPH0346239U (en)
JPH02130126U (en)
JPH03435U (en)
JPH01173809U (en)
JPH02123129U (en)
JPS6183340U (en)
JPH0318639U (en)
JPS62179638U (en)
JPS63107027U (en)
JPH0322417U (en)
JPS5953690U (en) power circuit
JPS6395327U (en)
JPS60192532U (en) Timer circuit for thyristor off
JPH0328813U (en)
JPS58149824U (en) Pulse width detection circuit
JPS5939527U (en) Amplifier muting circuit
JPS63156579U (en)
JPH0178417U (en)
JPH02108230U (en)
JPS61134132U (en)
JPS61103915U (en)
JPH0216620U (en)
JPH0360843U (en)
JPS6214866U (en)
JPH0184114U (en)