JPH033001Y2 - - Google Patents

Description

[Detailed description of the invention] Industrial application field The present invention relates to a video signal muting circuit.
The present invention relates to a circuit for muting a video signal when the reproduced video signal, control pulse, and servo voltage are not normal.

BACKGROUND TECHNOLOGY AND PROBLEMS When reproducing a recorded magnetic tape in a VTR or the like, for example, white noise appears on the screen especially in areas where there is no reproduced video signal, making the screen difficult to see.

The purpose of the present invention is to provide a video signal muting circuit that mutes the reproduced video signal to prevent noise from appearing on the screen when the regular reproduced video signal, control pulse, and servo voltage cannot be obtained. .

Means to Solve the Problem In Figure 1, the sync separation circuit 2, PLL 3, switch SW ₁ , and 0.35V slicer 10 are synchronized with the horizontal synchronization signal of the reproduced video signal and have a black level at the same frequency as the horizontal synchronization signal. Means for generating a black level signal, monomulti 4, 9, 12, 19, gate circuit 5,
7, 13, 15, retriggerable timer 8, 1
6. The inverters 6 and 14, the window comparator 18, and the AND gate 20 are used to determine when the periods of the horizontal synchronizing signal and control pulse of the reproduced video signal are normal and when they are not normal, and when the servo voltage is normal and when they are not normal. The detection means, switches SW ₂ and SW ₃ , are each an embodiment of a switching means that selects the reproduced video signal when it is normal, and selects and takes out the black level signal when it is not normal.

Function: If the reproduced video signal, control pulse, and servo voltage are normal, the reproduced video signal is taken out; if these are not normal, the black level signal is taken out.

Embodiment FIG. 1 shows a block diagram of an embodiment of the circuit of the present invention. In the figure, the reproduced video signal input to terminal 1 is sent to horizontal synchronization signal a by synchronization separation circuit 2.
(Figure 2 A) and 15.73kHz in PLL3
(63.55 μs period) signal b (B in the same figure), and both are supplied to switch _SW1 . frequency of signal b
Even when PLL3 is free running, it is approximately 15.73kHz.

Signal b is converted into signal c (C in the same figure) by monomulti 4 with a time constant of 57 μs, and is sent to gate circuit 5 along with signal a.
The signal d is supplied to the signal d (D in the figure). signal a
is inverted in polarity by an inverter 6, and is supplied to a gate circuit 7 together with a signal c to form a signal e ₁ (E in the figure). The signals d and _e1 are supplied to a retriggerable timer 8 with a time constant of 65 μs.

Here, when the reproduced video signal is obtained normally, the output signal d of the gate circuit 5 is obtained at a normal period, and thereby the output signal f ₁ of the retriggerable timer 8 (F in the same figure) is at H level, and the output of the retriggerable monomulti 9 is also at T level. Switch SW ₁ is retriggerable mono multi 9
is connected to the terminal A side by the H level _output of
The high level period is sliced into 0.35V to form a signal g (G in the same figure) having the period of the black level and the horizontal synchronizing signal, and is supplied to the switch _SW2 .

On the other hand, a 60 Hz control pulse j (corresponding to the waveform shown in figure B) inputted to terminal 11 is converted into a signal k (corresponding to the waveform shown in figure C) by the monomulti 12 with a time constant of 31 ms.
The gate circuit 13 converts the signal into a signal l (corresponding to the waveform shown in FIG. 2D), and the inverter 14 and gate circuit 15 convert the signal into a signal m (corresponding to the waveform shown in FIG. E).
Signals l and m are converted into signal n by a retriggerable timer 16 with a time constant of 35 ms.

Here, when the control pulse is obtained normally, the output signal l of the gate circuit 13 is obtained at a normal period, and thereby the signal n is at H level.

On the other hand, the servo voltage of the capstan servo or drum servo input to the terminal 17 is supplied to the window comparator 18.

Here, if the servo is applied normally, the servo voltage is in the voltage range between the threshold voltages V ₁ and V ₂ set in the comparator 18, and an H level output is taken out, and the retriggerable monomulti 19
The output p is set to H level.

Each output of retriggerable mono multi 9, 19,
The output of the retriggerable timer 16 is supplied to an AND gate 20. Therefore, when the reproduced video signal, control pulse, and servo voltage are all obtained normally, the output of the AND gate 20 is set to H level, the switch SW 3 is turned on, and the switch SW ₃ is turned on.
SW ₂ is connected to terminal C. As a result, terminal 1
The reproduced video signal that has entered is taken out from the terminal 21 via the switch SW ₂ , while the AND gate 2
The H level output of 0 is inverted by the inverter 22, and the LED 23 lights up to indicate the normal state.

Here, if the horizontal synchronization signal is not extracted as shown by a ₁ in FIG. 2A, _the signal d disappears as shown by d ₁ in FIG. F) in the same figure is considered to be L level,
The output of the retriggerable monomulti 9 is also set to L level. As a result, the switch _SW1 is connected to the terminal RO, and the signal b is converted into a signal g (G in the figure) via the switch _SW1 and the slicer 10, and is supplied to the switch _SW2 . On the other hand, the retriggerable timer 1 is activated by the L level output of the retriggerable monomulti 9.
6. Regardless of the output level of the retriggerable monomulti 19, the output level of the AND gate 20 is set to L level, the switch SW ₃ is turned off, and the switch SW ₂ is connected to terminal N. As a result, the signal g is taken out from the terminal 21 in place of the reproduced video signal, while the output of the inverter 22 becomes H level, and the LED 23 goes out to indicate an abnormal state.

In this case, no image appears on the screen, only a black image, and there is no noise or movement as in conventional devices.

On the other hand, when the control pulse j disappears, the output n of the retriggerable timer 16 goes to L level, and when the regular servo voltage cannot be obtained, the output p of the little garbleable monomulti 19 goes to L level. In these cases, the output of the AND gate 20 is also at L level, and no image appears on the screen, as in the above case.

In addition, if the period of the horizontal synchronizing signal becomes shorter than the normal period as shown by a ₂ in A in Figure 2, the output e of the gate circuit 7 will be synchronized with a ₂ as shown in E in the same figure. The pulse _e2 is taken out, the retriggerable timer 8 is reset, and the output of the retriggerable monomulti 9 is set to L level. Furthermore, when the period of the control pulse j becomes shorter, the output n of the retriggerable timer 16 is brought to L level by the same operation as in the above case.

Therefore, in these cases as well, the output of the AND gate 20 is set to the L level, and no image appears on the screen.

Effects of the invention The circuit of the present invention consists of a circuit that synchronizes with the horizontal synchronizing signal of the reproduced video signal and generates a black level signal having a black level at the same frequency as the horizontal synchronizing signal, and a circuit that generates a black level signal that is synchronized with the horizontal synchronizing signal of the reproduced video signal, and a control pulse of the horizontal synchronizing signal of the reproduced video signal. A detection circuit that detects whether the period is normal or not, and whether the servo voltage is normal or not, selects the above-mentioned reproduced video signal when it is normal, and selects the above-mentioned black level signal when it is not normal. Since it is configured with a switching circuit that selects and extracts the reproduced video signal, the reproduced video signal may be muted if it is not the above-mentioned regular one. Especially when playing a previously recorded magnetic tape on a VTR etc., a white screen appears on the screen in the part where there is no reproduced video signal. It has features such as no noise appearing.

[Brief explanation of the drawing]

FIGS. 1 and 2 are a block system diagram and a signal waveform diagram of an embodiment of the circuit of the present invention, respectively. 1...Playback video signal input terminal, 2...Synchronization separation circuit, 3...PLL, 4, 12...Mono multi,
5, 7, 13, 15...gate circuit, 6, 14...
...Inverter, 8,16...Retriggerable timer, 9,19...Retriggerable mono multi, 1
0...0.35V slicer, 11...Control pulse input terminal, 17...Servo voltage input terminal, 1
8...Window comparator, 20...And gate, 21...Output terminal, SW ₁ , SW ₂ , SW ₃ ...
Switch.

Claims (1)

[Scope of utility model registration request] A circuit that synchronizes with a horizontal synchronizing signal of a reproduced video signal and generates a black level signal having a black level at the same frequency as the horizontal synchronizing signal, and a case where each period of the horizontal synchronizing signal and control pulse of the reproduced video signal are normal. a detection circuit that detects when the servo voltage is normal and when the servo voltage is not normal;
A video signal muting circuit comprising a switching circuit that selects the reproduced video signal when the signal is normal, and selects and extracts the black level signal when the signal is not normal.