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JPH0330575A - Shading corrector - Google Patents

Shading corrector

Info

Publication number
JPH0330575A
JPH0330575A JP1163635A JP16363589A JPH0330575A JP H0330575 A JPH0330575 A JP H0330575A JP 1163635 A JP1163635 A JP 1163635A JP 16363589 A JP16363589 A JP 16363589A JP H0330575 A JPH0330575 A JP H0330575A
Authority
JP
Japan
Prior art keywords
converter
signal
conversion
output
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1163635A
Other languages
Japanese (ja)
Inventor
Masaaki Ito
雅章 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP1163635A priority Critical patent/JPH0330575A/en
Publication of JPH0330575A publication Critical patent/JPH0330575A/en
Pending legal-status Critical Current

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  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE:To provide a shading corrector, which is profitable in the manner of cost and does not reduce the dynamic range of a signal by conversion even in the case of coarse adjustment, by executing shading correction along data stored in a RAM by utilizing a D/A converter for a video band. CONSTITUTION:An analog signal is amplified by an amplifier 2 and level- converted. Then, the signal is converted to a digital signal by an A/D converter 3, picture-processed and edited by processing blocks in rear steps. Further, the signal is transmitted, recorded and stored. A control part 9 applies the output of a constant voltage source 6 as a converting reference voltage to the A/D converter 3 by a synchronizing signal to be generated when reflected light is made incident from a reference white board 12 to a CCD 1. At such a time, a digital converting output from the CCD 1 is stored in a RAM 7 for one line. When the synchronizing signal is inactive, sampled data are applied as a reference voltage from the RAM 7 through a D/A converter 5 to the A/D converter 3. Thus, the nonuniformity of the output caused by the dispersion of CCD picture element sensitivity and the nonuniformity of an optical system can be corrected.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ファクシミリ、デジタル複写機等の画像読み
取り部におけるシェーディング補正装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a shading correction device in an image reading section of a facsimile machine, digital copying machine, etc.

〔従来の技術〕[Conventional technology]

従来より、シェーディング補正装置として画素ごとの補
正データをRAMに格納しておき、動作時には画素出力
値と、RAMから得る対応した画素の補正値で変換値を
格納したメモリをアクセスし補正データを得る技術が知
られている。
Conventionally, as a shading correction device, correction data for each pixel is stored in RAM, and during operation, the pixel output value and the correction value of the corresponding pixel obtained from RAM are used to access the memory that stores the converted value and obtain the correction data. The technology is known.

この変換テーブルメモリ使用方式は一般的であり、コス
ト的にも優れているため、現在市場の大多数の装置に採
用されている。
This conversion table memory usage method is common and cost-effective, so it is currently employed in the majority of devices on the market.

〔発明が解決しようとる課題〕[Problem that the invention aims to solve]

しかしデジタル複写機等において、仮に20CPS40
0dpi(7)装置では、変換ROMとしてアクセスタ
イム80ns程度のがなり高速なものが、また変換8ビ
ツトとすると容量的にもやや大きなものが必要となる。
However, in a digital copy machine, etc., if 20CPS40
In a 0 dpi (7) device, a high-speed conversion ROM with an access time of about 80 ns is required, and an 8-bit conversion ROM requires a somewhat large capacity.

また、この方式によると格納データ(基準白板を読んだ
時の値)の最大値が変換メモリに格納する値を計算する
時、予定した値とずれていると、変換後データのダイナ
ミックレンジは低下する。
In addition, according to this method, when calculating the value to be stored in the conversion memory, when the maximum value of the stored data (value when reading the reference white board) deviates from the planned value, the dynamic range of the converted data will decrease. do.

つまり、初期調整(例えば基準白板を読んだ時の出力値
を目標値にセットする等)をがなり正確に行わないと装
置自体の性能が低下するという欠点がある。
In other words, if the initial adjustment (for example, setting the output value when reading the reference white board to the target value) is not performed accurately, the performance of the device itself will deteriorate.

本発明の目的は、初期調整作業の容易な高性能のシェー
ディング補正装置を提供することにある。
An object of the present invention is to provide a high-performance shading correction device that allows easy initial adjustment work.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的は、光電変換素子のアナログ出力をデジタル値
に変換する第1の変換手段と、前記光電変換素子の1ラ
インのデジタル変換出力を記憶する記憶手段と、この記
憶手段に記憶したデジタルデータをアナログ信号に変換
する第2の変換手段と、この第2の変換手段の出力を前
記第1の変換手段の変換基準電圧として供給する制御手
段とによって達成される。
The above object includes a first conversion means for converting an analog output of a photoelectric conversion element into a digital value, a storage means for storing one line of digital conversion output of the photoelectric conversion element, and a storage means for storing digital data stored in the storage means. This is achieved by a second conversion means for converting into an analog signal, and a control means for supplying the output of the second conversion means as a conversion reference voltage to the first conversion means.

〔作用〕[Effect]

記憶手段に記憶された1ラインのデジタルデータは第2
の変換手段によりアナログ信号に変換され、再度、光電
変換素子のアナログ出力をデジタル値に変換する第1の
変換手段の変換基準電圧としてフィードバックされる。
One line of digital data stored in the storage means is stored in the second
It is converted into an analog signal by the conversion means, and fed back again as a conversion reference voltage of the first conversion means that converts the analog output of the photoelectric conversion element into a digital value.

従って、記憶手段に格納された値なりの補正動作を行う
ため、粗調整でも変換による信号のダイナミックレンジ
低下はない。
Therefore, since the correction operation is performed according to the value stored in the storage means, there is no reduction in the dynamic range of the signal due to conversion even with coarse adjustment.

〔実施例〕〔Example〕

以下、本発明の実施例を図面を参照して説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第2図は複写機の光学系の構成図であって、IはCCD
 (光電変換素子)、11は移動型のコンタクトガラス
、12は濃度調整のためにコンタクトガラスIIの非画
像部に設けられた基準白板、13はコンタクトガラス1
1に見開き状態で!!2置された原稿、工4は光源、1
5,16.17はミラー 18は結像レンズであり、原
稿像はCCD1上に投影され、光電変換によりアナログ
電圧に変換される。
Figure 2 is a configuration diagram of the optical system of a copying machine, where I is a CCD.
(photoelectric conversion element), 11 is a movable contact glass, 12 is a reference white plate provided in the non-image area of contact glass II for density adjustment, and 13 is contact glass 1
1 with a two-page spread! ! 2 The manuscript placed, work 4 is the light source, 1
5, 16, and 17 are mirrors; 18 is an imaging lens; the original image is projected onto the CCD 1 and converted into an analog voltage by photoelectric conversion;

第1図は本発明によるシェーディング補正装置のブロッ
ク図であって、CCD 1はクロックにより駆動され、
受光量に応したアナログ信号を出力する。このアナログ
信号は増幅器2により増幅およびレベル変換され、A/
D変換器(第1の変換手段)3によってデジタル信号と
なり、図示しない後段の処理ブロックにより、画像処理
9編集され、さらに伝送、記録、記憶される。
FIG. 1 is a block diagram of a shading correction device according to the present invention, in which a CCD 1 is driven by a clock;
Outputs an analog signal according to the amount of light received. This analog signal is amplified and level-converted by amplifier 2, and A/
The digital signal is converted into a digital signal by the D converter (first conversion means) 3, subjected to image processing 9 and edited by a subsequent processing block (not shown), and further transmitted, recorded, and stored.

5はD/A変換器(第2の変換手段)、6は定電圧源、
7はCGDIからの1ラインのデジタルデータを記憶す
るRAM (記憶手段)である。
5 is a D/A converter (second conversion means), 6 is a constant voltage source,
7 is a RAM (storage means) that stores one line of digital data from the CGDI.

また制御部(制御手段)8は、コンタクトガラス11が
第2図に示す位置に到達し、基準白板12からの反射光
がCCD 1に入射するとき発生する同期信号によって
点線内ブロックを以下のように制御する。
Further, the control unit (control means) 8 controls the blocks within the dotted line as follows using a synchronization signal generated when the contact glass 11 reaches the position shown in FIG. 2 and the reflected light from the reference white plate 12 enters the CCD 1. to control.

モード■ 同期信号がアクティブなときく補正データサンプル) 制御部8はスイッチ31.32を図の位置(信号の流れ
は■側)にして、定電圧源6の出力をA/D変換器3へ
の変換基準電圧として与え、この時のCCD 1からの
デジタル変換出力を1ライン分RAM7に格納する。
Mode ■ Correction data sample when the synchronization signal is active) The control unit 8 sets the switches 31 and 32 to the positions shown in the figure (the signal flow is on the ■ side), and sends the output of the constant voltage source 6 to the A/D converter 3. The digital conversion output from the CCD 1 at this time is stored in the RAM 7 for one line.

モード■ 同期信号が非アクティブなとき(補正動作)スイッチ3
1.S2を図と反対側(信号の流れは■側)にしてモー
ド■でサンプリングしたデータをRAM7からD/A変
換器5を通じてA/D変換器3に基準電圧として与える
Mode ■ When the synchronization signal is inactive (correction operation) Switch 3
1. With S2 on the opposite side of the figure (the signal flow is on the ■ side), data sampled in mode ■ is applied from the RAM 7 to the A/D converter 3 through the D/A converter 5 as a reference voltage.

上記モード■、■におけるRAM7への書き込み、読み
出し動作はCCD駆動クロックに同期して行われる。
Writing and reading operations to and from the RAM 7 in the above modes (1) and (2) are performed in synchronization with the CCD drive clock.

仮に基準白板読み取り時の画素PI、P2の出力がデジ
タル値で100.120であったとすると、実際の画像
読み取り時にA/D変換器3に与えられる変換基準電圧
は画素P2読み出し時においては、画素P1読み出し時
の120/100゜つまり20%増しとなっているので
、A/D変換値は100/120となり、COD画素感
度ばらつき、光学系のむらによる出力不均一を補正でき
る。
Assuming that the output of pixels PI and P2 when reading the reference white board is a digital value of 100.120, the conversion reference voltage given to the A/D converter 3 during actual image reading will be Since the P1 reading is 120/100°, that is, 20% increased, the A/D conversion value becomes 100/120, and it is possible to correct COD pixel sensitivity variations and output non-uniformity due to optical system unevenness.

なお、RAM7は読み出し時に再書き込みループを設け
ることにより、ラインメモリを使用してもよい。
Note that a line memory may be used as the RAM 7 by providing a rewrite loop during reading.

また、スラッチS2によるモード■の時の変換基準電圧
の供給は、固定デジタル値としてD/A変換器5に与え
てもよい。
Furthermore, the conversion reference voltage supplied by the latch S2 in mode (2) may be supplied to the D/A converter 5 as a fixed digital value.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、最近非常に安価
となっているビデオ帯域のD/A変換器を利用して、R
AM内に格納されたデータに沿ったシェーディング補正
を行うため、コスト的に有利で、かつ111調整でも、
変換による信号のダイナミックレンジ低下のないシェー
ディング補正装置を提供することができる。
As explained above, according to the present invention, R
Since shading correction is performed according to the data stored in the AM, it is advantageous in terms of cost, and even with 111 adjustment,
It is possible to provide a shading correction device that does not reduce the dynamic range of a signal due to conversion.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明によるシェーディング補正装置の一実施
例のブロック図、第2図は複写機の光学系の構成図であ
る。 1・・・CCD、3・・・A/D変換器、5・・・D/
A変換器、7・・・RAM、8・・・制御部。
FIG. 1 is a block diagram of an embodiment of a shading correction apparatus according to the present invention, and FIG. 2 is a configuration diagram of an optical system of a copying machine. 1...CCD, 3...A/D converter, 5...D/
A converter, 7...RAM, 8...control unit.

Claims (1)

【特許請求の範囲】[Claims] 光電変換素子のアナログ出力をデジタル値に変換する第
1の変換手段と、前記光電変換素子の1ラインのデジタ
ル変換出力を記憶する記憶手段と、この記憶手段に記憶
したデジタルデータをアナログ信号に変換する第2の変
換手段と、この第2の変換手段の出力を前記第1の変換
手段の変換基準電圧として供給する制御手段とを備えた
ことを特徴とするシェーディング補正装置。
a first conversion means for converting an analog output of the photoelectric conversion element into a digital value; a storage means for storing one line of digital conversion output of the photoelectric conversion element; and a conversion means for converting the digital data stored in the storage means into an analog signal. 1. A shading correction device comprising: a second conversion means for converting the second conversion means; and a control means for supplying the output of the second conversion means as a conversion reference voltage to the first conversion means.
JP1163635A 1989-06-28 1989-06-28 Shading corrector Pending JPH0330575A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1163635A JPH0330575A (en) 1989-06-28 1989-06-28 Shading corrector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1163635A JPH0330575A (en) 1989-06-28 1989-06-28 Shading corrector

Publications (1)

Publication Number Publication Date
JPH0330575A true JPH0330575A (en) 1991-02-08

Family

ID=15777683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1163635A Pending JPH0330575A (en) 1989-06-28 1989-06-28 Shading corrector

Country Status (1)

Country Link
JP (1) JPH0330575A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10184443B2 (en) 2011-03-31 2019-01-22 Mitsubishi Electric Corporation Engine starting device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10184443B2 (en) 2011-03-31 2019-01-22 Mitsubishi Electric Corporation Engine starting device

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