JPH03272279A - Method of detecting output of charge coupled element and output detection circuit - Google Patents

Abstract

PURPOSE:To improve the S/N by expanding a signal from an output detection circuit into Fourier series taking one period of a transfer clock pulse as a fundamental wave frequency, calculating a coefficient of the fundamental wave frequency and obtaining only a component from the output detection circuit corresponding to the signal charge. CONSTITUTION:An output of a charge coupling element CCD 1 is given to a phase delay device 3 via a band pass filter 2. The one phase delay device 2 retards a fundamental wave frequency by a phase of pi/2 (rad). The output of the delay device 3 enters differential amplifiers 4, 5. A signal from the differential amplifiers 4, 5 is squared by a multiplier 6, the result is added by an adder 7. Moreover, the result of sum is rooted by a root computing element 8. The result is subjected to sampling and holding.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an output detection method and an output detection circuit of a charge-coupled device, and more specifically, to a charge-coupled device output detection method and an output detection circuit, and more specifically, to remove noise in a gated charge-integrating output circuit and detect a desired signal component. The present invention relates to an output detection method and an output detection circuit that accurately detect only for example,
The present invention is applied to image reading devices and imaging devices such as facsimiles and image scanners that use charge-coupled devices.

PRIOR ART FIG. 5 is a diagram showing a circuit diagram of an output circuit of a conventional charge-coupled device (CCD), in which 21 is a transfer channel, 22
．． 24 is a transfer electrode, 23 is a detection diode, 25 is a buffer circuit, 26 is a reset transistor, 27 is a gate of the reset transistor, 28 is a capacitor, and 29 is a charge coupled device.

Near one transfer electrode 22 of the COD transfer channel 21, a signal charge transferred by a CCD is detected,
A detection diode 23 is provided for converting into an output voltage. Transfer clock voltage φ1. The signal charge transferred by the transfer electrode 24 to which φ2 is applied flows into the detection diode 23 every cycle of the transfer clock pulse and changes its potential. This potential change is received by the buffer circuit 25, and the output is taken out to the outside. A reset pulse φR is applied to the gate 27 of the reset transistor 26 at a period equal to the transfer pulse, and by turning on the reset transistor 26, the detection diode 2 is turned on.
Reset to the reference potential of 3. This output circuit is formed on a common semiconductor substrate together with the COD transfer channel 21 to constitute a CCD 29. This output circuit is known as a gated charge integration type output circuit.

In this gated charge integrating output circuit, the reset transistor produces a certain amount of reset noise as described below. FIG. 6 shows the output waveform of the gated integral type output circuit in FIG. 5.

Time t. A reset pulse φR is applied from tl to tl, and when the reset transistor 26 is turned on, the potential of the detection diode 23 rises to the drain voltage V of the reset transistor 26.

Next, when the reset transistor 26 is turned off at time t4, the potential of the detection diode 23 is equal to the capacitance 28 corresponding to the sum of the detection diode 23 and the gate capacitance of the buffer circuit N25, and the gate of the reset transistor 26.
A constant reference voltage V determined by two capacitances: the capacitance between the sources and the capacitance between the sources. become.

Next, at time t, charge is transferred to and flows into the detection diode 23, changing its potential to obtain the output voltage Vs. By the way, time t. While the reset transistor 26 is conducting from tl to tl, the reset transistor 26 generates a certain amount of noise En. The reference potential V is caused by this noise En. fluctuates under the influence of For example, as shown in FIG. 6, each time the reset pulse φR is applied, the reference potential becomes V due to the influence of En. The output S/N deteriorates due to fluctuations of ±Vn. This Vn is reset noise.

3- Furthermore, in the circuit shown in FIG. 5, the reset transistor 26 is not the only noise source that generates noise, but the buffer circuit 25 is also a noise source that generates random noise. Random noise E generated by this buffer circuit 25
r is called 1/f noise whose amplitude is proportional to the reciprocal of the frequency f.

One way to reduce the influence of this reset noise and 1/f noise and improve the S/N is to set the reference potential V at time t2. A method of clamping Vs to a constant potential and then sampling the output voltage Vs at time t4 is known as a double correlation sampling method (for example, see Japanese Patent Laid-Open No. 116374/1983).

In the prior art described above, the noise that can be removed by the double correlation sampling method is limited to the low frequency components of reset noise and 1/f noise. When trying to remove noise using the double correlation sampling method, the reference potential and signal potential, which are clamped to a constant potential at times t2 and t4, are affected by random noise that is uncorrelated with each other, and the S/N of the signal output deteriorates. do.

The random noise in this case is 1/f noise and other high frequency noise components.

That is, in the double correlation sampling method, although the low frequency components of the reset noise Vn and 1/f noise generated by the reset transistor 26 can be removed, other components cannot be removed, resulting in a poor S/N. There was a drawback. In fact, when the CCD is moving at high speed, high frequency noise such as ringing greatly affects the S/N ratio.

Furthermore, in circuit systems that directly sample and hold waveforms, the CCD output waveform generally has a shape close to a rectangular wave, so the circuit system is required to have strict frequency characteristics that take into account the rise characteristics of the waveform during high-speed creeping. ing.

Purpose The present invention was made in view of the above-mentioned circumstances.
A CCD output signal detection method and output capable of improving S/N by removing reset noise and high frequency random noise contained in a COD output signal, as well as 1/f noise, and relaxing the frequency characteristics of a circuit system. A detection circuit is provided.

In order to achieve the above object, the present invention provides (1) a gated charge integration type output detection system that outputs a signal with an amplitude corresponding to a reference potential and a signal charge every cycle of a transfer clock pulse; A charge-coupled device having a circuit, and an output detection method that receives the amplitude signal from the charge-coupled device and outputs a signal represented by the signal charge with respect to the reference potential, in which the signal from the output detection circuit is transferred to the transfer clock pulse 1. Expanding the period into a Fourier series with the fundamental frequency, calculating a coefficient of the fundamental frequency component, and obtaining from the coefficient only the component corresponding to the signal charge from the output detection circuit, and (2) the charge coupling. The device output detection method includes means for band-limiting the output of the charge-coupled device using a bandpass filter whose center frequency is the transfer clock frequency and whose bandwidth is equal to the transfer frequency; detecting means for obtaining the desired signal;
Furthermore, (3) in the output detection method of the charge-coupled device, a coefficient of the fundamental frequency component is calculated using a delay element group that causes a phase delay of π/2 with respect to the transfer clock frequency and an analog calculation circuit. The device is characterized by comprising a circuit. Hereinafter, the present invention will be explained based on examples.

FIG. 1 is a circuit diagram for explaining an embodiment of a charge-coupled device output detection circuit according to the present invention. In the figure, 1 is a charge-coupled device (CCD), 2 is a bandpass filter, and 3 is π
/2 delay group, 4.5 is a differential amplifier, 6 is a multiplier, 7 is an adder, 8 is a square root operator, and 9 is a sample hold. Note that ■ to ■ in the figure indicate the outputs of the delay device group, and for example, Vn(o), Vn(Δt
), Vn(2Δt), and Vn(3Δt).

The output of the CCD 1 enters a phase delayer 3 via a bandpass filter 2 having a passband. Each phase delay device 3 has a fundamental frequency f. It has the effect of delaying the phase by π/2 (rad) with respect to the phase difference. The output of the delay device 3 -
■ is input to the differential amplifier 4.5, the differential amplifier 74 outputs ■-■, and the differential amplifier 5 outputs ■-■. When each signal is squared by the multiplier 6, the outputs of (■-■)2 and (■-■)2 are obtained, respectively, and when they are added together by the adder 7, the outputs of (■■)2 and (■-■)+1 are obtained. When the output is obtained and further calculation is performed using the square root calculator 8,
An output of (■-■)2+(■-■)2 is obtained, which is sampled and held.

Here, ■-〇 and ■-■ are respectively Fourier coefficients.

FIG. 2 is a diagram for explaining an embodiment of the charge-coupled device output detection method according to the present invention, and is a diagram showing a CCD output waveform and data sampling timing.

The waveform section corresponding to each pixel (N pieces) of COD is (section 1
~ section N). The period of this waveform matches the period 1/fo of the transfer clock. Here, f with respect to t within the nth section of the CCD output voltage (t) in FIG. Assume that the Fourier expansion Vn(t) whose fundamental wave is -(1). The higher-order terms (harmonics) in equation (1) are caused by random noise such as the reset noise of the reset transistor and the high frequency component of 1/f noise. The desired CCD signal output Vn'(t) corresponding to the n-th pixel is
The fundamental wave f of the CCD output voltage Vn(t) at the n-th pixel in the figure, the acid component (=1 component in equation (1)) Vn'(t)=an, cos2πkf, t+b, 1si
Corresponds to n2πkf,t (2). Its amplitude Vam
p(n) is vamp(n)''(a, t'' + b,,2
)1/2 (3) In other words, the desired CCD output signal amplitude mp(n) is the first-order Fourier coefficient when the nth section of the CCD output waveform is Fourier expanded at the transfer clock frequency f0, that is, (1 ), a, and s of the formula. By determining 1, it can be obtained from equation (3). This operation removes the harmonic components of fo.

Next, from equation (1), the fundamental wave f. A method for extracting only the components will be described. To find the Fourier coefficient of the fundamental wave component (FO acid component) from the above equation (1), orthogonality of trigonometric function = f sin2 πmft 5in2 πnft dt=
27T・δmn t+T f cos2πmft 5in2πnft dt=
O(4-2) (where δnun; Kronecker symbol; T=1/
f) is used.

Now consider the following integral over the interval T[t, t+1/fo].

t+T c(n)=f Vn(t)cos2πfotdt(5
-1) t+T S(n)=f Vn(t)sin2 πfot
dt (5-2) fo; Transfer clock frequency Vn(t); CCD output voltage in interval n Substituting equation (1) into equation (5-1) and equation (5-2), (
Considering equations 4-1) and (4-2), C(n) = aゎL (6
-1) S(n) = bffi1 (6-2) Here, C(n) is the first-order Fourier coefficient when Fourier expansion is performed on the nth pixel. For example, the differential amplifier shown in Figure 1 4, and 5(n) is a first-order Fourier coefficient when the n-th pixel is subjected to Fourier expansion, and corresponds to, for example, the output of the differential amplifier 5 shown in FIG.

That is, the desired CCD output signal amplitude Vamp(n) is V
amp(n) = (C(n)2+'5(n)2)"2
(7) t in equation (1) is a discrete value sequence, equation (5-1), (5-
2) If we expand the integral of equation to Σ, we get 1 (8) where NΔt= T = 1/f.

As explained above, the CCD output voltage shown in FIG.
M pieces of data are sampled at intervals Δt within an interval corresponding to each pixel. Vamp(n) is determined independently for each of the N pixels using equations (7) to (10). Then, Vamp(n) is the desired CCD output signal. The cos and sun terms in equations (9) and (lO) are f
. , Δ are both known, so they can be calculated as a weighting function for Vn(iΔt). It is important here that Vamp(n) is determined independently for the N pixels. Also, when calculating the Fourier series coefficients, sin and cos
Since the amplitude is calculated from the coefficients of each term using equation (7), the phase term of the fundamental wave is canceled.

2 This means that even if the phase of the CCD output waveform shifts due to delays in the circuit system, the effect can be canceled. Therefore, stable signal detection is possible even with phase delays. Now, according to the method of the invention, the transfer clock frequency f. The harmonic components with the fundamental wave as the fundamental wave are completely removed.

FIG. 3 is a flowchart for explaining the method for detecting the output of a charge coupled device according to the present invention.

Below, each step will be explained in order.

1μ4-: First, the CCD output is filtered by a bandpass filter.

Attention is paid to the CCD output corresponding to the pixel n=1 in the n-th pixel among each pixel (N pieces) of the CCD.

Co of CCD signal amplification Vn(iΔt) at interval Δt within the section of the first pixel;
Calculate.

By delaying the CCD signal amplification Vn(iΔt), Vn(o), V n (Δt), Vn(2Δt), V
Find n (3Δt).

Katsura Toutan; Judge whether n=M-1 (formerly the number of data samples), and since M=4 in the present invention,
Determine whether n = 3, Katsura tamari; 5 step 5 n
5 steps until = 3, that is, n = i + 1
Return to 4.

In the present invention, n=3(
M=4), calculate C(n) and 5(n). C(
n)・Vn(o)−vn(2Δt), 5(n)=Vn(
Δt)−Vn(3Δt).

Vamp(n) is calculated according to Equation H (7). This calculation is performed by the multiplier, adder, and square root calculator shown in FIG.

5. The calculation result in step 8 is output or stored as data.

4; Determine whether n=N, 7; If n=N, set n=n+ 1 and repeat 5 steps
Return to step 3, and if n=N, the process ends.

FIGS. 4(a) and (b) are diagrams showing band-pass filtered CCD output waveforms and data sampling timing. Based on these FIGS. 4(a) and (b), 1/f
A method for removing low frequency components of noise will be described. C
The CD output waveform is determined by the transfer carrier being A depending on the desired image signal.
It takes an M-modulated form. Therefore, as shown in FIG. 4(a), the spectrum of the waveform has a carrier frequency f. Centered at the Nyquist frequency f. The result is a form with sideband waves distributed up to /2 (Fig. 2(a)). Therefore, Figure 4 (b)
) as shown in the center frequency f. , bandwidth f.

f by using a bandpass filter with the characteristics of f. /2 or less is cut (Fig. 4(b)). Both desired signal components are f. Since it is in the band of ±fo/2, the information is preserved.

The low frequency component of the 1/f noise has now been removed.

Also, by applying this bandpass filter, C
Since the band of the CD output waveform is suppressed to the necessary minimum, there is an advantage that the frequency characteristics of the subsequent circuit system can be relaxed.

The actual CCD output waveform has a shape close to a rectangular wave, and has high frequency components near the rising edge and falling edge.

The output waveform of the CCDI passes through a bandpass filter 2 having a 15-pass band as shown in FIG. 4(a) and enters a phase delay device. The fundamental frequency of each phase delay device is f. It has the effect of delaying the phase by π/2 (rad). Now consider the case where M=4 in equations (9) and (10).

In this case, C(n), 5(n) is C(n) = V(0) −Vn(2Δt)
(11) S(n) = Vn(Δt) −Vn(
3Δt) (12).

In Figure 1, at time T = n/fo, Vn (0)
If the voltage appears, ■Vn(1), ■Vn(2)
, ■Vn (3) appears. Therefore, the differential amplifier 4.5
The output of is C(n), 5(n) (Equation (11), (12)
expression) appears. Each signal is squared by a multiplier 6, added by an adder 7, and further subjected to a square root calculation to perform the calculation of equation (7).

The sample and hold circuit 9 at the subsequent stage calculates the time T = n'/f
.

It is assumed that sample and hold is performed at (n=1.,,N).

As is clear from the above description, the present invention has the following effects.

(1) Effect 6 corresponding to claim 1 Charge coupling that eliminates the effects of reset noise generated by a reset transistor and high frequency components of random noise such as 1/f noise in a charge coupled device having a gated charge integration type output circuit It becomes possible to detect the output signal of the element.

(2) Effects corresponding to claim 2 The influence of low frequency components of 1/f noise can be suppressed. In addition, a highly accurate signal detection system that can alleviate the frequency characteristics of the circuit system can be realized.

(3) The effect sampling system corresponding to claim 3 is required only at the final stage, and memory can be saved. In addition, since the analog circuit performs calculations in real time, restrictions on processing time can be relaxed.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram for explaining an embodiment of a charge-coupled device output detection circuit according to the present invention, and FIG. 2 is a circuit diagram for explaining an embodiment of a charge-coupled device output detection method according to the present invention. Figure 3 is a flowchart for explaining the method of detecting the output of a charge-coupled device, Figure 4 is a diagram showing the band-pass filtered output waveform of the charge-coupled device and data sampling timing, and Figure 5 is a flowchart for explaining the output detection method of the charge-coupled device. , a diagram showing an output circuit of a conventional charge-coupled device, and FIG. 6 is a diagram showing the output waveform of FIG. 5. DESCRIPTION OF SYMBOLS 1... Charge coupled device (CCD), 2... Bandpass filter, 3... π/2 delay device group, 4, 5... Differential amplifier, 6... Multiplier, 7... Adder, 8...Square root calculator, 9...Sample hold. 0 pieces - 638

Claims (1)

[Claims] 1. A charge-coupled device having a gated charge-integrating output detection circuit that outputs a signal with an amplitude corresponding to a reference potential and a signal charge every cycle of a transfer clock pulse, and from the charge-coupled device. In an output detection method that receives the amplitude signal and outputs a signal represented by the signal charge with respect to the reference potential,
The signal from the output detection circuit is transferred to the transfer clock pulse 1.
Output detection of a charge-coupled device, characterized in that the period is expanded into a Fourier series with a fundamental frequency, a coefficient of the fundamental frequency component is calculated, and from the coefficient, only the component corresponding to the signal charge is obtained from the output detection circuit. Method. 2. In the method for detecting the output of the charge-coupled device, means for band-limiting the output of the charge-coupled device using a band-pass filter whose center frequency is the transfer clock frequency and whose bandwidth is equal to the transfer frequency; 1. An output detection circuit for a charge-coupled device, comprising detection means for obtaining a desired signal by expanding it into a Fourier series.