JPH03269521A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To improve an opening rate and to make improvement in display quality by providing a holding capacity electrode and transparent picture element electrode connected to a scanning signal line via an anodized film in such a manner that these electrodes face each other. CONSTITUTION:The holding capacity element cadd of the liquid crystal display device of an active matrix system consisting of a thin-film transistor TFT and the picture element electrode ITO 1 as one constituting element of a picture element is constituted by providing the holding capacity electrode PL 1 and transparent picture element electrode ITO connected to the scanning line GL via the anodized film AOL. The specific delectric constant of the anodized film AOL is large and the distance between the holding capacity electrode PL 1 and the transparent picture element electrode ITO 1 can be thereby decreased and, therefore, the area of the holding capacity electrode PL 1 is decreased. Since the opening rate is improved in this way, improvement in the display quality is made.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a liquid crystal display device, and particularly to an active matrix type liquid crystal display device using thin film transistors and the like.

(Prior Art) An active matrix type liquid crystal display device is one in which a nonlinear element (switching element) is provided corresponding to each of a plurality of pixel electrodes arranged in a matrix. Theoretically, the liquid crystal in each pixel is constantly driven (duty ratio 1.0), so the active method has better contrast than the so-called simple matrix method, which uses a time-division drive method, especially for color LCDs. It is becoming an indispensable technology for display devices. A typical switching element is a thin film transistor (TPT).
).

In a conventional active matrix type liquid crystal display device, an opaque storage capacitor electrode connected to an adjacent scanning signal line and a transparent pixel electrode are connected through an insulating film made of silicon nitride film used as a gate insulating film. By facing each other, a storage capacitor element is formed.

Since this liquid crystal display device is provided with a storage capacitor element, it is possible to reduce the direct current component applied to the liquid crystal, and it is also possible to store video information for a long time after the thin film transistor is turned off.

Note that an active matrix liquid crystal display device using thin film transistors is described in, for example, "12.5-inch active matrix color liquid crystal display with redundant configuration," Nikkei Electronics, pp. 193-2.
10. Published by Nikkei McGraw-Hill on December 15, 1986, known for its publication.

[Problems to be Solved by the Invention] However, in such a liquid crystal display device, the aperture ratio is reduced by the provision of the opaque storage capacitor electrode, resulting in poor display quality.

This invention was made to solve the above-mentioned problems, and an object thereof is to provide a liquid crystal display device with a large aperture ratio.

[Means for Solving the Problems 1] In order to achieve this object, in the present invention, in an active matrix type liquid crystal display device in which a thin film transistor and a pixel electrode are one component of a pixel, a thin film transistor and a pixel electrode are connected to a scanning signal line. A storage capacitor element is constructed by providing a storage capacitor electrode and a transparent pixel electrode facing each other via an anodized film.

In this case, it is preferable that the storage capacitor electrode and the transparent pixel electrode intersect.

Further, it is preferable that no insulating film be provided on the transparent pixel electrode.

[Function] In this liquid crystal display device, the dielectric constant of the anodized film is large, and the distance between the storage capacitor electrode and the transparent pixel electrode can be reduced, so the area of the storage capacitor electrode can be reduced. can.

Also, if the storage capacitor electrode and the transparent pixel electrode are crossed,
Even if there is misalignment, the overlapping area of the storage capacitor electrode and the transparent pixel electrode does not change.

Furthermore, unless an insulating film is provided on the transparent pixel electrode, charges will not be accumulated on the transparent pixel electrode.

(Embodiments) Hereinafter, the configuration of the present invention will be described together with an embodiment in which the present invention is applied to an active matrix color liquid crystal display device.

In addition, in all the figures for explaining the embodiment, parts having the same functions are given the same reference numerals, and repeated explanations thereof will be omitted.

FIG. 1 is a plan view showing one pixel and its surroundings of an active matrix color liquid crystal display device to which the present invention is applied, and FIG. 2A is a cross section taken along the line IIA-nA in FIG. 1 and a seal portion of the display panel. Diagram showing a nearby cross section, 2nd B
The figure is a cross-sectional view taken along the line IIB--IIB in FIG. 1, and FIG. 2C is a cross-sectional view taken along the line ■c-nc in FIG. 1. Moreover, FIG. 3 (main part plan view) shows a plan view when a plurality of pixels shown in FIG. 1 are arranged.

Pixel Arrangement> As shown in Figure 1, each pixel is connected to two adjacent scanning signal lines (gate signal lines or horizontal signal lines) GL and two adjacent video signal lines (drain signal lines or vertical signal lines). line)
Within the intersection area with DL (within the area surrounded by four signal lines)
It is located in

Each pixel has a thin film transistor TPT and a transparent pixel electrode ITO.
I and a storage capacitor element Cadd. Scanning signal line GL
extend in the column direction, and a plurality of them are arranged in the row direction. The video signal lines DL extend in the row direction, and a plurality of video signal lines DL are arranged in the column direction.

(Overall cross-sectional structure of display section) As shown in FIG. 2A, a thin film transistor TFT and a transparent pixel electrode IT○1 are formed on the lower transparent glass substrate SUB1 side with respect to the liquid crystal LC, and on the upper transparent glass substrate 5UB2 side. A color filter FIL and a light-shielding film BM forming a light-shielding black matrix pattern are formed.The lower transparent glass substrate SUB 1 is, for example, 1, 1
The dip film DPI made of 5101 is provided on both sides of the lower transparent glass substrate 5UB1.

The central part of Figure 2A shows a cross section of one pixel,
The left side shows the cross section of the left edge of the transparent glass substrates 5UBI and 5UB2 where external lead wiring exists, and the right side shows the cross section of the right edge of the transparent glass substrate SUB1.5UB2 where no external lead wiring exists. It shows.

The sealing material SL shown on the left and right sides of FIG. 2A is configured to seal the liquid crystal LC, and the transparent glass substrates 5UBI, 5 excluding the liquid crystal sealing opening (not shown)
It is formed along the entire edge of UB2. The sealing material SL is made of, for example, epoxy resin.

Common transparent pixel electrode IT on the upper transparent glass substrate 5UB2 side
○2 is silver paste material SI in at least one place
L is connected to an external lead wiring formed on the UBI side of the lower transparent glass substrate 5. This external lead wiring includes a gate electrode GT, a source electrode SDI, and a drain electrode SD2.
are formed in the same manufacturing process as each.

Alignment film ○RII, ○RI2, transparent pixel electrode IT○l, common transparent pixel electrode IT○2, protective film PSv11, PSV1
2, PSV2 and the insulating film GI (7) are formed inside the sealing material SL.

The polarizing plates POLI and POL2 are each attached to a lower transparent glass substrate 5UB1. It is formed on the outer surface of the upper transparent glass substrate SUB2.

Liquid crystal LC is a lower alignment film ○R1 that sets the direction of liquid crystal molecules.
1 and the upper alignment film 0RI2, and the seal part S
It is sealed by L.

Lower alignment film ○RII is protection 11u on the lower transparent glass substrate 5UBl side PSV11, PSV12, transparent pixel electrode IT
○It is formed on the top of 1.

A light shielding film BM, a color filter FIL, and a protective film P are provided on the inner surface (liquid crystal LC side) of the upper transparent glass substrate 5UB2.
SV2, common transparent pixel electrode IT◯2 (COM), and upper alignment film ◯RI2 are sequentially laminated.

This liquid crystal display device is constructed by separately forming layers on the lower transparent glass substrate 5UBi side and the upper transparent glass substrate 5UB2 side, and then overlapping the upper and lower transparent glass substrates 5UBI and 5UB2, and sealing the liquid crystal LC between them. Can be assembled.

Thin Film Transistor TPT> The thin film transistor TFT operates such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large.

The thin film transistor TPT of each pixel has three
It is divided into multiple thin film transistors (divided thin film transistors) TFTI, TPT2, and TFT3. Each of the thin film transistors TPT1 to TFT3 is substantially the same size (channel length and width are the same)
It consists of This divided thin film transistor T
Each of PTl to TFT3 is mainly a gate electrode GT.
, gate insulating film GI, i-type (intrinsic, 1ntrinsic
, a pair of source electrodes SDI, and a drain electrode SD2. Note that the source and drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, in the following description, for convenience, one side is fixed as a source and the other side is fixed as a drain.

(Gate electrode GT> As shown in detail in FIG. 4 (a plan view depicting only the conductive film g and type 1 semiconductor layer AS in FIG. 1), the gate electrode GT is connected in the vertical direction (the first The gate electrode GT is configured to protrude upward (in the figure and FIG. 4) (branched into a T-shape).The gate electrode GT is configured to protrude to the formation region of each of the thin film transistors TPT1 to TPT3. .Thin film transistor TFT
The respective gate electrodes G1'' of TFTs 1 to 3 are integrally formed (as a common gate electrode) and are formed continuously to the scanning signal line GL.The gate electrode GT is formed of a conductive film g. The conductive film g is formed using an aluminum (A1) film formed by sputtering and has a thickness of about 1000 [A].

As shown in FIGS. 1, 2A, and 4, the gate electrode GT is formed to be thicker than the type 1 semiconductor layer AS (as viewed from below) so as to completely cover the type 1 semiconductor layer AS. Therefore, when a backlight B L such as a fluorescent lamp is attached below the lower transparent glass substrate SUB l, the gate electrode GT made of opaque aluminum forms a shadow.
Since the type 1 semiconductor layer AS is not irradiated with backlight light, a conductive phenomenon due to light irradiation, that is, deterioration of the off-characteristics of the thin film transistor TPT is less likely to occur. Note that the original size of the gate electrode GT is the same as that of the source electrode SDI and the drain electrode SD.
2 (including the alignment margin between the gate electrode GT, the source electrode SDI, and the drain electrode SD2), and the depth length that determines the channel width W is the width of the source electrode SDI. It is determined by the ratio of the distance (channel length) L between the gm and the drain electrode SD2, that is, the factor W/L that determines the mutual conductance gm.

The size of the gate electrode GT in this liquid crystal display device is of course made larger than the original size mentioned above.

Scanning signal line GL> The scanning signal line OL is composed of a conductive film g.

The conductive film g of the scanning signal line GL is formed in the same manufacturing process as the conductive film g of the gate electrode GT, and is configured integrally.

(Insulating film Gl> The insulating film Gl is used as a gate insulating film of each of the thin film transistors TPT1 to TFT3.

The insulating film GI is formed on the gate electrode GT. The insulating film CI is formed using, for example, a silicon nitride film formed by plasma CVD, and has a film thickness of approximately 3000 mm.

<L-Type Semiconductor Layer AS> As shown in FIG. 4, the 1-type semiconductor layer AS is used as a channel formation region for each of the thin film transistors TPT1 to TFT3 divided into a plurality of parts. The type 1 semiconductor layer AS is formed of an amorphous silicon film or a polycrystalline silicon film, and is formed to have a thickness of about 1800 [A].

This i-type semiconductor layer AS is made of Si by changing the components of the supplied gas.
, N, an insulating film G used as a gate insulating film
Subsequently to the formation of I, it is formed in the same plasma CVD apparatus without being exposed to the outside from the plasma CVD apparatus. Further, a P-doped N1 type semiconductor layer do (FIG. 2A) for ohmic contact is similarly continuously formed to a thickness of about 400 [layers]. Thereafter, the lower transparent glass substrate SOB 1 is taken out from the CVD apparatus, and N3 type semiconductor layers do and 1 are formed using photo processing technology.
The type semiconductor layer AS is patterned into independent islands as shown in FIGS. 1, 2A, and 4.

As shown in detail in FIGS. 1 and 4, the l-type semiconductor layer AS is located at the intersection of the scanning signal line GL and the video signal line DL (
The cross-over section) is also provided between the two. The i-type semiconductor layer AS at this intersection is connected to the scanning signal line G at the intersection.
It is configured to reduce short circuits between L and the video signal line DL.

<Transparent pixel electrode IT○1> The transparent pixel electrode ITOI is provided for each pixel and constitutes one of the pixel electrodes of the liquid crystal display section.

The transparent pixel electrode ITOI is a transparent conductive film (Indium-Tin-Oxide I) formed by sputtering.
T○: Nesa film) is formed with a film thickness of 1000 to 2000 [people] (in this liquid crystal display device, a film thickness of about +200 [people]).

The transparent pixel electrode IT○1 is divided into three divided transparent pixel electrodes E1, E2, and E3 corresponding to each of the thin film transistors TFTI to TFT3 divided into a plurality of pixels. The divided transparent pixel electrodes E1 to E3 are each connected to the source electrode SDI of the thin film transistor TPT.

Each of the divided transparent pixel electrodes E1 to E3 is patterned to have substantially the same area.

In this way, the thin film transistor TPT of one pixel is divided into a plurality of thin film transistors TFTI-TFT3, and each of the divided transparent pixel electrodes E1 to E3 is connected to each of the divided thin film transistors TFTI-TPT3. Even if a part of the pixel (for example, thin film transistor TFTI) becomes a point defect, it is no longer a point defect when looking at the entire pixel (thin film transistor TFT2).
and thin film transistor TFT3 are not defective), so
The probability of point defects can be reduced, and defects can be made difficult to see.

Moreover, by configuring each of the divided transparent pixel electrodes E1 to E3 with substantially the same area, the divided transparent pixel electrode E
It is possible to make the respective liquid crystal capacitances Cpix formed by each of I-E3 and the common transparent pixel electrode ITO2 uniform.

Furthermore, since no insulating film is provided on the transparent pixel electrode ITOI, charges are not accumulated on the transparent pixel electrode IrO2, so that burn-in does not occur.

Inter-electrode film BEL) The inter-electrode film BEL is provided between the divided transparent pixel electrodes E1 to E3, the inter-electrode film BEL is composed of a conductive film g, and the inter-electrode film BEL is connected to the scanning signal line GL. has been done. Each divided transparent pixel electrode E is divided by the interelectrode film BEL.
The outlines of 1 to E3 become clearer and the contrast improves.

(Source electrode SDI, train electrode SD2>The source electrode SDI and drain electrode SD2 of each of the thin film transistors TPT1 to TFT3 divided into a plurality of
As shown in detail in FIGS. 2A and 5 (a plan view depicting only the first to third conductive films d1 to d3 in FIG.
They are provided spaced apart from each other on the type 1 semiconductor layer AS.

Each of the source electrode SD1 and the drain electrode SD2 is
The second conductive film d2 and the third conductive film d3 are sequentially stacked one on top of the other from the lower layer side in contact with the N+ type semiconductor layer dO. The second conductive film d2 and the third conductive film d3 of the source electrode SD] are formed in the same manufacturing process as the second conductive film d2 and the third conductive film d3 of the drain electrode SD2.

The second conductive film d2 is a chromium film formed by sputtering,
It is formed with a film thickness of 500 to 100 [A] (in this liquid crystal display device, the film thickness is about 600 [A]). The thicker the chromium film is, the greater the stress will be, so
The film is formed within a range that does not exceed a film thickness of approximately 0 [A]. The chromium film has good contact with the N4″ type semiconductor layer do.The chromium film has good contact with the N4″ type semiconductor layer do.
It constitutes a so-called barrier layer that prevents diffusion into the type semiconductor layer do.

As the second conductive film d2, in addition to the chromium film, a high melting point metal (
Mo, Ti, Ta, W) films, high melting point metal silicide (M
It may be formed using a film such as oSi, TiSi, Ta5j, WSi, etc.

After patterning the second conductive film d2 by photo processing, the N" type semiconductor layer dO is removed using the same photo processing mask or using the second conductive film d2 as a mask. In other words, the l type semiconductor layer AS The N+ type semiconductor layer d remaining on top
◯ indicates that the portion other than the second conductive film d2 is removed by self-alignment. At this time, since the N+ type semiconductor layer dO is etched so that its entire thickness is removed, the i type semiconductor layer A
S is also etched to some extent on its surface, but the degree of etching can be controlled by the etching time.

Thereafter, the third conductive film d3 is formed by aluminum sputtering to a thickness of 3000 to 5500 [A] (in this liquid crystal display device, a film thickness of about 3500 [A]).

Aluminum film has less stress than chrome film,
It is possible to form a thick film, and the source electrode SDI,
It is configured to reduce the resistance values of the drain electrode SD2 and the video signal line DL. The third conductive film d3 may be formed of an aluminum film containing silicon or copper (Cu) as an additive in addition to the aluminum film.

Second conductive film d2 of source electrode SDI, drain electrode SD
2, each of the second conductive films d2 is connected to the upper third conductive film d.
Compared to No. 3, it is much more inward (into the channel region). In other words, the second conductive film d2 in these parts
is the thin film transistor TPT regardless of the third conductive film d3.
It is configured such that the channel length of the channel can be specified.

The source electrode SDI is connected to the transparent pixel 1ii pole IT○1. The source electrode SDI has a step shape of the i-type semiconductor layer AS (a step corresponding to the sum of the thickness of the conductive film g, the thickness of the N''' type semiconductor layer do, and the thickness of the type 1 semiconductor layer AS). Specifically, the source electrode SDI is composed of a second conductive film d2 and a third conductive film d3, which are formed along the step shape of the l-type semiconductor layer AS.

The third conductive film d3 of the source electrode SDI cannot be formed thickly because the chromium film of the second conductive film d2 increases stress, and cannot overcome the stepped shape of the L-type semiconductor layer AS.
It is configured to overcome the type semiconductor layer AS. In other words, step coverage is improved by forming the third conductive film d3 thickly. Since the third conductive film d3 can be formed thickly, the resistance value of the source electrode SD1 (drain electrode S
The same applies to D2 and the video signal line DL).

<Protective film PSVI1) A protective film PSV11 is provided on the thin film transistor TFT. The protective film PSV11 is formed mainly to protect the thin film transistor TPT from moisture, etc., and a film having high transparency and good moisture resistance is used. The protective film PSVI1 is made of an organic film such as polyimide resin, and the protective film PSv11 has a thickness of about 5000 mm.

(Light-shielding film BM) A shielding film BM is provided on the upper transparent glass substrate 5UB2 side to prevent external light (light from above in FIG. 2A) from entering the l-type semiconductor layer AS used as a channel formation region.
is provided, and the shielding film BM has a pattern as shown by hatching in FIG. Note that FIG. 6 is a plan view depicting only the first conductive film d1 made of the IT○ film, the color filter FI■, and the light shielding film BM in FIG.

The light-shielding film BM is formed of a film having a high light-shielding property, such as an aluminum film or a chromium film, and in this liquid crystal display device, the chromium film is formed by sputtering to a thickness of approximately 1,300 mm.

Therefore, the i-type semiconductor layer AS of the thin film transistors TFT1 to TFT3 is sandwiched between the upper and lower light shielding films BM and the thick gate electrode GT, and that portion is not exposed to external natural light or backlight light.

The light shielding film BM is formed around the pixel as shown by the hatched area in FIG. There is. Therefore, the outline of each pixel becomes clear due to the light shielding film BM, and the contrast is improved. In other words, the light shielding film BM has two functions: shielding light for the type 1 semiconductor layer AS and serving as a black matrix.

Note that it is also possible to attach a backlight to the upper transparent glass substrate 5UB2 side and make the lower transparent glass substrate SUB1 the observation side (externally exposed side).

(Common transparent pixel electrode IT○2) The common transparent pixel electrode IT○2 is connected to the lower transparent glass substrate SU
Opposed to the transparent pixel electrode ITOI provided for each pixel on the B l side, the optical state of the liquid crystal LC is determined by each pixel electrode ITOI.
It changes in response to the potential difference (electric field) between and the common transparent pixel electrode IT○2. The configuration is such that a common voltage V cam is applied to this common transparent pixel electrode IT○2. The common voltage V com is an intermediate potential between the low-level drive voltage Vdm1n and the high-level drive voltage Vdmax applied to the video signal line DL.

(Color Filter FIL) The color filter FIL is constructed by coloring a dyed base material made of a resinous material such as an acrylic resin with a dye. The color filter FIL is formed in a dot shape for each pixel at a position facing the pixel (Fig. 7), and is colored differently (
Figure 7 shows the third conductive film layer d3 and color filter F in Figure 3.
Only the IL is drawn, and the R, B, and G color filters FIL have cross hatches at 45°, 135°, respectively). The color filter FIL is formed thick so as to cover all of the transparent pixel electrodes ITOI (El to E3) as shown in FIG. It is formed inside the periphery of the transparent pixel electrode ITOI so as to overlap with the transparent pixel electrode ITOI.

Color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass substrate SUB 2, and the dyed base material other than the red filter forming area is removed by photolithography technology. Thereafter, the dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. At the same time, a green filter G and a blue filter B are sequentially formed by performing similar steps.

(Protective Film PSV2) The protective film PSV2 is provided to prevent the dyes that have been used to dye the color filters FIL into different colors from leaking into the liquid crystal LC. The protective film PSV2 is made of a transparent resin material such as acrylic resin or epoxy resin.

<Pixel Arrangement> As shown in FIGS. 3 and 7, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line GL extends, and are arranged in pixel columns XI, X2 . X3, X4. It consists of each of... Each pixel column XI, X2. X3. X
4. Each pixel of... is a thin film transistor TF
The arrangement positions of T1 to TFT3 and divided transparent pixel electrodes E1 to E3 are configured to be the same. In other words, odd pixel row
In each of the pixels I, X3°, . . . , the thin film transistors TPT1 to TFT3 are arranged on the right side, and the divided transparent pixel electrodes E1 to E3 are arranged on the left side.

Odd pixel columns Xi, X3. . . , adjacent even-numbered pixel columns X2 . X4. Each pixel of ... is
Odd pixel columns XI, X3. . . are made up of pixels that are symmetrically turned upside down with respect to the extending direction of the video signal line DL. That is, pixel row X2. X4
．． Each pixel of... is a thin film transistor TPT.
1 to TFT3 are arranged on the left side, transparent pixel electrode El-
E3 is arranged on the right side. Then, pixel row X2. Each pixel of X4°... is a pixel column XI,
X3. ... are shifted (shifted) by half a pixel interval in the column direction. In other words,
If each pixel interval of pixel row Pixel interval (0,5
Pitch) is worn out. The video signal line DL, which extends in the row direction between each pixel, is connected by a half pixel interval (
0.5 pitches) in the column direction.

As a result, as shown in FIG. 7, the pixel on which the predetermined color filter is formed in the previous pixel row Pixels on which color filters are formed (for example, pixel row
4) are spaced apart by 1.5 pixels (1.5 pitch), and the RGB color filters FIL are arranged in a triangular arrangement. Color filter FI
The triangular arrangement structure of RGB of L can improve the color mixing of each color, and therefore can improve the resolution of a color image.

Moreover, since the video signal line DL extends in the column direction by only half a pixel interval between each pixel column X, it does not intersect with the adjacent video signal line DL. Therefore, video signal JJ
It is possible to eliminate the routing of the IDL and reduce its occupied area, and it is also possible to eliminate the detour of the video signal line DL and eliminate the multilayer wiring structure.

<Equivalent circuit of entire display device> FIG. 8 shows the circuitry of this liquid crystal display device.

X i G, X i + I G, ... are video signal lines DI connected to the pixels in which the green filter G is formed.
, is.

X i B, X i + l B, . . . are video signal lines DL connected to the pixels where the blue filter B is formed.
It is.

Xi+lR, Xi+2R, . . . are video signal lines DL connected to pixels in which the red filter R is formed. These video signal lines DL are selected by a video signal drive circuit. Yl is a scanning signal line GL that selects the pixel column X1 shown in FIGS. 3 and 7.

Similarly, Yi+1. Yi+2. . . , each of pixel rows X2 . X3. . . . is a scanning signal line GL that selects each of the following. These scanning signal lines GL are connected to a vertical scanning circuit.

Structure of storage capacitor element Cadd> Each of the divided transparent pixel electrodes E1 to E3 is bent into an L-shape so as to overlap the adjacent scanning signal line GL at the end opposite to the end connected to the thin film transistor TPT. It is formed as follows. As is clear from FIG. 2B, in this superposition, each of the divided transparent pixel electrodes E1 to E3 is used as one electrode PL2, and the adjacent scanning fδ line GL is used as the other electrode, that is, the storage capacitor electrode 1)Ll. A storage capacitor element (electrostatic capacitor element) constitutes Cadd. The ends of the divided transparent pixel electrodes E1 to E3 are the storage capacitor electrodes P.
Since it intersects LI, the overlapping area of the storage capacitor electrode PLI and the transparent pixel electrode TOI does not change even if there is misalignment, so that the capacitance of the storage capacitor element Cadd can be kept constant.

As is clear from FIG. 4, the storage capacitor element Cadd is formed in a portion where the width of the conductive film g of the gate line GL is widened. Note that the portion of the conductive film g that intersects with the video signal line DL is made thin in order to reduce the probability of short circuit with the video signal line DL.

Similar to the source electrode SDI, a portion between each of the divided transparent pixel electrodes E1 to E3 and the storage capacitor electrode PLI, which are overlapped to form the storage capacitor element Cadd, includes a source electrode SDI.
An island region made up of the second conductive film d2 and the third conductive film d3 is provided so that the transparent pixel electrode IT○1 is not disconnected when climbing over the step shape. This island region is the transparent pixel electrode ITOIO surface f! The structure is made as small as possible so as not to reduce the aperture ratio.

(Protective film PSV12> A protective film PSV12 is provided in the storage capacitance element Cacid portion. The protective film PSV12 is made of a silicon nitride film and is formed to have a thickness of about 1[/ffi].

(Anodized film AOL> Anodized film AOL is an aluminum anodized film (A1.○, film) provided on the conductive film g.
constitutes a dielectric film of the storage capacitor element Cadd, a part of the gate insulating film of the thin film transistor TPT, and an insulating film on the interelectrode film BEL. The dielectric constant of the anodized film AOL is large, about 1.5 times that of the silicon nitride film, and the film thickness of the anodized film AOL, that is, the storage capacitor electrode PLI
Since the distance between the storage capacitor electrode ITOI (PL2) and the transparent pixel electrode ITOI (PL2) can be reduced, the area of the storage capacitor electrode PLI can be approximately halved, so the aperture ratio can be improved and the display quality can be improved. .

(Equivalent circuit of storage capacitor element Cadd and its operation) An equivalent circuit of the pixel shown in FIG. 1 is shown in FIG. In FIG. 9, Cgs is a parasitic capacitance formed between the gate electrode GT and source electrode SDI of the thin film transistor TFT. The dielectric film of the parasitic capacitance Cgs is an insulating film CI.

Cpix is a liquid crystal capacitor formed between the transparent pixel electrode ゛01 (PIX) and the common transparent pixel electrode IT○2 (COM).

The dielectric film of the liquid crystal capacitor Cpix is the liquid crystal LC1 protective film PSV.
I and alignment films ○RII and ○RI2.

Vlc is a midpoint potential.

When the thin film transistor TPT switches, the storage capacitance element Cadd has a midpoint potential (pixel electrode potential) Vlc.
It works to reduce the influence of the gate potential change ΔVg on the voltage. This situation can be expressed as the following formula.

△ Vlc= (Cgs/(Cgs+Cadd×Cpi
x)) This change △Vlc is the liquid crystal L
It causes a DC component added to C, but the holding capacity Cadd
The thicker it is, the smaller its value can be. Further, the storage capacitor element Cadd also has the effect of lengthening the discharge time, so that video information is stored for a long time after the thin film transistor TPT is turned off. Reducing the DC component applied to the liquid crystal LC can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching between liquid crystal display screens.

As mentioned above, the gate electrode GT is made of an l-type semiconductor layer, A
The source electrode S is enlarged to completely cover the source electrode S.
The overlap area between DI and the drain electrode SD2 increases, and therefore the parasitic capacitance Cgs increases, and the midpoint potential V
The opposite effect occurs in that lc becomes more susceptible to the influence of the gate (scanning) signal Vg.

However, by providing the storage capacitor element Cadd, this disadvantage can also be eliminated.

The storage capacitance of the storage capacitor element Cadd is 4 to 8 times the liquid crystal capacitance Cpix (4・Cpix
<Cadd<8・Cpix), 8 to 32 times the parasitic capacitance Cgs (8−Cgs(Cadd(32・Cgs)
Set to a value of about

Connection method of storage capacitor element Cadd electrode line> The final stage scanning signal line GL (or first stage scanning signal line GL) used only as a capacitive electrode line is connected to the common transparent pixel electrode IT as shown in FIG. ○Connect to 2 (Vcom). As shown in FIG. 2A, the common transparent pixel electrode IT○2 is connected to an external lead wiring at the peripheral edge of the liquid crystal display device using a silver paste material SIL. Moreover, part of the conductive layer (gl and g2) of this external wiring is connected to the scanning signal line G.
It is constructed using the same manufacturing process as L. As a result, the final stage scanning signal line (capacitive electrode line) GL can be easily connected to the common transparent pixel electrode ITO2.

Alternatively, as shown by the dotted line in FIG. 8, the final stage (first stage) scanning signal line (capacitive electrode line) GL may be connected to the first stage (final stage) scanning signal line GL.

Note that this connection can be made by internal wiring within the liquid crystal display section or external wiring.

(DC cancellation by the scanning signal of the storage capacitor element Cadd) This liquid crystal display device uses the DC cancellation method ([)C cancellation method] described in Japanese Patent Application No. 62-95125 previously filed by the applicant of the present application. Basically, as shown in FIG. 10 (time chart), by controlling the drive voltage of the scanning signal line GL, the DC component applied to the liquid crystal LC can be further reduced. In FIG. 10, Vl is the driving voltage of an arbitrary scanning signal line GL, and ■i+1 is the driving voltage of the scanning signal line GL at the next stage. Vee is a low-level drive voltage Vdm1n applied to the video signal line DL.
, Vdd is a high-level drive voltage Vdmax applied to the video signal line DL. Voltage change △V of midpoint potential vlc (see Figure 9) at each time t = t i - t, 4
1 to △v4 is the total capacitance of pixels C=Cgs+Cpix
+Cadd is expressed by the following equation.

△V, = -(Cgs/C)・V 2△V, =+(
Cgs/C)・(V 1 +V 2)(Cadd/C
IV 2 △V, = −(Cgs/C)・V 1+ (Cad
d/C)・(V 1 + V 2 )△V4=-(C
add/C)·V 1 Here, if the drive voltage applied to the scanning signal line GL is sufficient (see Note 1 below), the DC voltage applied to the liquid crystal LC is expressed by the following equation.

△V3+△V, = (Cadd-V 2- Cgs-V
l)/C Therefore, Cadd-V2 = Cg
When s-V l, the DC voltage applied to the liquid crystal LC becomes O.

[Note] At times L1 and [2, the change in drive voltage ■1 affects the midpoint potential Vlc, but during the period from L2 to L3, the midpoint potential Vlc is made the same potential as the video signal potential through the signal line Xi. (enough writing of video signal). The potential applied to the liquid crystal LC is almost determined by the potential immediately after the thin film transistor TPT is turned off (the off period of the thin film transistor TPT is overwhelmingly longer than the on period). Therefore, liquid crystal L
In calculation of the DC component applied to C, the period tl to t3 can be almost ignored, and it is sufficient to consider the potential immediately after the thin film transistor TPT is turned off, that is, the influence of the transition at times L3 and t4. Note that the polarity of the video signal is inverted for each frame or line, and the DC component due to the video signal itself is zero.

In other words, in the DC cancellation method, the reduction in the midpoint potential Vlc caused by the parasitic capacitance Cgs is compensated for by the retention capacitance element Ca
dd and the next-stage scanning signal line (capacitive electrode line) GL, the DC component applied to the liquid crystal LC can be made extremely small. As a result, the life of the liquid crystal LC of the liquid crystal display device can be improved.

Of course, when the gate electrode GT is increased in size to improve the light shielding effect, the storage capacitance of the storage capacitance element Cadd may be increased accordingly.

Next, a method for manufacturing the liquid crystal display device shown in FIGS. 1 to 9 will be described. First, 7059 glass (product name)
A dip film DPI was provided on both sides of the lower transparent glass substrate 5UBl by dip treatment, and then heated at 500°C.
Perform 60 minutes of flattening. Next, a conductive film g made of aluminum and having a film thickness of 2800 [A] is provided on the lower transparent glass substrate 5IJB1 by sputtering. Next, the conductive film g is selectively etched by photolithography using a mixed acid of phosphoric acid, nitric acid, and acetic acid as an etching solution, thereby forming scanning signal lines GL and the like.

Next, the surface of the conductive film g is anodized by using an anodic solution containing ethylene glycol and tartaric acid and applying 120 V, thereby providing an anodized film AOL. At this time, the film thickness of the anodized film AOL was set to 2700 [Al
Then, the thickness of the conductive film g is 1000 [Al. Next, a first film made of IT○ film with a film thickness of 1200 [A]
A conductive film d1 is provided by sputtering. Next, the first conductive film d1 is selectively etched by photolithography using a mixed acid of hydrochloric acid and nitric acid as an etching solution, thereby forming a transparent pixel electrode ITol and the like. next,
02 Asher was performed for 5 minutes to make the surface of the first conductive film d1 oxygen-rich, and then ammonia gas, silane gas, and nitrogen gas were introduced into the plasma CVD apparatus.
A silicon nitride film with a thickness of 3500 [A] was formed, silane gas and hydrogen gas were introduced into the plasma CVD apparatus, and a type 1 amorphous silicon film with a film thickness of 2100 [A] was formed. Hydrogen gas and phosphine gas are introduced to form an N'' type silicon film with a film thickness of 300 [layers].Next, SF is used as a dry etching gas.
By selectively etching the N+ type silicon film and the type 1 amorphous silicon film by photolithography using CCQ4, an l type semiconductor layer AS is formed. Next, an insulating film CI is formed by selectively etching the silicon nitride film while recessing the type 1 amorphous silicon film by photolithography using SF as a dry etching gas. Next, a second conductive film d2 made of a chromium film with a thickness of 600 mm and a third conductive film d3 made of an aluminum film (Al-3i, Al-3i-Cu) with a thickness of 3500 mm are formed. Continuously provided by sputtering. Next, the third conductive film d3 is selectively etched using a photolithography technique using a mixed acid of phosphoric acid, nitric acid, and acetic acid as an etching solution, and then nitric acid dichloromethane is used as an etching solution.
By selectively etching the second conductive film d2 using a photolithography technique using a cerium ammonium solution, the video signal line DL, the source electrode SD1, and the drain electrode SD2 are etched.
form. Before removing the resist, CCQ, SF was applied to the dry etching equipment. An N1 type semiconductor layer dO is formed by selectively etching the N1 type silicon film. Next, ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD apparatus to form a silicon nitride film having a thickness of 1 [-]. next,
SF as a dry etching gas.

The protective film PSV12 is formed by selectively etching the silicon nitride film using a photolithographic technique using a photolithographic technique. Next, after spin-coding the organic film and hardening the organic film by baking, the protective film PSVII is etched selectively using an asher.
form.

In this method of manufacturing a liquid crystal display device, the first conductive film d
After forming the transparent pixel electrode IT○1 in step 1, the second step
Since the video signal line DL is formed by the third conductive films d2 and d3, it is possible to prevent a short circuit between the transparent pixel electrode IT○l and the video signal line DL. Furthermore, since the insulating film Gl is formed by selectively etching the silicon nitride film without recessing the l-type amorphous silicon film,
Since the end of the insulating film GI is tapered, the source electrode S
It is possible to reliably connect DI and transparent pixel electrode IT○1.

As above, the invention made by the present inventor has been specifically explained based on the above embodiments, but this invention is not limited to the above embodiments, and can be modified in various ways without departing from the gist thereof. Of course.

For example, in the above embodiment, the transparent pixel electrode ITO
Although the end of the transparent pixel electrode ITOI crosses the scanning signal line GL itself, the end of the transparent pixel electrode ITOI may also cross the storage capacitor electrode connected to the scanning signal line GL. Further, in the above-described embodiment, the scanning signal line GL and the like are formed only by the conductive film g, but a chromium film may be provided under the conductive film g. In this case, it is desirable to cover the area where the chromium film is provided under the conductive film g with a resist so as not to be anodized, and to locally anodize the area where it is necessary to provide dielectric strength.

[Effects of the Invention] As explained above, in the liquid crystal display device according to the present invention, since the area of the storage capacitor electrode can be reduced, the aperture ratio can be improved, and the display quality can be improved. .

Also, if the storage capacitor electrode and the transparent pixel electrode are crossed,
Even if there is misalignment, the overlapping area of the storage capacitor electrode and the transparent pixel electrode does not change, so the capacitance of the storage capacitor element can be kept constant.

Furthermore, unless an insulating film is provided on the transparent pixel electrode, charges will not be accumulated on the transparent pixel electrode, so that burn-in will not occur.

As described above, the effects of this invention are remarkable.

[Brief explanation of drawings]

FIG. 1 is a plan view of a main part showing one pixel of a liquid crystal display section of an active matrix color liquid crystal display device to which the present invention is applied, and FIG. 2A is a section taken along the line IIA-HA in FIG. 1. 2B is a sectional view taken along the line IIB-IIB in FIG. 1, FIG. 2C is a sectional view taken along the nc-nC line in FIG. 4 to 6 are plan views depicting only predetermined layers of pixels shown in FIG. 1, and FIG. 7 is shown in FIG. 3. FIG. 8 is an equivalent circuit diagram showing the liquid crystal display section of an active matrix color liquid crystal display device, and FIG. 9 is the same as shown in FIG. 1. FIG. 10, which is an equivalent circuit diagram of a pixel, is a time chart showing the driving voltage of the scanning signal line by the DC cancellation method. SUB...Transparent glass substrate GL...Scanning signal line DL...Video signal line GI...Insulating film GT...Gate electrode AS...L-type semiconductor layer SD...Source electrode or drain electrode PSV・・Protective film BM ・・Light shielding film LC ・・Liquid crystal TPT ・・Thin film transistor IT・Liquid crystal capacitor AOL...Anodized film PLI...Retention capacitor electrode

Claims (1)

[Claims] 1. In an active matrix type liquid crystal display device in which a thin film transistor and a pixel electrode are one component of a pixel, a storage capacitor electrode connected to a scanning signal line and a transparent pixel electrode are anodized. 1. A liquid crystal display device comprising a storage capacitor element formed by disposing the two elements facing each other with a film interposed therebetween. 2. The liquid crystal display device according to claim 1, wherein the storage capacitor electrode and the transparent pixel electrode cross each other. 3. The liquid crystal display device according to claim 1, wherein no insulating film is provided on the transparent pixel electrode.