JPH03250829A - Clock topology constitution method for digital synchronous private network - Google Patents

Abstract

PURPOSE:To build up a clock supply path automonously with a same algorithm by repeating the decision of a clock level of its own node and the transmission of a clock level information command through the reception of the clock level information command by each node so as to generate a clock topology tree. CONSTITUTION:One node among nodes #1-#10 is assigned in advance as a master node and in this case, the node #1 is assigned as the master node. A clock topology tree is generated by repeating the decision of the clock level of its own node and the transmission of a clock level information command through the reception of the clock level information command CMD by the nodes #2-#10 in the network. Thus, the clock supply path is quickly built up automonously by a same algorithm in the case of rising of the network or a node fault in a digital synchronous private network.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a clock topology configuration method in a digitally synchronous private network.

The purpose is to autonomously and quickly construct a clock supply route using the same algorithm when starting up a network or in the event of a node failure.

The main node creates a clock level information command that specifies its own node's clock level and node number and sends it to the adjacent node, and the node that receives this clock level information command clocks its own node when a predetermined condition is met. The clock level is determined to be one level lower than the clock level of the received clock level information command, and a new clock level information command for the own node is created and sent to the adjacent nodes, so that each node in the network can receive clock level information. A clock topology tree is generated by repeatedly determining the clock level of its own node upon receiving a command and transmitting a clock level information command.

[Industrial Application Field] The present invention relates to a clock topology configuration method in a digitally synchronized private network in which network synchronization clocks are not supplied from other networks or lines, and particularly to a method for constructing a new clock topology at the time of network startup. This invention relates to a clock topology configuration method for a digital synchronous private network that changes the clock topology due to a failure of a node in the network or reconstructs the clock topology due to a failure of the main node.

In a digitally synchronized private network that uses the slave synchronization method, when a failure occurs in a node in the network, the clock supply route from the main node is quickly changed to avoid the failed node and prevent clock slips, etc. There is a need to improve the reliability of the wire mesh body by creating a gate 1 that does not cause data loss.

[Prior Art] In a conventional digital synchronous private network, a digital multiplexer that interfaces with multiple lines such as NTT is designed for NTT connection (synchronized network). In order to achieve this, a clock is extracted from the NTT line (#20) and used as the network synchronization clock for each node #21 to #24 in the digital synchronous private network.

However, in recent years, digital synchronous private networks using optical fibers and wireless lines have developed, and these digital synchronous private networks do not receive clock supplies from external lines.

Therefore, as shown in FIG. 9, in the network synchronization method of such a digital synchronous private network, the main node (#31) that holds the source clock in the digital synchronous private network is connected to other slave nodes (#32 to #34) A dependent synchronization method is generally adopted in which a clock is supplied to the terminal.

[Problems to be Solved by the Invention] In a digital synchronous private network, for example, when a failure occurs in the main node (#31) that holds the clock source, the other nodes #32 to #34 fall into a holdover state,
As shown in FIG. 10, each node #32 to #34 switches the source of the network synchronization clock from the source clock of the main node #31 to the free-running clock held by each node #32 to #34. , communication will be performed using each free-running clock. Similarly, if a failure occurs in a node other than the main node in the network, the clock supply path will be cut off by the failed node, so each node will switch to its own clock. .

In this case, if the period of the failure becomes long, data slips may occur due to differences in the accuracy of the free-running clocks of each node, reducing the reliability of the network. moreover,
If the main node holding the source clock is restored, in the worst case, the entire network will need to be restarted.

A way to avoid this is to have each node switch to a free-running clock upon node failure.

Possible methods include switching the source clock source to the backup main node in the event of a failure in the main node, or setting up a new lock supply route that bypasses the failed node in the event of failure in the slave node.

In this method, various patterns of node failure in the nine networks are assumed, clock supply routes are determined in advance for each of these various patterns, and all the data is stored in the form of a table. It is necessary to have it. However, as the number of nodes in the network increases, the amount of data in this table becomes enormous, making this table method difficult to implement in reality.

The present invention was made in view of such technical problems,
The purpose of this is to quickly construct a clock supply route autonomously, using the same algorithm, in a digital synchronous private network at the time of network startup or node failure.

[Means for Solving the Problems] As shown in FIG. 1, the clock topology configuration method for a digital synchronous private network according to the present invention provides In a synchronous private network, the main node #1, for example, creates a clock level information command CMD that specifies its own node's clock level L1 and node number #l, and sends it to adjacent nodes #2~
#3 and send this clock level information command CMD
Nodes #2 to #3 that have received this determine the clock level of their own node to be one level lower than the clock level of the received clock level information command CMD when a predetermined condition is met, and also transmit the clock level information about their own node. Create a new command CMD and add adjacent node #2~
#7 and each node #2 to #10 in the network
The node generates a clock topology tree by repeatedly determining the clock level of its own node upon receiving the clock level information command CMD and transmitting the clock level information command CMD.

[Operation] Each node determines its own clock level according to the clock information command CMD from the adjacent node. Therefore, simply by predetermining the node with the highest clock level, regardless of whether the clock level is higher or lower,
Each node can determine its own clock level using the same algorithm.

[Example] The present invention will be described in detail below with reference to nine drawings.

FIG. 1 shows a configuration example of a digital synchronous private network to which the clock topology configuration method according to the present invention is applied.

In FIG. 1, #1 to #10 are nodes constituting a digital synchronous private network, and #1 to #1O are the node numbers assigned to each node as they are. Further, one node among these nodes #1 to #10 is assigned in advance as a master node (main node), and here node #l is designated as the master node. Each node #1 to #1 in this network
0 assumes that the node numbers of all nodes in the network are known in advance. In addition, the solid lines that interconnect nodes #1 to #lO represent physical lines, and here, nodes that are directly connected to a certain node #n via the line are It is called a node.

(1) Clock topology construction method at network startup First, as shown in Figure 1, master node #1 creates a clock level information command CMD,
This is connected to adjacent node #2. #3. Distribute #4. The clock level information command CMD consists of the clock number and clock level of its own node, and in the case of master node #l, the clock number #1. A clock level information command CMD of clock level L1 is created and transmitted to adjacent nodes #2 to #4.

Adjacent nodes #2 to #4 that have received this clock level information command CMD determine the lower clock level L2, which is obtained by adding 1 to the clock level L1 in the received clock level information command CMD, as their own clock level, and further A new clock level information command CMD regarding the own node is created using the clock level L2 of the own node and the own node number (#2, #3 or #4), and this clock level information command CMD is sent to each node #
Send to nodes adjacent to #2 to #4.

In this case, the own node uses the clock level information command CM
The destination node #1 that received D can be excluded from the transmission target.

Therefore, in the case of FIG. 1, node #2 is node #3
and #5, node #3 is connected to nodes #2, #4, #5, and #6
Also, node #4 sends its own clock level information command CMD to nodes #3 and #7, respectively.

Nodes #2 to #7 that have received this clock level information command CMD determine the clock level of their own node to be a lower clock level L3 when a predetermined condition is met, and clock level information including this clock level L3 is determined. Create a command CMD and send it to the adjacent node.

In another embodiment of the clock topology configuration method for a digital synchronous private network according to the present invention, each node #2 to #10 of the network transmits clock level information to its own node when transmitting a new lock level information command to an adjacent node. The command CMD is not sent to the source node that sent it.

Further, the digital synchronous private network glue lock topology configuration method according to the present invention is provided in another form.

When each node #2 to #10 in the network receives two or more clock level information commands CMD, the clock level of the received clock level information command is
If the clock level is the same as or lower than the already determined clock level of the own node, this clock level information command C
A clock topology tree is generated with a predetermined condition that one of the clock level information commands CMD is selected according to a predetermined priority order when the clock level is an upper clock level, ignoring MD.

In addition, the present invention provides a clock topology configuration method for a digital synchronous private network, in which each of the nodes #2 to #10 in the network is configured in another form.

When a clock level information command CMD is received from a node with a higher clock level, an acceptance response ACK is sent back to the higher node to accept the clock supply, and a refusal is sent to the node with the same or lower clock level to deny the clock supply. A response NACK is sent back.

The above-mentioned predetermined condition is that when two or more clock level information commands CMD are received by each node, the clock level received later is If the clock level of the level information command CMD is the same or lower, it will be ignored and the clock level information command CMD will not be created and sent. On the other hand, if it is higher, the clock level of such higher If they are the same, one of them is selected according to a predetermined priority order, and if it is a higher clock level and higher than the previously transmitted clock level, the clock level is changed again based on the later clock level information command CMD. , and create and send a clock level information command CMD.

Further, the node number of each node can be used as the above-mentioned predetermined priority order.9 For example, the clock level information command CMD from the node with the lower node number is given priority over the node with the higher number.

Here, when each node receives a clock level information command CMD with a clock level higher than that of its own node, it determines the source node as the clock supply source node, and in that case, the source node An acceptance response ACK accepting clock supply is returned. The node that has returned the acceptance response ACK then operates to receive clock supply from the destination node.

On the other hand, when it receives a clock level information command CMD of the same or lower clock level, it returns a rejection response NACK denying clock supply to the source node.

The node that received this acceptance response ACK receives the acceptance response A.
A clock is supplied to the node that sent the CK, and the node that receives the rejection response NACK responds with the rejection response N.
Do not supply a clock to the ACK source node.

In this manner, each node receives and transmits the clock level information command CMD, and stores the results as a lock flow table as shown in FIG. This clock flow table consists of the clock level of the own node, the node number and clock level of the upper node to which the acceptance response ACK was finally sent, and the node number and clock level of the lower node that received the acceptance response ACK. Based on this clock flow table, each node can know the upper node from which it receives clock supply and the lower node to which it receives clock supply.

By repeating such operations at each node, a lock topology tree as shown in FIG. 3 is finally formed. Then, according to this clock topology tree, the master node # of the highest clock level Ll
Starting from node 1, clocks are supplied to nodes at lower clock levels in order.

It should be noted here that this clock topology tree is a logically formed clock supply route and is different from an actual line connection. For example, nodes #2 and #3. Nodes #3 and #4. Nodes #5 and #6.
Although nodes #8 and #9 are physically connected by a line, they are disconnected on the clock topology tree.

(2) Method for changing the clock topology in the event of line or intermediate node failure (or maintenance) The method for configuring the clock topology of a digital synchronous private network according to the present invention can be implemented by changing the clock topology of the network as shown in FIG. For example, when each node #7 in the clock topology tree detects a failure in the clock supply from the upper node #4 on the clock topology tree, it sends a clock failure notification CE to the lower node #8 on the clock topology tree.
Node #7, which performed CEI and received this clock failure notification CEI, further lowers node #8. #10 sequentially sends a clock failure notification to node #7 that detected the failure and node #8 that received the clock failure notification CEI. #9 sets its own node to autonomous clock mode, creates a clock supply request command CMD■, and sends it to adjacent nodes #7 to #l.
Node #9 in non-autonomous clock mode, which received this clock supply request command CMD, created a clock level information command CMD and sent it to the adjacent node, thereby changing the clock topology tree. It is something.

When each node recognizes that it cannot receive the clock normally due to a failure of the node to which it is receiving clock supply or a failure of the clock supply line in between, it transfers the clock to the node below it in the clock topology tree. A clock fault notification CEI is sent to the client. Furthermore, the node that received this clock failure notification CEI also sends a clock failure notification CE to nodes further below its own node.
Do ■.

For example, in the case of Figure 4, node #4 has a failure or a failure has occurred in the line between nodes #4 and #7, so node
It is assumed that node #7 is no longer able to receive a normal lock supply from node #4. In this case, node #7 is for node #8.

Further, node #8 sends a clock failure notification CEI to node #10.

In this way, node #7 that recognized the clock failure, and node #8 that received the clock failure notification CEI. #l]
Now, these nodes #7, #8 . #10 is a clock supply request command CMD for those adjacent nodes.
■Create and distribute.

That is, in the case of FIG. 4, node #7 is node #8
, node #8 is node #7. #9° In response to #10, node #10 transmits a clock supply request command CMD■ to node #8.

If the node that receives this clock supply request command CMD■ is not in autonomous clock mode, it issues a clock level information command CMD to the adjacent node, and uses the same algorithm as when starting up the network described above. Generating a clock topology tree (.

On the other hand, if the own node is in the autonomous clock mode, it will ignore the clock supply request command CMD■ even if it receives it, and will therefore ignore the clock level information command CM
D will not be issued.

Through such operations, the clock topology tree is changed from the tree shown in FIG. 3 to the tree shown in FIG. 5. As can be seen from FIG. 5, node #8 was receiving clock supply from node #7 at clock level 3 before the failure occurred.

The clock level is lowered to L5 and the clock is supplied from node #9, the clock level of node #7 is lowered from L3 to L6 and the clock is supplied from node #8, and the clock level of node #10 is lowered to L6. L
5 to L6 and receives clock supply from node #8.

(3) Ability to change clock topology tree upon recovery from line failure or intermediate node failure The method for configuring clock topology of a digital synchronous private network according to the present invention, as shown in FIG. For example, when a failure occurs in the main node #1, the nodes #2 to #4 that have detected the failure will send the main node failure notification MEI to each node #2 to #10 in the network. Once #10 is set to autonomous clock mode, one predetermined backup node, for example #5, becomes the new main node and issues the clock level information command CMD to reconfigure the clock topology tree of the network. It was designed to be constructed.

A failure recovery node or a higher-level node that recognizes line failure recovery transmits a clock level information command CMD to an adjacent node and performs the same operation as when starting up the network. This makes the clock topology tree 3rd
It is returned to its nine original form as shown in the figure.

(4) Reconstruction method of clock topology tree when master node fails When a failure occurs in master node #l, as shown in FIG. 6, nodes #2 to #4 at clock level L2
When it recognizes this master node failure, it notifies all nodes in the network of the master node failure by sequentially sending master node failure notification MHI to lower nodes, and thereby the node that recognized the master node failure and All nodes that have received the master failure notification MHI enter the autonomous clock mode state.

Here, in the network, one node is predetermined to become the next master node as a backup in case of failure of master node #1.

Here we use this backup master node as node #
5.

When this backup master node #5 receives the master node failure notification MEI, it recognizes that it has become the new master node on the network, and changes the clock level of its own node from the previous L3 to the highest Ll. A clock level information command CMD including this clock level L1 is created by changing the clock level L1, and the adjacent node #2.
Send to #3 and #6.

The subsequent operations are the same as those for starting up the network in (1), and as a result, the lock topology tree is rebuilt as shown in FIG.

According to this clock topology tree, tarock is sequentially supplied from backup master node #5 to lower nodes.

[Effects of the Invention] According to the present invention, a clock topology tree for determining a clock supply route is autonomously formed according to the same algorithm when starting up a network or when a node or line fails. As a result, it is possible to quickly respond to the occurrence of a failure and prevent the occurrence of data slips, thereby improving the reliability of the network.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the method of the present invention at the time of network startup. FIG. 2 is a diagram explaining a clock flow table. FIG. 3 is a diagram showing a clock topology tree generated at the time of network startup. FIG. 4 is an explanatory diagram of the method of the present invention when a line or intermediate node failure occurs. FIG. 5 is a diagram showing a clock topology tree generated when a line or intermediate node failure occurs. FIG. 6 is an explanatory diagram of the method of the present invention when a master node failure occurs. FIG. 7 is a diagram showing a clock topology tree generated when a master node failure occurs. FIG. 8 is a diagram showing a conventional digital synchronous private network that receives clock supply from another line. FIG. 9 is a diagram showing a conventional digital synchronous private network based on the slave synchronization method; FIG. 10 is a diagram illustrating a conventional digital synchronous private network that switches to a free-running clock when a node fails. In fig. #1...Master node #2 to #10...Node CMD...Clock level information command CDM■...
・Clock supply request command CEI... Clock failure notification MHI... Master node failure notification Figure 3 Figure 4 Floraft normal log-tree (when intermediate nodes etc. are active) Figure 5 Figure 6 1, -L2-,, L3...L4.1.L5.. 0-- I20: NTT circuit SD line compensation line q' to Florough supply and receiving Loji/Futwarf's Jouhei 1 Figure 8-( Self-sufficiency 70tsu 7 i Self-sufficiency 70tsu 7

Claims (1)

[Claims] 1. A plurality of nodes (#1 to #1) including a main node (#1)
In a digital synchronous private network consisting of 0), the main node (#1) sends a clock level information command (CMD
) and sends it to the adjacent nodes (#2, #3, #4), and the nodes (#2, #3, #4) that receive the clock level information command (CMD) determine that the predetermined conditions are met. When the clock level of the own node is determined to be one lower than the clock level of the received clock level information command, a new clock level information command for the own node is created and sent to the adjacent node, and A clock topology configuration method for a digital synchronous private network, wherein each node generates a clock topology tree by repeatedly determining its own clock level and transmitting the clock level information command upon receiving the clock level information command. 2. Request that each node (#2 to #10) of the network, when transmitting a clock level information command to an adjacent node, do not transmit it to the source node that has transmitted the clock level information command to its own node. Item 1
A clock topology configuration method for a digital synchronous private network as described. 3. When each node (#2 to #10) in the network receives two or more clock level information commands (CMD), each node (#2 to #10)
) is the same or lower than the already determined clock level of its own node, this clock level information command (CMD) is ignored, and when it is a higher clock level, one of them is sent according to the predetermined priority. 3. A clock topology configuration method for a digital synchronous private network according to claim 1 or 2, wherein the clock topology tree is generated with selection of a clock level information command (CMD) as a predetermined condition. 4. When each node (#2 to #10) in the network receives a clock level information command (CMD) from a node with a higher clock level, it sends an acceptance response (ACK) to the higher node to accept the clock supply. 4. A clock topology configuration of a digital synchronous private network according to any one of claims 1 to 3, wherein a rejection response (NACK) for refusing clock supply is sent back to a node having the same or lower clock level. Method. 5. When each node (#2 to #10) in the network detects a failure in the clock supply from an upper node on the clock topology tree, it sends a clock failure notification (CEA) to the lower nodes on the clock topology tree.
and send clock failure notification (CEA) to the node that detected the failure.
The receiving node sets its own node to autonomous clock mode and issues a clock supply request command (CMD(S)).
A node in non-autonomous clock mode that receives this clock supply request command sends a clock level information command (C
MD) is created and transmitted to an adjacent node, thereby changing the clock topology tree.
4. The clock topology configuration method for a digital synchronous private network according to any one of 4. 6. When a failure occurs in the main node, each node is temporarily set to autonomous clock mode by sending a main node failure notification to each node in the network, and one predetermined backup node is set up as a new node. 5. The clock topology configuration method for a digitally synchronous private network according to claim 1, wherein the clock topology tree of the network is reconfigured by acting as a main node and issuing a clock level information command.