JPH03190481A - Conversion method for video signal - Google Patents

Abstract

PURPOSE:To obtain a video signal without excess and deficiency in the case of conversion from EDTV into HDTV by storing a video signal into two memories alternately for each frame, reading the signal in the unit of fields, applying interlace scanning, outputting same pattern of just preceding period repetitively and supplementing the field. CONSTITUTION:An EDTV clear vision video signal is stored alternately for each frame in two field memories, 525 lines by a 1st field are contained in 562.5 lines being each other lines of HDTV high vision lines 1125, the same 525 line data are contained again in the remaining 562.5 lines being each other line and one picture is displayed by interlacing. In this case, since the field frequency of EDTV is 59.94Hz, while the HDTV is 60.00Hz, the relation of 59.94:60:00=999:1000 and the 999-th field data of EDTV is used again for 1000-th data in order to compensate the deficiency of one field for each field. Thus, the conversion into the video signal without deficiency and excess is attained.

Description

[Detailed Description of the Invention] "Industrial Application Field" The present invention applies to EDTV (clear visibility) video signals,
The present invention relates to a method of converting a video signal to an HDTV (high-definition) video signal.

"Prior Art" Generally, in EDTV, the scanning frequency is doubled and non-interlaced is performed to improve the image quality of the NTSC system. Specifically, this EDTV video signal has 525 scanning lines, non-interlace scanning, and a field frequency of 5.
9.94 [Hzl], aspect ratio 4:3. In contrast, HDTV video signals have 1125 scanning lines and are interlaced.

The field frequency is 60.00 Hzl, and the aspect ratio is 16:9.

[Problems to be Solved by the Invention] It is desired that EDTV video signals can also be received by HDTV video equipment.

However, as mentioned above, there are differences in the number of scanning lines, non-interlaced and interlaced, field frequencies, and aspect ratios between HDTV and HDTV. It was not possible to use it.

Especially, due to the difference in field frequency, HDTV
Between the fields, EDT V is 999 fields (
(The frame is also the same), and there is not enough screen space for one field.

An object of the present invention is to provide a conversion method for obtaining a video signal with no excess or deficiency when converting a video signal from EDTV to HDTV.

"Means for Solving the Problems" The present invention provides a method for converting a 525-line non-interlaced scanning video signal of EDTV into a 1125-line interlaced scanning video signal of HDTV. The same data in the first and second field memories is stored in the memory alternately frame by frame.
This conversion method performs interlace scanning by reading field by field in synchronization with the vertical synchronization signal of V, and supplements the shortage of field screens due to differences in field frequencies by repeatedly outputting the same previous screen. .

``Operation'' EDTV video signals are stored alternately frame by frame in two field memories, and the first 525 signals of one field are stored in every other 562.5 of the 1125 signals of HDTV.
The remaining 1 line contains the same 525 lines of data.
The images are again placed within 562.5 lines and displayed as one image by interlacing.

In this case, the field frequency is 59°947 for EDTV and 60.0 Hz for HDTV, so 59.94:60.0O=999:1000, and the shortfall of 1 field for every 1000 fields is 999th field data of EDTV to 1000
Will use again for the second time.

"Example" Hereinafter, one embodiment of the present invention will be described based on the drawings.

In Figure 1, EDTV video signal (Y) (R-Y)
(B-Y) is converted into R, G, and B signals by the inverse matrix circuit (1), and then sent to the first and second field memories (2a
) (2b) are stored in each RGB memory. The outputs of the first and second field memories (2a) and (2b) are converted into analog signals by the D/A conversion circuit (3) and converted into HD signals.
Sent to the TV's CRT (4). (5) is a deflection circuit.

Next, the EDTV field frequency 59.94Hz pulse as shown in FIG. Pulses that are alternately inverted are obtained, which are input to the first D-FF (D-type flip-flop) circuit (8a). In addition, the second D-FF circuit (8b) includes an HDTV
Vertical synchronization signal (V) and horizontal synchronization signal (H) are input, and the field frequency of HDTV is 60.00Hz on the output side.
A pulse is obtained, which is transmitted to the first D-FF circuit (8
a) as a clock.

Then, as shown in (d), the Q output of this first D-FF circuit (8a) is alternately inverted every 60 & up to 999 times, and only the 1000th time is not inverted and is the same as the 999th time. From the 1001st time onwards, a pulse that is an inversion of the previous one is obtained. Furthermore, an output that is completely inverted from the Q output is obtained as the Q output.

From the above, the EDTV video signal has data in the first field memory (2a) of 1.3.5...999.
The data in the second field memory (2b) is read out during each field of 2.4.6...998, and the data is read out during each field of 2.4.
The image will be

Here, the field frequencies are 59.94Hz and 60.0Hz.
Since this is different from 0 Hz, when there are 1000 fields of HDTV, the data of 999 fields of EDTV are read out again to form an image, as shown in FIG.

When the above 1000 fields are displayed, the fourth field is displayed.
As shown in the second half of figure (d), the second field memory (2
b) odd field with 1.3.5...999 and 10
00 field, and the first field memory (2a) is read out when the first field memory (2a) is an even field of 2, 4.6, . . . 998. Thereafter, the odd and even fields are read out alternately in the same manner, and the 999 and 1000 fields are read out twice only in the odd field.

Next, when the clock of EDTV is 28.6 MHz, the number of samples per horizontal line is 910, whereas in HDTV, the number of samples is 1320 when the clock is 44.55 MHz. Therefore, EDTV Nori Oy '728
．． By frequency converting 6 MHz to HDTV (7) 44.55 MHz, 910 samples of one horizontal line of EDTV are used as effective pixels, and the remaining 410 samples are used as a blanking period. To do this, as shown in Figure 6, it is necessary to start with the vertical synchronization signal (V) and
A counter (9) counts the 44.55 MHz clock and outputs a value from 1 to 910. And the next V
Start the counter (9) again with the signal and count from 1 to 910.
output up to. In addition, in order to distribute the blanking area (B) shown in Fig. 3 to the left and right, a shift register (10) is inserted to delay the start signal of the counter (9) by, for example, 205 samples as shown in Fig. 7. do. Then, as shown in FIG. 8, blanking areas (B, ) (B, ) are distributed to the left and right.

In addition, when displaying the blanking area (B) (B, 0B2) in a specific color, for example, in blue, the counter (9)
If an inverter (11) and a color generating circuit (12) such as blue are interposed between the CRT (4) and the CRT (4), the area (B )(B, )(B2) can have an appropriate background color. Note that the inverter (11) can be omitted.

"Effects of the Invention" Since the present invention employs the conversion method as described above, it is possible to use an EDTV non-interlace scan video signal as a DTV interlace scan video signal.In particular, the difference in field frequency is :1000, so 99
By reusing the 9th data as the 1000th field data, it is possible to convert it into a video signal with no excess or deficiency.

[Brief explanation of drawings]

Fig. 1 is a circuit block diagram for realizing the video signal conversion method according to the present invention, Fig. 2 is an explanatory diagram of non-interlace scanning of EDTV, Fig. 3 is an explanatory diagram of interlaced scanning of HDTV, Figure 4 is a waveform diagram, Figure 5 is HDTV and E
An explanatory diagram of the DTV field, Fig. 6 is a circuit block diagram for moving images, Fig. 7 is a waveform diagram, and Fig. 8 is a CR
It is an explanatory diagram of an image on T. (1)... Inverse matrix circuit, (2a) (2b)
...First. Second field memory, (3)...D/
A conversion circuit, (4)...CRT, (5)...deflection circuit, (6)...input terminal, (7)...inversion circuit,
(8a)...first D-FF (D-type flip-flop) circuit, (8b)...second D-FF circuit, (9)...
... Counter, (10) ... Shift register, (1
1)...Inverter, (12)...Color generation circuit.

Claims (1)

[Claims] (1) When converting a 525-line non-interlaced scanning video signal of EDTV to 1125-line interlaced scanning of HDTV, the video signal is alternately stored in first and second field memories for each frame, The first of these,
The same data in the second field memory is read out field by field in synchronization with the vertical synchronization signal of the HDTV, and interlace scanning is performed, and when the field screen is insufficient due to a difference in field frequency, the immediately previous same screen is repeatedly output. A method for converting a video signal, characterized in that the video signal is supplemented by: