JPH03160730A - Manufacture of thin film transistor - Google Patents

Abstract

PURPOSE:To enable the patterning of source and drain electrodes and n-type semiconductor layer under them by forming a photoresist layer on a channel region of an i-type semiconductor layer, and then patterning a deposited n-type semiconductor layer and a metal film for source and drain electrodes and the i-type semiconductor layer, and then peeling the photoresist layer. CONSTITUTION:A photoresist is applied on an i-type semiconductor layer 14, and this photoresist layer 15 is subjected to exposure and development treatment and then the photoresist on the part other than the channel region of the i-type semiconductor layer 14 is removed. Then, an n-type semiconductor layer 16 and a metal film 17 for source and drain electrodes are successively deposited, and this metal film 17 and the n-type semiconductor layer 16 and the i-type semiconductor layer 14 are patterned in the form of a transistor element, and then the photoresist layer 15 is peeled. The n-type semiconductor layer 16 and the metal film 17 for source and drain electrodes on the photoresist layer 15 are removed together with the photoresist layer 15. Thus, the source and drain electrodes 17a, 17b and the n-type semiconductor layer 16 under them can be patterned without damaging the channel region of the i-type semiconductor layer 14.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a thin film transistor.

[Conventional technology]

There is a type of thin film transistor called an inverted stagger type. In this inverted staggered thin film transistor, a gate electrode is formed on a substrate, an i-type semiconductor layer is formed on this gate electrode via a gate insulating film, and an n-type semiconductor layer is formed on both sides of this i-type semiconductor layer. It has a structure in which source and drain electrodes are formed via a type semiconductor layer.

By the way, the above-mentioned inverted stagger type thin film transistor is produced by laminating a gate electrode, a gate insulating film, and an i-type semiconductor layer on a substrate, and then sequentially depositing an n-type semiconductor layer and metal films for source and drain electrodes thereon. , the metal film and the n-type semiconductor layer are patterned into the shape of the source and drain electrodes, but in this case, following the patterning of the metal film for the source and drain electrodes, the n-type semiconductor layer is , when patterning into the shape of the drain electrode, the surface of the channel region of the i-type semiconductor layer is also etched and damaged.

For this reason, conventionally, a blocking insulating film is provided on the channel region of the i-type semiconductor layer to prevent etching of the i-type semiconductor layer, thereby damaging the i-type semiconductor layer during patterning of the n-type semiconductor layer. A method of manufacturing a thin film transistor that prevents the irradiation from occurring has been considered.

FIG. 5 shows a method of manufacturing the above-mentioned thin film transistor, and here, a method of manufacturing a thin film transistor for selecting a pixel electrode formed in a TPT panel of a TPT active matrix type liquid crystal display element is shown.

To explain the manufacturing method of this thin film transistor, first,
As shown in FIG. 5(a), a gate electrode 2 made of chromium or the like is placed on a substrate 1 made of glass or the like.
A gate line 2L (see FIG. 6) is formed to which the gate lines are connected.

Next, as shown in FIG. 5(b), silicon nitride (SiN) or silicon oxide (SiO2) is deposited on the substrate 1.
A gate insulating film 3 made of I-type amorphous silicon (ia-Sj) and an i-type semiconductor layer 4 made of i-type amorphous silicon (ia-Sj) are sequentially deposited, and then a blocking insulating film is formed on the channel region of the i-type semiconductor layer 4. A film 5 is formed. This blocking insulating film 5 is made of silicon nitride (
An insulating film made of silicon oxide (SIN) or silicon oxide (Sl02) is deposited, and a resist mask (not shown) covering the channel region of the i-type semiconductor layer 4 is formed thereon to cover the channel region of the insulating film. It is formed by etching away parts other than the upper part.

Next, as shown in FIG. 5(c), the i-type semiconductor layer 4
On top of that, n-type amorphous silicon (n''-a-Si)
An n-type semiconductor layer 6 made of chromium or the like, and a metal film 7 for source and drain electrodes made of chromium or the like are sequentially deposited.

After this, as shown in FIG. 5(d), the metal film 7 for source and drain electrodes is patterned.
A data line 7bL (see FIG. 6) is formed in which the source electrode 7a and drain electrode 7b are connected to each other, and then the n-type semiconductor layer 6 is patterned into the shape of the source and drain electrodes 7a and 7b. At the same time, the i-type semiconductor layer 4 is patterned into the shape of a transistor element to complete a thin film transistor.

FIG. 6 is a plan view of the completed thin film transistor.

In addition, in FIG. 5(d) and FIG. 6, 8 is a pixel electrode made of a transparent conductive film such as ITO formed on the gate insulating film 3 (transparent film), and this pixel electrode 8 is
It is connected to the source electrode 7a of the thin film transistor by forming its end portion overlapping the source electrode 7a of the thin film transistor.

According to the above manufacturing method, since the blocking insulating film 5 is formed on the channel region of the i-type semiconductor layer 4, the n-type semiconductor layer 6 can be used as a source. When patterning into the shape of the drain electrodes 7a, 7b, the surface of the channel region of the i-type semiconductor layer 4 is not etched and damaged.

[Problem to be solved by the invention]

However, in the above conventional manufacturing method, the blocking insulating film 5 provided on the channel region of the i-type semiconductor layer 4
Since the blocking insulating film 5 is formed of silicon nitride or silicon oxide, there is a problem in that defects such as via holes are generated in the i-type semiconductor layer 4 and the gate insulating film 3 thereunder when forming the blocking insulating film 5.

This is because the blocking insulating film 5 is the i-type semiconductor layer 4.
This is because silicon nitride or silicon oxide is deposited on top of the silicon nitride or silicon oxide, and this deposited film is etched away leaving a portion above the channel region of the i-type semiconductor layer 4. Since the deposited film is etched by wet etching using a mixed solution of ammonium fluoride and hydrofluoric acid as an etching solution, the blocking insulating film 5 may have an i-type structure made of amorphous silicon or the like underneath. The semiconductor layer 4 is eroded by the etching solution to generate defects such as pinholes, and the gate insulating film 3 made of silicon nitride or silicon oxide under the i-type semiconductor layer 4 is also eroded by the etchant. Defects such as pinholes occur.

When a defect such as a pinhole occurs in the i-type semiconductor layer 4 and the gate insulating film 3, the gate electrode 2 and the source electrode 7a or the drain electrode 7b may
A short circuit occurs at the defective portion of the type semiconductor layer 4 and the gate insulating film 3, and the gate line 2L and data line 7bL
However, a short circuit occurs at a defective portion of the gate insulating film 3 between the intersections.

Therefore, in the conventional manufacturing method of forming the blocking insulating film 5 on the channel region of the i-type semiconductor layer 4 as described above, damage to the channel region of the i-type semiconductor layer 4 can be prevented, but on the other hand, There has been a problem in that short-circuit defects occur in manufactured thin film transistors, resulting in poor manufacturing yields of thin film transistors.

Moreover, the thin film transistor to be manufactured by the above conventional manufacturing method, as shown in FIGS. 5(d) and 6,
Source, drain electrodes 7a, 7b and n-type semiconductor layer 4
Since the side edge of the transistor on the side of the channel region overlaps the blocking insulating film 5, there is a problem in that the on-current of the transistor becomes extremely small.

This means that both sides of the blocking insulating film 5 are the source. This is because the n-type conductor layer 6 under the drain electrodes 7a, 7b is interposed between the i-type semiconductor layer 4, and therefore the channel length becomes long and the The on-current flowing between the source and drain electrodes 7a and 7b becomes smaller.

Incidentally, if the blocking insulating film 5 has a size such that its side edges coincide with the side edges of the source and drain electrodes 7a, 7b and the n-type semiconductor layer 6, the n-type semiconductor layer 6 and the i-type semiconductor layer 4 are The blocking insulating film 5 is not interposed between them, and therefore the channel length can be shortened. There is a limit to the alignment accuracy of the exposure mask used in this process, and if the exposure mask is misaligned even slightly, one of the source and drain electrodes 7a and 7b patterned in the step shown in FIG. A gap is created between the blocking insulating film 5 and the next n-type semiconductor layer 6.
During etching, the i-type semiconductor layer 4 in the gap portion is damaged. Therefore, in order to reliably prevent the i-type semiconductor layer 4 from being damaged, the blocking insulating film 5 must be formed to a certain extent in size in consideration of the alignment error of the exposure mask. For this reason,
In the conventional manufacturing method described above, the source and drain electrodes 7a,
7b and the n-type semiconductor layer 6 overlapping the blocking insulating film 5 is unavoidable.

The present invention has been made in view of the above-mentioned circumstances, and its purpose is to remove the source and drain electrodes and the n-type semiconductor layer thereunder without damaging the channel region of the iW semiconductor layer. It can be patterned without causing defects such as pinholes in the i-type semiconductor layer and gate insulating film, and there is no short circuit between the gate electrode and the source and drain electrodes, and between the gate and data lines. Thin film transistors can be manufactured with high yield, and the length of the channel formed at the interface between the n-type semiconductor layer and the i-type semiconductor layer under the source and drain electrodes can be shortened to increase the on-current. An object of the present invention is to provide a method for manufacturing a thin film transistor.

[Means to solve the problem]

In the method for manufacturing a thin film transistor of the present invention, a gate electrode is formed on a substrate, a gate insulating film and an i-type semiconductor layer are sequentially deposited on the substrate, and then a photoresist is applied on the i-type semiconductor layer. At the same time, this photoresist layer is exposed and developed to remove the photoresist in a portion other than the channel region of the i-type semiconductor layer, and then an n-type semiconductor layer and metal films for source and drain electrodes are sequentially deposited. After patterning this metal film, the n-type semiconductor layer, and the i-type semiconductor layer into the shape of a transistor element, the photoresist layer is peeled off, and the photoresist layer, the n-type semiconductor layer thereon, and the source and drain electrodes are removed. This method is characterized by removing the metal film.

[Effect]

That is, the method for manufacturing a thin film transistor of the present invention forms a photoresist layer on the channel region of the J-type semiconductor layer instead of forming a blocking insulating film on the channel region of the I-type semiconductor layer as in the conventional method. The n-type semiconductor layer and the source, drain and f
After patterning the metal film for the n-electrode and the i-type semiconductor layer into the shape of a transistor element, the photoresist layer is peeled off to separate the n-type semiconductor dot on the photoresist layer and the source. The gold Jfi film for the drain electrode is removed by a lift-off method, and the metal film for the source and drain electrodes and the n-type semiconductor layer thereunder are patterned into the shape of the source and drain electrodes. .

According to this manufacturing method, the metal films for source and drain electrodes and the portions of the n-type semiconductor layer above the channel region are removed by the above-mentioned lift-off method, without damaging the channel region of the i-type semiconductor layer. Source 9 The drain electrode and the n-type semiconductor layer thereunder can be patterned.

Moreover, in this manufacturing method, a photoresist layer is formed on the channel region of the i-type semiconductor layer instead of the blocking insulating film, and this photoresist layer is prepared using a developer that does not corrode the i-type semiconductor layer or the gate insulating film. Because the photoresist layer can be developed at 300 kHz, defects such as bottle holes will not be generated in the i-type semiconductor layer and the gate insulating film during development of the photoresist layer. Thin film transistors without short circuits between data lines can be manufactured with high yield. Furthermore, in this manufacturing method, the photoresist layer formed on the channel region of the l-type semiconductor layer is peeled off, and the
Since the type semiconductor layer and the metal films for source and drain electrodes are removed by lift-off, no insulating layer (photoresist layer) remains between the n-type semiconductor layer and the i-type semiconductor layer, and the upper Since the He n-type semiconductor layer is lifted off and removed in the same pattern as the photoresist layer, this n-type semiconductor layer can be left in the entire area of the i-type semiconductor layer except for the channel region. Therefore, according to this manufacturing method, the length of the channel formed at the interface between the n-type conductor layer and the i-type semiconductor layer under the source and drain electrodes is shortened.
A large on-current can be obtained. Moreover, since this manufacturing method does not involve forming a blocking insulating film on the channel region of the i-type semiconductor layer, the insulating film that will become the blocking insulating film is deposited and etched as in the conventional manufacturing method. There is no need, therefore
Thin film transistors can be manufactured with fewer steps than conventional manufacturing methods.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 1 to 4, taking as an example the manufacture of a thin film transistor formed in a TPT panel of a TPT active matrix type liquid crystal display element.

First, as shown in FIG. 1(a), a metal film such as chromium is deposited on a substrate 11 made of glass or the like, and this metal film is patterned by photo-etching. A gate line 12L connected to the electrode 12 is formed.

Next, as shown in FIGS. 1(b) and 2, a gate insulating film 13 made of silicon nitride (SiN) or silicon oxide (S102) and type 1 amorphous silicon (i -a-31) etc. are sequentially deposited on the channel region of the i-type semiconductor layer 14, and then the i-type semiconductor layer 14 is deposited on the channel region of the i-type semiconductor layer 14 with the same width as the channel region and slightly wider than the width of the source and drain electrodes. A photoresist layer 15 having a large length is formed. This photoresist layer 15 is formed by coating a photoresist on the i-type semiconductor layer 14, drying it, exposing the photoresist layer to light, and then developing the photoresist layer to form a layer other than the channel region of the i-type semiconductor layer 14. It is formed by removing the photoresist in the area. In this case, the photoresist layer may be developed using an alkaline solution or an acid solution. Since the gate insulating layer H13 is not eroded, defects such as via holes are not generated in the l-type semiconductor layer 14 and the gate insulating film 13 during the formation of the photoresist layer 15.

Next, as shown in FIG. 1(c), on the photoresist layer 15 and the i-type semiconductor layer 14, an n-type layer made of n-type amorphous silicon (n''-a-Sl) or the like is coated.
A conductor layer 16 and a metal film 17 for source and drain electrodes made of chromium or the like are sequentially deposited.

Next, as shown in FIG. 1(d) and FIG. 3, the upper metal film 17 for source and drain electrodes and the n-type semiconductor 1ω1
6 and the i-type semiconductor layer 14 are etched to form a transistor element shape and a data line 17bL.
Butter it into the shape and add the sauce. Both ends of the photoresist layer 15, which is formed to be slightly longer than the width of the drain electrode, are exposed, and at the same time, the source layer on the photoresist layer 15 is exposed. Metal film for drain electrode 1
7 and the n-type semiconductor layer 16 are removed by etching to a width smaller than the width of the photoresist layer 15, and this metal film 17 for source and drain electrodes and the n-type semiconductor layer 16 thereunder are removed by etching.
Temporary separation is performed in the channel region of the i-type semiconductor layer 14. In this way, the metal film 17 for source and drain electrodes and the n-type semiconductor layer 16 are temporarily separated on the photoresist layer 15 because the photoresist layer 15 is used in the next step.
This is to facilitate the peeling of No. 5.

After this, as shown in FIG. 1(e) and FIG. 4, the photoresist layer 15 is peeled off using an alkaline developer, and together with this photoresist layer 15, the n-type semiconductor layer thereon is removed. 16 and metal film 17 for source and drain electrodes
The metal film 17 for source and drain electrodes and the n-type semiconductor layer 16 are patterned into the shapes of a source electrode 17a and a drain electrode 17b to complete a thin film transistor. In this case, the photoresist layer 15 is applied not only from both ends exposed on both sides of the metal film 17 for source and drain electrodes, but also from the temporary separation of the metal film 17 for source and drain electrodes and the n-type semiconductor layer 16. Since the exposed upper surface is also melted, the photoresist layer 15 can be peeled off in a short time.

Note that in FIG. 1(e) and FIG. 4, 18 indicates the gate insulating film 13 after forming the thin film transistor.
This pixel electrode is made of a transparent conductive film such as ITO formed on a transparent film, and this pixel electrode l8 is formed by overlapping the end portion on the source electrode 17a of the thin film transistor. 17a.

That is, in the manufacturing method of the thin film transistor of this embodiment, instead of forming a blocking insulating film on the channel region of the i-type semiconductor layer as in the conventional method,
A photoresist layer 15 is formed on the channel region of No. 4, and then the deposited n-type semiconductor layer 16, metal film 17 for source and drain electrodes, and the i-type semiconductor layer 14 are patterned into the shape of a transistor element. After that,
By peeling off the photoresist layer 15, the n-type semiconductor layer 16 and the metal film 17 for source and drain electrodes on the photoresist layer 15 are removed by a lift-off method, and the metal film 17 for source and drain electrodes is removed by the lift-off method. The n-type semiconductor layer 16 underneath is patterned into the shapes of source and drain electrodes 17a and 17b.

According to this manufacturing method, the portions of the metal film 17 for source and drain electrodes and the n-type semiconductor layer 16 above the channel region are removed by the lift-off method described above.
The source and drain electrodes 17a, 17b and the n-type semiconductor layer 16 thereunder can be patterned without damaging the channel region of the type semiconductor layer 14.

Moreover, in this manufacturing method, a photoresist layer 15 is formed on the channel region of the i-type semiconductor layer 14 instead of a blocking insulating film, and this photoresist layer 15 is formed on the channel region of the i-type semiconductor layer 14.
Since the photoresist layer 5 can be developed under conditions that do not corrode the i-type semiconductor layer 14 or the gate insulating film 13, the photoresist layer 1
During the development of 5, the i-type semiconductor layer l4 and the gate insulation yA1
3 will not cause defects such as pinholes,
Gate electrode 12 and source and drain electrodes 17a and 17b
and gate, data line 12L. 17bL
Thin film transistors without short circuits can be manufactured with high yield.

Furthermore, in this Tsujikata note, the photoresist layer 15 formed on the channel region of the i-type semiconductor layer 14 is peeled off, and the n-type semiconductor layer 16 and the metal film 17 for source and drain electrodes thereon are removed. Since it is removed by the lift-off method, no insulating layer (photoresist layer 15) remains between the n-type semiconductor layer 16 and the molded semiconductor layer 14, and the n-type semiconductor layer 16 is separated from the photoresist layer 14. Since the n-type semiconductor layer 16 is lifted off and removed in the same pattern as the layer 15, the n-type semiconductor layer 16 can be left in the entire area of the i-type semiconductor layer 14 except for the channel region. Therefore, according to this manufacturing method, the n-type semiconductor layer 16 under the source and drain electrodes 17a and 17b
By shortening the length of the channel formed at the interface between the i-type semiconductor layer 14 and the i-type semiconductor layer 14, on-current can be increased.

Moreover, since this manufacturing method does not involve forming a blocking insulating film on the channel region of the L-type semiconductor layer 14, unlike conventional manufacturing methods, the process of depositing an insulating film that will become a blocking insulating film and etching it is not necessary. Therefore, thin film transistors can be manufactured with fewer steps than conventional manufacturing methods.

In the above embodiment, in order to facilitate the peeling of the photoresist layer 15, when patterning the metal film 17 for source and drain electrodes, the n-type semiconductor layer 16, and the i-type semiconductor layer 14 into the shape of a transistor element, Source on photoresist layer 15. Although the drain electrode metal film 17 and the n-type semiconductor layer 16 are temporarily separated, this photoresist j
Since φ15 can be sufficiently peeled off simply by melting from both ends thereof, it is not necessarily necessary to temporarily separate the source/drain electrode metal film 17 and the n-type semiconductor layer 16.

Further, in the above-described large-scale embodiment, the manufacturing of thin film transistors formed in a TPT panel of a TPT active matrix liquid crystal display element has been described, but the present invention is also applicable to the manufacturing of thin film transistors used for various purposes such as thin film transistors for memory, etc. Of course, it can be widely applied to

〔Effect of the invention〕

According to the method for manufacturing a thin film transistor of the present invention, it is possible to pattern the source and drain electrodes and the n-type semiconductor layer thereunder without damaging the channel region of the i-type semiconductor layer. It is possible to manufacture thin film transistors with a high yield without causing short-circuits between the gate electrode and the source and drain electrodes, and between the gate and data lines, by preventing the occurrence of bin hole defects 9 in the gate insulating film. The length of the channel formed by the field curve between the n-type semiconductor layer and the i-type semiconductor layer under the drain electrode can also be shortened to increase the on-current. Moreover, since the manufacturing method of the present invention does not involve forming a blocking insulating film on the channel region of the l-type semiconductor layer, unlike the conventional manufacturing method, deposition and etching of the insulating film to become the blocking insulating film are not required. Therefore, thin film transistors can be manufactured with fewer steps than in conventional manufacturing methods.

[Brief explanation of the drawing]

1 to 4 show an embodiment of the present invention, in which FIG. 1 is a manufacturing process diagram of a thin film transistor, FIG. 2 is a plan view of FIG. 1(b), and FIG. Plan view of figure (d), 4th
The figure is a plan view of FIG. 1(e). FIG. 5 is a manufacturing process diagram showing a conventional thin film transistor manufacturing method, and FIG. 6 is a plan view of FIG. 5(d). 11...Substrate, 12...Gate electrode, 12L...
Gate line, 13... Gate insulating film, 14...i
type semiconductor layer, 15... photoresist layer, 16...
n-type semiconductor layer, 17... Metal film for source and drain electrodes, 17a... Source electrode, 17b... Drain electrode, 17 b L... Attaline, 18... Pixel electrode.

Claims (1)

[Claims] After forming a gate electrode on a substrate and sequentially depositing a gate insulating film and an i-type semiconductor layer on this substrate, coating a photoresist on the i-type semiconductor layer and exposing this photoresist layer, The photoresist on the i-type semiconductor layer other than the channel region is removed by development, and then an n-type semiconductor layer and a metal film for source and drain electrodes are sequentially deposited to form this metal film and the n-type semiconductor layer. and after patterning the i-type semiconductor layer into the shape of a transistor element, the photoresist layer is peeled off to remove the photoresist layer, the n-type semiconductor layer thereon, and the metal film for source and drain electrodes. A method for manufacturing a thin film transistor.