JPH03167966A - Clamp method for muse signal - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Table of contents] Overview Industrial field of application Prior art (Fig. 6 and Fig. 7) Problem to be solved by the invention (Fig. 8) Means for solving the problem (Fig. 8) Figure 1) Functional example (Figure 2) (i) Description of the first embodiment (Figure 3 and Figure 4) (ii)
Explanation of the second embodiment (Fig. 5) Effects of the invention [Summary] MUSE signal clamping method. Especially MUSE (Mult)
iple subnyquist sampling
Regarding the clamping method when DC-reproducing a composite video signal of the MUSE signal, the clamp position is not set at sample number 6 related to the horizontal synchronization signal of the MUSE signal, but the clamp position is set between the MUSE signal and the clamp pulse signal. Even if a deviation occurs, the aim is to make the clamp level uniform and perform accurate DC reproduction.The frame pulse is detected from the MUSE signal, and the frame pulse is delayed to produce a clamp pulse. , said M.U.
The clamp level of the MUSE signal is fixed by the clamp pulse during a horizontal synchronization period other than the rising or falling portion of the horizontal synchronization signal of the SE signal. [Industrial Application Field] The present invention relates to a method for clamping MUSE signals, and more specifically, the present invention relates to a method for clamping MUSE signals.
subnyquist Sa＋＊pling enco
This article relates to a clamping method for direct current reproduction of a composite video signal using the ding method. In recent years, the number of scanning lines is 1125 and the field frequency is 60 (
Hz), red (R). Blue (B), green CG) signal bands 2
A high-visibility (high-definition television) system has been developed that reproduces video signals using the MUSE method, which uses 0 (MHz) as a high-visual signal and compresses the signal to a signal with a baseband band of approximately 8 (MHz). According to this, there is a need for a clamping method that can perform accurate DC reproduction even if the video signal of the MUSE transmission method and the clamp pulse signal are slightly different from each other. [Prior Art] FIGS. 6 to 8 are explanatory diagrams related to a conventional example.

FIG. 6 shows a configuration diagram related to a conventional MUSE signal clamping method.

In the figure, the clamp circuit for the MUSE signal has a coupling capacitance C. DC regeneration circuit 1, A/D conversion circuit 2. It consists of a frame pulse detection circuit 5. In the clamping operation, first, a MUSE signal DIN corresponding to an NTSC composite video signal is input to the A/D conversion circuit 2 via a coupling capacitor C. Next, the frame pulse detection circuit 3 inspects the frame pulse signal FPS, which is the reference for the MUSE method, and uses this frame pulse signal as a reference to detect the 480-decimal counter 4.
The sample clock is counted, and the clamp pulse signal CPS is generated after 480+6 clocks via the 6-clock delay circuit 5. This clamp pulse signal CPS becomes a switch control signal for the switching element 10, and becomes a signal for direct current regeneration of the MUSE signal DIH lost due to the coupling capacitance C.

As a result, when the switching element 6 is turned ON by the clamp pulse signal CPS, the DC voltage E of the reference power supply 5 is applied to the input point of the A/D conversion circuit 2, and the MUSE
The clamp level CL of the horizontal synchronization signal HS of the signal DIH can be fixed to CL-128/256. FIGS. 7(a) and 7(b) are explanatory diagrams of the conventional method of clamping the MUSE signal. FIG. It shows the state in which In the same figure (a), the microclamp level CLI is 0 to 25.
The 6-gradation horizontal synchronization signal HS is sampled (4 8 0 + 6 clocks) according to the standard (128/256),
This is the clamp level when DC reproduction is performed, and the clamp pulse signal CPS matches the 128th gradation of the rising portion of the horizontal synchronizing signal 1{S. Figure (b) shows a state in which the rising portion of the horizontal synchronizing signal HS on even lines is clamped and DC reproduction is performed. In the same figure (b), CL2 uses the horizontal synchronization signal HS according to the standard (12B/2 5 6
) is sampled (480 + 6 clocks) and DC reproduction is performed, and the clamp pulse signal CPS is one level below the 128th gradation of the falling part of the horizontal synchronization signal HS. ．． [Problem to be solved by the invention] Figure 8 (a). (b) is an explanatory diagram related to the problems of the conventional clamping method, and (a) of the same figure shows that a clamp position shift occurs between the clamp pulse signal CPS and the MUSE signal DIN related to odd-numbered lines. Indicates the condition.

In FIG. 4A, A is a clamp position shift, which is caused because the clamp pulse CPS is not clamped in the horizontal synchronization signal HS-1 28 gray level of the MUSE signal DiN. This clamp misalignment is
This occurred despite the fact that the clamp pulse signal CPS was generated during the sampling clock (480 + 6 clocks), and the manufacturing process of the transistors that constitute the 480-decimal counter 3, the 6-clock delay circuit 4, and the switching element 6, such as impurity diffusion. It is thought that this is caused by variations in threshold voltage vth due to differences in impurity concentration of the layers.

Also, the clamp level CL3 at the rising edge of the horizontal synchronization signal HS is 12, unlike the previous clamp level CLI.
It is located at 8<CL3<256 gradations. This is A/
A DC offset is applied to the D-converted MUSE signal, and for example, if a gray line is displayed on the screen of a CRT device, the line will be colored red, which is the cause of colored stripes. It may become.
FIG. 6B shows a state in which a clamp position shift occurs at the rising edge of the horizontal synchronizing signal HS related to an even-numbered line.

At the same time (b), B is a clamp position shift, which occurs because the clamp pulse CPS was wanted to be clamped at the horizontal synchronization signal HS=128 gradation of the MUSE signal DIN. In this case as well, as in Figure (a), due to the clamp level CL4 (0<CL4<128 gradations), gray lines appear as color stripes on the screen of the CRT device, resulting in a screen with very poor image quality. Become.

The present invention was created in view of such conventional problems, and it is possible to clamp between the MUSE signal and the clamp pulse signal without setting the clamp position at sample number 6 related to the horizontal synchronization signal of the MUSE signal. The object of the present invention is to provide a method for clamping a MUSE signal, which makes it possible to make the clamp level uniform and perform accurate DC reproduction even when positional deviation occurs. [Means for Solving the Problems] FIG. 1 shows a principle diagram of the MUSE signal clamping method of the present invention. The clamping method detects a frame pulse from the MUSE signal, delays the frame pulse to generate a clamp pulse, and detects horizontal synchronization signals other than the rising part A or the falling part B of the horizontal synchronizing signal HS of the MUSE signal. llI! The above object is achieved by fixing the clamp level of the MUSE signal by the clamp pulse in the HT between Ill and Ill.

[For production]

According to the present invention, the clamp level of the MUSE signal is fixed within the horizontal synchronization period HT other than the rising portion A or the falling portion B of the horizontal synchronizing signal HS.

For example, odd number lines as shown in Figures 1(a) and (b). In any case of the horizontal synchronizing signal HS related to even-numbered lines, the clamp position is set at the flat portion of sample numbers 2 to 5 and 7 to 11, and DC reproduction is performed.

For this reason, for example, if the clamp position is set to sample number 3, the timing of the clamp pulse generation will be shifted,
To reduce as much as possible the unevenness of the clamp level caused by the clamp position shift when the clamp position is set at sample number 6 as in the past even if the clamp position varies somewhat between sample numbers 4 and 5. becomes possible.

As a result, the clamp level of 128/256 gradations can always be kept consistent, and it is possible to perform accurate DC reproduction processing.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

2 to 5 are diagrams for explaining the MUSE signal clamping method according to the embodiments of the present invention, and FIG. 2 is a diagram illustrating the structure of the MUSE signal clamping method according to each embodiment of the present invention. It shows. In the figure, the clamp circuit for DC regeneration of the MUSE signal of the MUSE transmission method is a coupling capacitor 1c DC regeneration circuit + 1
．． A/D conversion circuit 12.7 frame pulse detection circuit 13.
The 480-decimal counter 143 consists of a clock delay circuit 15, a 9-clock delay circuit 16, a JK-FF circuit 17, and a selection circuit I8.

The coupling capacitor C transmits the high-frequency power of the MUSE signal DIN that receives the sample value to the A/D conversion circuit l1, thereby cutting the DC power of the iMUsE signal DIN. The DC regeneration circuit 11 consists of a switching element 11a and a reference power supply 1lb, and the switching element 11a is controlled by a clamp pulse signal CPS, and the lost DC component at the input point of the A/D conversion circuit 12 is transferred to the MUSE signal DIN. For example, a DC voltage of E-0.5V is applied. The frame pulse detection circuit 13 detects a frame pulse, which is a reference signal of the MUSE transmission method, and outputs a frame pulse signal FPS. The 480-decimal counter 14 counts the frame pulse signal FPS based on the 16.2 MHz reference clock signal Φ. The 3-clock delay circuit 15 receives the frame pulse signal F.
The PS is delayed by 3 clocks and the clamp position is set at sample number 3 of the standardized MUSE signal.
In the embodiment of the present invention, the clamp position is set for either an odd line or an even line among the standardized line numbers 1 to 1125.

The 9-clock delay circuit 16 receives the frame pulse signal FPS.
is delayed by 9 clocks, and the clamp position is set at sample number 9 of the standardized MUSE signal. In the embodiment of the present invention, the clamp position is set for either an odd line or an even line.

The JK-FF (JK type flip-flop) circuit l7 is
It has a function of inputting the frame pulse signal FPS and the output signal of the 480-decimal counter 14, performing JK logic, and outputting an odd/even selection signal SS. The truth table for JK-FF circuit 17 is shown in Table 1. Table 1 The selection circuit 18 selects either the odd line or the even line using the odd/even selection signal SS and outputs a clamp pulse signal to the switching element 11a.

(i) Description of the first embodiment FIG. 3 is an operation flowchart relating to the method of clamping the MUSE signal according to the first embodiment of the present invention. In the figure, first, in step P1, the MUSEti number DI
N is input to the A/D converter 12, and it is A/D converted. At this time, a sample value of a baseband signal of 1125x480 samples per frame is transmitted to the MUSB signal DIN.

The horizontal synchronizing signal HS has gradations of 0 to 255, and is transmitted with line numbers 1 to 1125 alternately inverted for odd lines and even lines. Also, sample numbers 1 to 48
0, the horizontal synchronization signal HS has sample numbers 1 to 1l.
is assigned to.

Further, the frame pulse signal used as the reference signal of the MUSE transmission method is assigned to line numbers 1 and 2, and its sample number is 480. Clamp level 12B/25
The 6th gradation is assigned to line numbers 563 and 1125. Other color signals C, luminance signals Y. Baseband signals for audio signals and control signals are included in the MUSE signal DIN. A/D that inputs these MUSE signals DIN
The conversion circuit 12 outputs a digital MUSE signal DOT. Next, in step P3, clamp pulse generation data corresponding to odd/even lines is held based on the frame pulse signal FPS. At this time, sample numbers l to 480 are counted via the 480-decimal counter 14 operated by the 16.2 MHz reference clock signal Φ. 3. The clock related to that sample number. Or, with a delay of 9 clocks, clamp pulse generation data for clamping odd or even lines of the horizontal synchronizing signal HS is held in each delay circuit 15 and 16. Furthermore, in step P4, odd/even lines are selected. At this time, the JK-FF circuit 17 selects the odd number/
The even selection signal SS is output to select the odd or even line of the horizontal synchronization signal HS. If it is an odd line (YES), the process moves to step P5, and if it is an even line (No), the process moves to step P6. In step P5, sample number 3 of the horizontal synchronizing signal HS is
, a clamp pulse signal CPS is generated. In step P6, a clamp pulse signal CPS is generated at sample number 9 of the horizontal synchronizing signal HS. The generation timing of these clamp pulse signals CPS will be described later with reference to FIGS. 4(a) and 4(b). As a result, in step P7, the switching element 11a of the DC regeneration circuit 11 is set to "○N", and the MUSE signal DI
DC voltage E-0.5 (V) is applied to N. Note that in step P8, the clamp circuit power supply is turned on/off.
Based on OFF, if it is ON (YES), the process returns to step P1 and steps P1 to P7 are repeated. The clamp operation ends in the OFF (NO) state.

Figure 4(a). (b) is a supplementary explanatory diagram of the operation flowchart according to the first embodiment of the present invention, and (a) of the same figure shows the clamp position of the odd line of the horizontal synchronizing signal HS. In the figure, CL is a clamp level, which is the standard clamp level 12B/2 in the MUSE transmission system.
It shows 56 gradations. In the embodiment of the present invention, this clamp level CL corresponds to a potential of 1 (V), and it is assumed that the sync level of the horizontal synchronizing signal HS corresponds to 0.5 (V). Further, in each embodiment of the present invention, the clamp position related to the odd line is determined by the horizontal synchronization signal HS.
Sample number 3 is set for the part other than the rising part of . In this sample number 3, by turning on the switching element 11a of the DC regeneration circuit 11 via the clamp pulse signal CPS, the DC voltage E=0.5
(V) is applied to the MUSE signal DrN.

As a result, even if the clamp pulse signal CPS fluctuates between sample numbers 2 to 4 for some reason, the clamp level CL is always set to 1 2 8/2 5
It is possible to maintain six gradations. Figure (b) shows the clamp positions of even-numbered lines of the horizontal synchronizing signal HS. In the figure, the clamp position for even-numbered lines of the horizontal synchronization signal HS is set to sample number 9. In this sample number 9, the switching element 11a of the DC regeneration circuit 11 is connected to the clamp pulse signal CPS. "
○N'', it is possible to apply the DC voltage E-0.5 (V) to the MUSE signal DIN, similar to the DC reproduction related to the odd-numbered line described above.

As a result, even if it is assumed that the clamp pulse signal CPS fluctuates between sample numbers 8 and 10 for some reason, it is possible to maintain the clamp level CL at 128/256 gradations. (ii) Explanation of the second embodiment FIGS. 5(a) and 5(b) show the MU of the second embodiment of the present invention.
It is an explanatory diagram related to a clamping method of SE signals, and is
) indicates the clamp position of the odd line of the horizontal synchronizing signal HS. In the figure, the difference from the first embodiment is that in the second embodiment, the clamp position of the odd-numbered line is set to sample number 9. That is, in the operation flowchart of FIG. 3, by replacing the sample number 3 in step P5 with 9 and the sample number 9 in step P6 with 3, the MUSE signal DIN is clamped in the same manner as in the first embodiment. I can do it. Therefore, the explanation of the operation of the MUS signal DIN will be omitted. As a result, even if the generation timing of the clamp pulse signal CPS varies somewhat, the clamp level CL can be maintained at 128/256 gradations as in the first embodiment. Figure (b) shows the clamp position of even-numbered lines of the horizontal synchronizing signal HS. In this case as well, as in the first embodiment, the clamp position is set at a portion other than the rising or falling portion of the horizontal synchronizing signal HS, so even if the clamp pulse signal CPS varies slightly, the clamp level 128
/256 gradation can always be kept constant. In this way, according to the first and second embodiments of the present invention, the clamp level of the MUSE signal DIN is set at sample numbers 2 to 5 or 7 to l1 within the horizontal synchronization period HT.
It is fixed on the flat part of. For this reason, when the clamp position is set to sample number 3, for example, the timing at which the clamp pulse signal CPS is generated is due to manufacturing variations in the transistors that make up the 480-decimal counter 14, the clock delay circuit 15, the 9-clock delay circuit, etc. , even if the clamp position varies slightly between sample numbers 4 and 5, the clamp levels CLI and CL2 caused by the clamp position shift when setting the clamp position to sample number 6 in the past This makes it possible to reduce as much instability as possible. As a result, the clamp level CL=128/256 gradations can be kept constant at all times, making it possible to perform accurate DC reproduction processing. [Effects of the Invention] As explained above, according to the present invention, the clamp position is set at a portion other than the rising or falling edge of the horizontal synchronizing signal, so even if the generation timing of the clamp pulse signal is slightly shifted, Even if there is a problem, the clamp level can always be maintained at a constant level. Therefore, it is possible to accurately reproduce the lost MUSE signal of DC precepts, and based on the digital MUSE signal clamped to a certain level, image processing related to odd and even lines in the subsequent stage can be performed with high precision. It becomes possible to do so.

This greatly contributes to the manufacture of high-quality, high-definition television receivers, etc.

[Brief explanation of the drawing]

FIG. 1 is a principle diagram of the MUSE signal clamping method of the present invention. FIG. 2 is a structural diagram of the MUSE signal clamping method of each embodiment of the present invention. FIG. 4 is a supplementary explanatory diagram of the operation flowchart according to the first embodiment of the present invention, and FIG. 5 is a flowchart of the operation according to the method of clamping the MUSE signal of the first embodiment. 6 is a block diagram of a conventional MUSE signal clamping method. FIG. 7 is an explanatory diagram of a conventional MUSE signal clamping method. FIG. 2 is an explanatory diagram related to problems of a conventional clamping method. [Description of symbols l HS...Horizontal synchronization signal, HT...Horizontal synchronization period, A...Rising portion of the horizontal synchronization signal, B...Falling portion of the horizontal synchronization signal.

Claims (1)

[Claims] A frame pulse is detected from the MUSE signal, the frame pulse is delayed to create a clamp pulse, and the MU
The rising portion of the horizontal synchronization signal (HS) of the SE signal (A
) or the horizontal synchronization period other than the falling part (B) (
HT), the clamp pulse causes MUSE
MU characterized by fixing the clamp level of the signal
How to clamp SE signal.