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JPH03105950A - Package of semiconductor integrated circuit - Google Patents

Package of semiconductor integrated circuit

Info

Publication number
JPH03105950A
JPH03105950A JP1244240A JP24424089A JPH03105950A JP H03105950 A JPH03105950 A JP H03105950A JP 1244240 A JP1244240 A JP 1244240A JP 24424089 A JP24424089 A JP 24424089A JP H03105950 A JPH03105950 A JP H03105950A
Authority
JP
Japan
Prior art keywords
sealing glass
cap
package
chip
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1244240A
Other languages
Japanese (ja)
Inventor
Hiroshi Nishimura
浩 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP1244240A priority Critical patent/JPH03105950A/en
Publication of JPH03105950A publication Critical patent/JPH03105950A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/163Connection portion, e.g. seal

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To make a close contact property with a sealing glass good by a method wherein, in a package which hermetically seals a chip, a groove is formed in a cap at an interface between the cap and the sealing glass. CONSTITUTION:A lead frame 3 is pressure-bonded to a base 2 by using a sealing glass 4. A groove 8 is made in a cap 1; the sealing glass 4 is printed. A chip 5 is die-bonded to the base 2 by using a die-bonding material 6. The chip 5 and the lead frame 3 are connected by using bonding wires 7. When above constituents are heat-treated at a high temperature, the sealing glass is softened and bonded. Since the groove 8 is formed in the cap 1 at this time, a bonding area to the sealing glass 4 can be made large, and a close-contact property is increased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体集積回路(以下、チップという)を密
閉するパッケージに関し、特にパッケージを構成するキ
ャップに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a package for sealing a semiconductor integrated circuit (hereinafter referred to as a chip), and particularly to a cap constituting the package.

〔従来の技術〕[Conventional technology]

従来、チップを密閉するパッケージは、ベースとキャッ
プと封止ガラスとリードフレームにより構成され、第2
図に示すようにキャップ1と封止ガラス4の界面は平坦
になっていた。
Conventionally, a package that seals a chip consists of a base, a cap, a sealing glass, and a lead frame.
As shown in the figure, the interface between the cap 1 and the sealing glass 4 was flat.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のパッケージは、封止ガラスを高温で熱処
理することにより軟化させ、ベースとキャップとリード
フレームを接合させるようになっているが、近来のパッ
ケージの小型化,薄型化に伴ない、接合面積が小さくな
り、密着性が悪化するという欠点がある。
In the conventional package described above, the sealing glass is heat-treated at high temperature to soften it, and the base, cap, and lead frame are bonded together. However, as packages have become smaller and thinner in recent years, The disadvantage is that the area becomes smaller and the adhesion deteriorates.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、チップを密閉するパッケージにおいて、キャ
ップと封止ガラスの界面のキャップに溝を設け封止ガラ
スとの密着性を良くしたことを特徴とする。
The present invention is characterized in that, in a package for sealing a chip, a groove is provided in the cap at the interface between the cap and the sealing glass to improve adhesion to the sealing glass.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。第1図
は、本発明の一実施例の縦断面図である。そして第3図
は第1図のキャップのみの縦断面図である。リードフレ
ーム3は、封止ガラス4によりベース2に圧着されてい
る。キャップ1には溝8が設けられており、封止ガラス
4が印刷されている。また、チップ5は、ダイボンディ
ング材6によりベース2にダイボンディングされている
。チップ5とリードフレーム3は、ボンディングワイヤ
ー7によって接続されている。以上の構或要素を高温で
熱処理することにより、封止ガラスが軟化し接合される
Next, the present invention will be explained with reference to the drawings. FIG. 1 is a longitudinal sectional view of an embodiment of the present invention. FIG. 3 is a longitudinal sectional view of only the cap shown in FIG. 1. The lead frame 3 is pressure-bonded to the base 2 with a sealing glass 4. A groove 8 is provided in the cap 1, and a sealing glass 4 is printed on it. Further, the chip 5 is die-bonded to the base 2 using a die-bonding material 6. Chip 5 and lead frame 3 are connected by bonding wire 7. By heat-treating the above structural elements at high temperatures, the sealing glass is softened and bonded.

本実施例では、キャップ1に溝8が設けられているので
封止ガラス4との接合面積を大きくでき密着性が増大す
る。
In this embodiment, since the groove 8 is provided in the cap 1, the bonding area with the sealing glass 4 can be increased and the adhesion can be increased.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、キャップに溝を設けるこ
とにより、小型のパッケージでもキャップと封止ガラス
の接合面積を大きくすることができ、密着性を向上でき
るという効果がある。
As explained above, the present invention has the effect that by providing a groove in the cap, the bonding area between the cap and the sealing glass can be increased even in a small package, and the adhesion can be improved.

ム、4・・・封止ガラス、5・・・チップ、6・・・ダ
イボンディング材、7・・・ボンディングワイヤー 8
・・・清。
4... Sealing glass, 5... Chip, 6... Die bonding material, 7... Bonding wire 8
...Kiyoshi.

Claims (1)

【特許請求の範囲】[Claims] 半導体集積回路を密閉するパッケージにおいて、キャッ
プと封止ガラスの界面のキャップに溝を設け封止ガラス
との密着性を良くしたことを特徴とする半導体集積回路
のパッケージ。
1. A semiconductor integrated circuit package for sealing a semiconductor integrated circuit, characterized in that a groove is provided in the cap at the interface between the cap and the sealing glass to improve adhesion to the sealing glass.
JP1244240A 1989-09-19 1989-09-19 Package of semiconductor integrated circuit Pending JPH03105950A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1244240A JPH03105950A (en) 1989-09-19 1989-09-19 Package of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1244240A JPH03105950A (en) 1989-09-19 1989-09-19 Package of semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPH03105950A true JPH03105950A (en) 1991-05-02

Family

ID=17115823

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1244240A Pending JPH03105950A (en) 1989-09-19 1989-09-19 Package of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH03105950A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05235185A (en) * 1992-02-25 1993-09-10 Nec Corp Ic package
US5889323A (en) * 1996-08-19 1999-03-30 Nec Corporation Semiconductor package and method of manufacturing the same
US6856015B1 (en) * 2003-08-21 2005-02-15 Siliconware Precision Industries Co., Ltd. Semiconductor package with heat sink
US7504670B2 (en) * 2005-06-09 2009-03-17 Shinko Electric Industries Co., Ltd. Sealing structure for mounting a semiconductor device to a substrate
JP2014165305A (en) * 2013-02-25 2014-09-08 Kyocera Crystal Device Corp Electronic device, glass sealing method of the same, and lid member for the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05235185A (en) * 1992-02-25 1993-09-10 Nec Corp Ic package
US5889323A (en) * 1996-08-19 1999-03-30 Nec Corporation Semiconductor package and method of manufacturing the same
US6856015B1 (en) * 2003-08-21 2005-02-15 Siliconware Precision Industries Co., Ltd. Semiconductor package with heat sink
US7504670B2 (en) * 2005-06-09 2009-03-17 Shinko Electric Industries Co., Ltd. Sealing structure for mounting a semiconductor device to a substrate
JP2014165305A (en) * 2013-02-25 2014-09-08 Kyocera Crystal Device Corp Electronic device, glass sealing method of the same, and lid member for the same

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