JPH0270138A - Synchronous circuit in reception device of frequency hopping modulation system - Google Patents

Abstract

PURPOSE:To attain stable and secure pull in by using a logarithm detector for deciding a threshold voltage and for level detection. CONSTITUTION:The center frequency of a band pass filter BPF1-11 is the frequency difference of a reception signal when synchronization is attained with the reception signal and a hopping oscillator 19, and the center frequency of BPF2-12 is the frequency of an attenuator, which is adequately detached from the center frequency of BPF1-11 within a hopping frequency band. An offset voltage 20 is higher than the average output of the logarithm detector at the time of noise and lower than a correlation voltage without synchronization. The output voltages (a) and (b) of the logarithm detectors 13 and 14 includes small fluctuation when synchronization is not trapped, and they are large at the time of interference. Thus, stable and secure pull-in is attained by controlling a pseudo random pattern generator 18 in such a way that the timing of frequency switching of the oscillator 19 is staggered by a timing control circuit 17 until the output voltage (e) of a computing element 16 becomes positive.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a synchronization circuit in a receiving device that receives radio waves using a frequency hopping modulation method, which is one of the modulation methods of a spread spectrum communication method.

(Prior art and its problems) The frequency hopping method is a digital modulation method that is a modification of FSK, in which the carrier frequency is switched at high speed within an appropriate frequency band and transmitted, and the receiving side receives the same frequency change as the transmitting side. This method uses a local oscillator (homping oscillator) to demodulate the received signal. If the frequency changes on the transmitting and receiving sides are different, the received signal will not be demodulated at all. Usually, the carrier frequency is synchronized so that the frequency change of the hopping oscillator on the receiving side matches the frequency change pattern of the received signal by mutually synchronizing the same pseudo-random pattern that is agreed upon in advance on both the transmitting side and the receiving side. A circuit is required.

Although there are various methods of the same method, a method called sliding correlation will be described here.

FIG. 1 is an example of a conventional frequency hopping type synchronous circuit.

In Figure 1, 1 is a mixer (MIX), 2 is a band pass filter (BPF), and 3 is a demodulation circuit (DEM).
, 4 is an envelope line detector CDET), 5 is a subtracter (SUB
), 6 is a threshold voltage input for synchronization determination, 7
is a timing control circuit (CONT), 8 is a pseudo-random pattern generator (PNGE), and 9 is a homp oscillator (
HOP LO).

Here, B P F2 is for removing the carrier component and sum component in the signal multiplied by mixer 1, and at the same time removing noise outside the band. At the start of reception, the frequencies of the reception input and the hopping oscillator 9 are switched according to the pseudorandom pattern of the same code string, but the timings do not match, and it is uncertain where the timing difference is within one cycle of the pseudorandom pattern. It is. Control to eliminate this timing difference is normally performed by the following two-step control.

First, the timing of frequency switching to the hopping oscillator 9 is set to 1 of the pseudo-random pattern by a signal given from the timing control circuit 7 to the pseudo-random pattern generator 8.
Control (sliding correlation) is performed to almost eliminate the timing difference between the received input and the hopping oscillator 9 by shifting the bit length or % bit length.

Next, the timing difference remaining due to the sliding correlation is always brought to zero using a phase-locked loop known as an early-rate gate.

Here, we will consider the former type of control.

Control that almost eliminates the timing difference by sliding correlation is such that when the timing difference is larger than one focus length of the pseudo-random pattern, the level of the difference frequency component from the mixer 1, that is, the output voltage of the envelope detector 4, becomes almost zero, and the timing difference This method utilizes the fact that a large correlation voltage is output from the envelope detector 4 only when Control is performed to shift the timing of frequency switching until the output voltage of the subtracter 5 becomes positive.

In other words, determining whether the received signal and the frequency change timing of the hopping oscillator 9 match (synchronization determination) is as follows:
This is done depending on whether the output voltage of the subtracter 5 is positive or negative. The threshold voltage 6, which serves as a criterion for determination, has conventionally been set to the average voltage of a level detector during noise or a voltage that changes depending on the signal level of the received signal.

In such a synchronous circuit, the interference waveform, spectrum,
This method has the drawback that errors in synchronization judgment may easily occur depending on the signal level. For example, when the signal level of the interference is very high compared to the level of the desired signal, in the conventional method that determines the threshold voltage according to the signal level of the received signal, the threshold voltage becomes higher than the correlation voltage due to the signal level of the interference. The correct synchronization position may not be detected.

Further, although the correlated voltage changes depending on the signal level, it is difficult for an envelope detector to correctly detect the correlated voltage over a wide dynamic range, which is likely to cause a synchronization determination error.

(Object of the Invention) An object of the present invention is to provide a synchronization circuit for receiving frequency hopping modulation radio waves in a spread spectrum method, which solves the above-mentioned drawbacks.

(Structure and operation of the invention) The synchronization circuit according to the present invention determines the threshold voltage based on the signal level of a frequency that is always detuned by an appropriate frequency from the received signal, and uses a logarithmic detector instead of an envelope line detector. It is characterized by this.

The present invention will be explained in detail below with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the synchronous circuit of the present invention. In the figure, 10 is a mixer (MIX'), 1
112 is a band pass filter (BP F); 13.
14 is a logarithmic detector (Lock), 15 is a demodulation circuit (DE
M), 16 is a subtracter (SUB), 17 is a timing control circuit (CONT), 18 is a pseudo random pattern orderer (PN GE), 19 is a hopping oscillator (HO
PLO), 20 is the offset voltage input, 21 is the adder (
ADD).

Here, the center frequency of B P F 1 (11) is the frequency between the received signal and the hopping oscillator 1 when synchronized with the received signal.
9, and the center frequency of B P F 2 (12) is within the hopping frequency band B P F 1
(11) is a frequency in an attenuation range separated by an appropriate frequency from the center frequency. Furthermore, when the input of the logarithmic detectors 13 and 14 is a cosωL, the detected output is KI! , oga
(K is a constant determined by the amplifier characteristics) is obtained,
A combination of a special AGC amplifier and an envelope detector is commercially available as an IC. The offset voltage 20 is set to a voltage in a range higher than the average output voltage of the logarithmic detector when there is noise, but lower than the correlation voltage when synchronization is properly achieved.

As a supplementary explanation regarding the offset voltage 20, FIG. 3 shows signal waveforms at various parts of the circuit in FIG. 2. Each waveform a - f
respectively indicate the change in voltage from the state of acquisition at the end of the synchronization to the acquisition.

a and b are the output waveforms of the logarithmic detectors 13 and 14, respectively, and C
is the waveform of the offset voltage 20 applied to the adder 21, d is the output waveform of the adder 21, e is the output waveform of the subtracter 16, f
is the output waveform of the subtracter I6 when the offset voltage 20 is not applied.

As can be seen from the figure, at the time of synchronization end acquisition, the logarithmic detector 13.
The output voltages a and b of No. 14 include small fluctuations. This fluctuation becomes especially large when there is interference.

If this voltage is directly compared and used for synchronization judgment, f
As can be seen from the waveform shown in , the output voltage of the subtracter 16 may become positive even though synchronization acquisition is not actually occurring, and it is erroneously determined that synchronization acquisition has occurred. In order to prevent this, in the present invention, an offset voltage 20 is applied only to the output of the logarithmic detector 14 to prevent false synchronization. This offset voltage 20 is determined to be an appropriate voltage within the range of h, taking into consideration the degree of interference.

When performing synchronization control using sliding correlation, the present invention differs from conventional methods in the method of determining a threshold voltage, which is a reference for synchronization determination, and the use of a logarithmic detector for level detection.

When synchronization cannot be acquired (at the end of synchronization), the frequency difference between the receiving input and the hopping oscillator 19 changes randomly and is not constant, so B P F l (11) and B
The signals passing through P F 2 (12) are also random, and the voltage difference between the detection outputs a and b of the logarithmic detectors 13 and 14 is almost zero. Next, since the offset voltage 20c is added by the adder 21 only to the output voltage of the logarithmic detector 14, the output voltage e of the subtracter 16 is always negative. At this time, even if there is interference in the received signal, the interference component is B
Since the signal passes through both the PFI and BPF2 filters, the output voltages of both the logarithmic detectors 13 and 14 change due to interference, so the output voltage e of the subtracter 16 is always negative.

At the time of synchronization acquisition, that is, when the frequency switching timing of the hopping oscillator 19 is controlled by sliding correlation and the timing difference disappears, B P F
1 (11) only the signal component passes through, BP F 2
The signal component passing through (12) disappears. Therefore, the detected voltage a of the logarithmic detector 13 becomes a large correlated voltage, but the detected voltage S of the logarithmic detector 14 becomes almost zero. An offset voltage 20c is added to this detected voltage C by an adder 21, but since this offset voltage C is set to a voltage lower than the correlation voltage, the output e of the subtracter 16 becomes positive.

Therefore, until the output voltage e from the subtracter 16 becomes positive,
By controlling the pseudo-random pattern generator 18 by the timing control circuit 17 so as to shift the frequency switching timing of the hopping oscillator 19, synchronization can be acquired regardless of the level of interference or the shape of the spectrum.

Furthermore, since a logarithmic detector is used to detect the signal level, a correlated voltage can be output correctly even in response to large changes in the received input level. That is, the effects of using a logarithmic detector are as follows.

B P F 1 (11), B P F 2 (1
The output of 2) changes according to the received input level. In the case of fixed communication where neither the transmitting side nor the receiving side moves, the fluctuation range of the received input level is small, but if either or both of the transmitting side and receiving side move, the output of BPFI and BPF2 will vary over a wide range of input signal levels. It is necessary to compare signal levels. Conventionally, AG
A C amplifier is used to suppress the width of the level change, but with this method, when strong interference exists in the band, the AGC
The amplifier operates to keep the level constant in response to this interference, making it impossible to acquire synchronization. Since the present invention uses a logarithmic detector, this drawback does not occur.

(Effects of the Invention) As explained in detail above, the present invention enables stable and reliable synchronization even in the face of large changes in the received signal level and without being affected by the level of interference or the shape of the spectrum. This is particularly effective when either or both of the transmitter and receiver are mobile stations.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional frequency hopping synchronization circuit, FIG. 2 is a block diagram of a frequency hopping synchronization circuit according to an embodiment of the present invention, and FIG. 3 is a signal waveform diagram of each part of FIG. 2. 1.10...Mixer, 2.11.12...BPF,
3.15... Demodulation circuit (DEM), 4... Envelope detector (DET), 5,16... Subtractor (SUB),
6... Threshold voltage, 7.17... Timing control circuit (CONT), 8, 18... Pseudo random pattern generator (PNGE), 9, 19... Homping oscillator (HOP LO), 13. 14...
- Logarithmic detection H (LOG), 20...Offcent voltage, 21...Adder (ADD).

Claims (1)

[Claims] A synchronous circuit having a frequency hopping oscillator, comprising: a first bandpass filter for extracting a desired signal from a multiplication result of a received signal and an output of the frequency hopping oscillator; and attenuation of the first bandpass filter. a second bandpass filter having a center frequency set in the range, and a first logarithmic detector and a second logarithmic detector that input the outputs of the first bandpass filter and the second bandpass filter, respectively. and adding the output of the second logarithmic detector and an offset voltage set to a value greater than the average noise voltage of the first logarithmic detector when synchronization is not acquired and smaller than the signal correlation voltage when synchronization is acquired. an adder; and a subtracter that outputs an output when the output of the first logarithmic detector is larger than the output of the adder, and synchronization is achieved by controlling the timing of the frequency hopping oscillator by the output of the subtracter. A synchronization circuit in a frequency hopping modulation receiving device characterized by performing the following.