JPH0269958A - Holder for semiconductor wafer - Google Patents
Holder for semiconductor waferInfo
- Publication number
- JPH0269958A JPH0269958A JP63222810A JP22281088A JPH0269958A JP H0269958 A JPH0269958 A JP H0269958A JP 63222810 A JP63222810 A JP 63222810A JP 22281088 A JP22281088 A JP 22281088A JP H0269958 A JPH0269958 A JP H0269958A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- semiconductor wafer
- recess
- holder
- magnetic memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 239000000758 substrate Substances 0.000 claims description 7
- 238000007689 inspection Methods 0.000 claims description 6
- 238000001514 detection method Methods 0.000 abstract 2
- 235000012431 wafers Nutrition 0.000 description 22
- 230000002950 deficient Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000004570 mortar (masonry) Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70691—Handling of masks or workpieces
- G03F7/707—Chucks, e.g. chucking or un-chucking operations or structural details
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70691—Handling of masks or workpieces
- G03F7/70733—Handling masks and workpieces, e.g. exchange of workpiece or mask, transport of workpiece or mask
- G03F7/7075—Handling workpieces outside exposure position, e.g. SMIF box
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体ウェーハ用ホルダに関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a holder for semiconductor wafers.
従来、半導体ウェーハ上に設けた半導体素子の検査は良
、不良の判定だけを行い、不良の場合には、その不良チ
ップ領域の表面にインクを塗付けたり、スクラッチイン
カーにより傷を付けたりして印を付けるという方法をと
っていた。Conventionally, semiconductor devices installed on semiconductor wafers are inspected only to determine whether they are good or bad, and if they are found to be defective, the surface of the defective chip area is coated with ink or scratched with a scratch inker. The method was to mark it.
上述した従来の検査結果の記録方法は、半導体ウェーハ
のチップ領域の表面に直接臼をつけるのて、良、不良の
検査結果しか記録できないという問題点があった。また
、スクラッチインカーを用いて刻印する場合においては
、素子を破壊してしまうため、再度検査ができないとい
う欠点があった。The above-described conventional method for recording inspection results has the problem that only inspection results of good and bad can be recorded by directly placing a mortar on the surface of the chip area of a semiconductor wafer. Further, when marking is performed using a scratch inker, the element is destroyed, so there is a drawback that re-inspection is not possible.
本発明の半導体ウェーハ用ボルタは、基板の表面に半導
体ウェーハを収納するために設けた凹部と、前記基板の
前記凹部以外の表面及び裏側の少くとも一つの面に設け
て前記半導体ウェーハの検査データを記憶させるための
磁気記憶部を有する。The bolter for semiconductor wafers of the present invention includes a recess provided on the surface of a substrate for storing the semiconductor wafer, and an inspection data of the semiconductor wafer provided on at least one surface of the substrate other than the recess and the back side. It has a magnetic storage section for storing.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第1図は本発明の第1の実施例を示す平面図である。FIG. 1 is a plan view showing a first embodiment of the present invention.
図に示すように、基板1の表面に半導体ウェーハを収納
するために設けた凹部2と、凹部2以外の表面に磁気膜
を設けた磁気記憶部3を有する。As shown in the figure, a substrate 1 has a recess 2 provided on the surface thereof to accommodate a semiconductor wafer, and a magnetic storage section 3 provided with a magnetic film on the surface other than the recess 2.
第2図は本発明の半導体ウェーハ用ホルタの使用例を示
すブロック図である。FIG. 2 is a block diagram showing an example of use of the semiconductor wafer holter of the present invention.
図に示すように、半導体ウェーハ4の特性を測定器5を
用いて測定し、そのデータを記憶部6に記憶させる。次
に、半導体ウェーハ4を収納する半導体ウェーハ用ホル
ダ7の磁気記憶部に記憶部6に記憶されたデータの例え
ば製品名、製造番号、半導体ウェーハの管理番号、半導
体ウェーハのチップ領域の座標とそのチップ領域の測定
データ、良否の判定等のデータを書込みユニット8を使
用して書込み記録する。As shown in the figure, the characteristics of the semiconductor wafer 4 are measured using a measuring device 5, and the data are stored in a storage section 6. Next, the data stored in the storage unit 6 in the magnetic storage unit of the semiconductor wafer holder 7 that houses the semiconductor wafer 4, such as the product name, serial number, management number of the semiconductor wafer, coordinates of the chip area of the semiconductor wafer, and their The writing unit 8 is used to write and record data such as measurement data of the chip area and judgment of pass/fail.
第3図(a)、(b)は本発明の第2の実施例を示す平
面図及び底面図である。FIGS. 3(a) and 3(b) are a plan view and a bottom view showing a second embodiment of the present invention.
図に示すように、基板1の裏面に磁気膜を設けた磁気記
憶部3を有する以外は第1の実施例と同じ構成を有する
。As shown in the figure, the structure is the same as that of the first embodiment except that it includes a magnetic memory section 3 provided with a magnetic film on the back surface of a substrate 1.
以上説明したように本発明は、半導体ウェーハの検査デ
ータを本発明の半導体ウェーハ用ホルタの磁気記憶部に
記憶させ、その半導体ウェーハ用ホルダに検査済の半導
体ウェーハを収納することにより、半導体ウェーハのチ
ップ領域に直接、印をつける必要がなくなる為、同じ半
導体ウェーハを再度検査することが可能になるという効
果がある。また、半導体ウェーハ上の各チップ領域の不
良項目が詳細に記録できるという効果がある。As explained above, the present invention stores semiconductor wafer inspection data in the magnetic storage section of the semiconductor wafer holder of the present invention, and stores the inspected semiconductor wafer in the semiconductor wafer holder. Since there is no need to directly mark the chip area, there is an effect that the same semiconductor wafer can be inspected again. Another advantage is that defective items in each chip area on a semiconductor wafer can be recorded in detail.
第1図は本発明の第1の実施例を示す平面図、第2図は
本発明の半導体ウェーハ用ホルダの使用例を示すブロッ
ク図、第3図(a)、(b)は本発明の第2の実施例を
示す平面図及び底面図である。
1・・・基板、2・・・凹部、3・・・磁気記憶部、4
・・・半導体ウェーハ、5・・・測定器、6・・・記憶
部、7・・・半導体ウェーハ用ホルダ、8・・書込みユ
ニット。
尤 1 図
=5
32 目
(幻
(b)
尤
図FIG. 1 is a plan view showing a first embodiment of the present invention, FIG. 2 is a block diagram showing an example of use of the semiconductor wafer holder of the present invention, and FIGS. 3(a) and (b) are FIG. 7 is a plan view and a bottom view showing a second embodiment. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Recessed part, 3... Magnetic storage part, 4
... Semiconductor wafer, 5... Measuring device, 6... Storage unit, 7... Semiconductor wafer holder, 8... Writing unit. 1 figure = 5 32 eyes (phantom (b) figure
Claims (1)
部と、前記基板の前記凹部以外の表面及び裏側の少くと
も一つの面に設けて前記半導体ウェーハの検査データを
記憶させるための磁気記憶部を有することを特徴とする
半導体ウェーハ用ホルダ。A recess provided on the surface of the substrate to accommodate the semiconductor wafer, and a magnetic storage section provided on at least one surface of the substrate other than the recess and the back side for storing inspection data of the semiconductor wafer. A holder for a semiconductor wafer, comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63222810A JPH0269958A (en) | 1988-09-05 | 1988-09-05 | Holder for semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63222810A JPH0269958A (en) | 1988-09-05 | 1988-09-05 | Holder for semiconductor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0269958A true JPH0269958A (en) | 1990-03-08 |
Family
ID=16788256
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63222810A Pending JPH0269958A (en) | 1988-09-05 | 1988-09-05 | Holder for semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0269958A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2351606A (en) * | 1999-05-18 | 2001-01-03 | Lintec Corp | Semiconductor wafer holder with process data memory |
JP2007211266A (en) * | 2006-02-07 | 2007-08-23 | Jfe Steel Kk | Continuous heating furnace and controlling method thereof |
EP1832933A1 (en) * | 2006-03-08 | 2007-09-12 | Erich Thallner | Substrate processing and alignment |
JP2013038256A (en) * | 2011-08-09 | 2013-02-21 | Lintec Corp | Sheet application apparatus and sheet application method |
US9478501B2 (en) | 2006-03-08 | 2016-10-25 | Erich Thallner | Substrate processing and alignment |
-
1988
- 1988-09-05 JP JP63222810A patent/JPH0269958A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2351606A (en) * | 1999-05-18 | 2001-01-03 | Lintec Corp | Semiconductor wafer holder with process data memory |
GB2351606B (en) * | 1999-05-18 | 2004-02-04 | Lintec Corp | Method of processing semiconductor wafer and semiconductor wafer supporting member |
US6718223B1 (en) | 1999-05-18 | 2004-04-06 | Lintec Corporation | Method of processing semiconductor wafer and semiconductor wafer supporting member |
KR100637569B1 (en) * | 1999-05-18 | 2006-10-20 | 린텍 가부시키가이샤 | Method of processing semiconductor wafer and semiconductor wafer supporting member |
JP2007211266A (en) * | 2006-02-07 | 2007-08-23 | Jfe Steel Kk | Continuous heating furnace and controlling method thereof |
EP1832933A1 (en) * | 2006-03-08 | 2007-09-12 | Erich Thallner | Substrate processing and alignment |
US9478501B2 (en) | 2006-03-08 | 2016-10-25 | Erich Thallner | Substrate processing and alignment |
JP2013038256A (en) * | 2011-08-09 | 2013-02-21 | Lintec Corp | Sheet application apparatus and sheet application method |
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