JPH0241048A - Relay system for inter-station transfer data - Google Patents

Abstract

PURPOSE:To reduce waveform distortion by applying time division multiplex to a digital inter-station transfer data sent from plural subsequent stations in a different time zone, reproducing the result by a high speed clock signal having a frequency being a multiple of N of the specified frequency and sending the signal to a host station at the specified frequency. CONSTITUTION:An inter-station data sent from plural subsequent stations via transmission lines 1a-1n in response to polling is amplified by line receivers 2a-2n, subject to time division multiplex by wired-OR connection and the result is given to a FF 4. A double speed clock generating circuit 3 generates a clock having a frequency twice the specified frequency and gives the result to FFs 4, 5. The inter-station data is reproduced synchronously with the double speed clock, outputted from the FF 4 and sent to the host station via a line driver 6 and a transmission line 8. On the other hand, the FF 5 applies 1/2 frequency division to the output of the double speed clock generating circuit 3 to output the clock with the specified frequency and sent to the host station via a line driver 7 and a transmission line 9. Thus, waveform distortion of a reproducing signal is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a relay system for interoffice transfer data used in a switching system within a telecommunications network.

(Prior Art) In a switching system within a telecommunications network, status information within a local station is transferred as inter-office transfer data from a lower station to an upper station on the switching ladder. An intermediate station that accommodates multiple lower stations performs time-division multiplexing while reproducing digital inter-office transfer data transferred from each lower station at different times using a clock signal of a specified frequency generated within the own station. and sends it to the upper station along with this clock signal.

That is, as shown in FIG. 3, transmission lines 11a, 11b, .
Inter-office transfer data transferred over the line receivers 12a, 12b...12n is amplified by the line receivers 12a, 12b, .
4 data input terminals. This inter-office transfer data is sent to the clock input terminal C of the clock signal generation circuit 13.
The signal is reproduced in synchronization with a clock signal of a specified frequency supplied from the station, and is sent to the transmission line 18 connected to the upper station via the line receiver 16. A clock signal of a specified frequency generated by the clock generation circuit 13 is sent out via a line receiver 17 onto a transmission line 19 connected to an upper station.

In this inter-station transfer data relay method, the clock signal for reproduction by sampling is created by a free-running oscillator circuit within the own station, so there is temporal distortion in the reproduced waveform due to a phase shift with the inter-station transfer data. occurs. In order to reduce this waveform distortion, the frequency of the clock signal is set to a value ten times or more higher than that of the signal.

For example, if the signal speed of inter-office transfer data is 4.8 Kbi
In the case of t/s, the clock frequency is set to a sufficiently high value of about 64 Kbit/s.

(Problems to be Solved by the Invention) In the conventional inter-office transfer data relay system described above, distortion of the reproduced waveform is reduced by increasing the clock frequency. However, there is a limit to increasing the clock frequency due to limitations on the bandwidth of the transmission line for transmitting this clock signal to the upper station. This distortion of the reproduced waveform accumulates each time it is relayed, so in a system with a large number of relay stages, the distortion of the final waveform cannot be ignored.

(Means for Solving the Problems) According to the inter-office transfer data relay method according to the present invention, digital inter-office transfer data transferred from a plurality of lower stations in different time zones is time-division multiplexed and self-transferred. The waveform distortion of the reproduced signal is reduced by reproducing it using a high-speed clock signal that is N (an integer) times the specified frequency that is generated within the station, and sending this high-speed clock signal to the upper station along with a clock signal of the specified frequency that is divided by N. It is configured to sufficiently reduce

Hereinafter, the operation of the present invention will be explained in detail together with examples.

(Embodiment) FIG. 1 is a block diagram showing the configuration of an intra-office relay device that uses a relay method for inter-office transfer data according to an embodiment of the present invention. Transmission lines through which inter-office transfer data is transferred, 2a to 2n are line receivers, 3 is a double-speed clock generation circuit, 4.5 is a flip-flop, 6.7 is a line receiver, and 8.9 is a transmission connected to the upper station. It is a road.

Inter-station transfer data is transferred from each of the lower stations onto the transmission paths 1a, lb...in in response to polling performed by a transmitting device (not shown) at different time zones for each lower station. The data transferred between the line receiver'l
The signal is supplied to the data input terminal of the flip-flop 4 while being amplified by a, 2b, . . . , 2n and time-division multiplexed by a combination of wired-OR connection and polling. The double-speed clock generation circuit 3 generates a clock signal having a frequency twice the specified frequency, and supplies this to the clock input terminal C of the flip-flop 4. Therefore, the inter-office transfer data supplied to the input terminal of the flip-flop 4 is reproduced in synchronization with the double-speed clock signal with a frequency twice the specified frequency supplied to the clock input terminal C, and the line receiver 6 The signal is then sent out to a transmission line 8 that connects to an upper station.

On the other hand, the double-speed clock signal generated by the clock ordering circuit 3 is frequency-divided by two in the flip-flop 5 to become a clock signal of a specified frequency. A clock signal of a specified frequency outputted from the flip-flop 5 is sent out via a line receiver 7 onto a transmission line 9 connected to an upper station. Note that the clock signal of the specified frequency transferred to the upper station on this transmission line 9 is not used for reproducing inter-office transfer data in this upper station, but is used for internal transmission within the upper station as in the case of Fig. 1. A double-speed clock signal generated by a running oscillation circuit is used for reproduction.

When the signal speed of inter-office transfer data is 4.8 Kbit/s, as illustrated by waveform S in Fig. 2, the specified frequency is 64
Kbit/s twice the frequency (128Kbit/s
The signal is reproduced using the clock signal 2fC of S), and a reproduced signal R is output. The temporal distortion of this reproduced waveform R from the original waveform S remains at a small value of τ, as shown in FIG. On the other hand, as in the conventional system, the clock signal rc of the specified frequency (64 Kbit/s)
When the signal S is reproduced using , a reproduced waveform R° shown in FIG. 2 is obtained. As shown in FIG. 2, the temporal distortion of this reproduced waveform R° from the original waveform S becomes a large value such as τ′.

In the above, a configuration has been exemplified in which waveform reproduction is performed using a double-speed clock with a frequency twice the specified frequency. However, in general, depending on the required waveform accuracy,
The configuration can be such that reproduction is performed using a high-speed clock that is multiplied by an arbitrary integer such as double or eight times.

(Effects of the Invention) As explained in detail above, according to the inter-office transfer data relay method according to the present invention, digital inter-office transfer data transferred from a plurality of lower stations in different time zones can be time-division multiplexed. The configuration is such that the high-speed clock signal generated within the local station is generated at N (an integer) times the specified frequency, and is sent to the upper station along with the clock signal of the specified frequency obtained by dividing this high-speed clock signal by N. The effect is that the waveform distortion of the signal can be reduced as much as necessary.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an intra-office relay device to which a relay system for inter-office transfer data according to an embodiment of the present invention is applied, FIG. 2 is a waveform diagram for explaining the operation of FIG. 1, and FIG. 3
The figure is a block diagram showing the configuration of an intra-office relay device to which a conventional inter-office transfer data relay method is applied. 1a to 1n...Transmission paths to which inter-office transfer data is transferred from each of the lower stations at different times, 2a to 2n.
...Line receiver, 3...Double speed clock generation circuit,
4...Flip-flop for signal reproduction, 5...2
Flip-flops forming a frequency dividing circuit, 6.7...
Line driver, 8.9...Transmission line connected to the upper station.

Claims (1)

[Claims] Digital inter-office transfer data transferred from multiple lower-order stations at different times is time-division multiplexed and reproduced using a high-speed clock signal generated within the local station with a frequency N (any integer greater than or equal to 2) times the specified frequency. An inter-office data relay method characterized in that this high-speed clock signal is divided by N and sent to a higher-order station together with a clock signal of a specified frequency.