JPH02377A - Photoelectric converting device - Google Patents
Photoelectric converting deviceInfo
- Publication number
- JPH02377A JPH02377A JP63202533A JP20253388A JPH02377A JP H02377 A JPH02377 A JP H02377A JP 63202533 A JP63202533 A JP 63202533A JP 20253388 A JP20253388 A JP 20253388A JP H02377 A JPH02377 A JP H02377A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- type region
- substrate
- photoelectric conversion
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 84
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 238000006243 chemical reaction Methods 0.000 claims description 19
- 230000005684 electric field Effects 0.000 abstract description 5
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 abstract description 4
- 239000002019 doping agent Substances 0.000 abstract description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052782 aluminium Inorganic materials 0.000 abstract description 2
- 229910052796 boron Inorganic materials 0.000 abstract description 2
- 229910000073 phosphorus hydride Inorganic materials 0.000 abstract description 2
- 239000013078 crystal Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 230000006798 recombination Effects 0.000 description 3
- 238000005215 recombination Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000001443 photoexcitation Effects 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
r産業上の利用分野1
本発明は基板上に設けられた半導体の一主表面にのみ士
電極となるP型の領域と一電極となるN型の領域とを選
択的に設け、作製の容易かつ構造の簡単な光電変換装置
に関する。[Detailed Description of the Invention] r Industrial Field of Application 1 The present invention selects a P-type region that will serve as an electrode and an N-type region that will serve as one electrode only on one main surface of a semiconductor provided on a substrate. The present invention relates to a photoelectric conversion device that is easily provided, easily manufactured, and has a simple structure.
「従来の技術j
従来、光電変換装置に関してはPNまたはPIN接合を
単結晶の珪素基板に形成した太陽電池、またはフォトセ
ルが知られている。しかしこのPNまたはPIN接合は
単結晶の珪素基板の表面と裏面にその十電極または一電
橿を有し、その接合面は基板の主面に実質的に平行に設
け、この接合面に光が多量に照射されるように工夫がな
されていたにすぎなかった。``Conventional technology j'' Conventionally, solar cells or photocells in which a PN or PIN junction is formed on a single-crystal silicon substrate are known as photoelectric conversion devices.However, this PN or PIN junction is formed on a single-crystal silicon substrate. It has ten electrodes or one electrode on the front and back surfaces, and the bonding surface is arranged substantially parallel to the main surface of the substrate, so that a large amount of light is irradiated onto the bonding surface. It wasn't too much.
V発明が解決しようとする問題点1
これら従来の光電変換装置は半導体基板の主面に平行に
接合面を設けていた為、電界のかかる方向と光照射面が
垂直となってしまい光照射強度が電界のかかる方向で一
様ではなく、効率よく電子・ホールを発生させることが
できなかった。Problem to be solved by the V invention 1 Since these conventional photoelectric conversion devices have a bonding surface parallel to the main surface of the semiconductor substrate, the direction in which the electric field is applied and the light irradiation surface are perpendicular to each other, resulting in a decrease in the light irradiation intensity. The electric field was not uniform in the direction in which it was applied, making it impossible to efficiently generate electrons and holes.
また、単結晶基板は極めてへきかいしやすく高価であり
、加工がしにくく、光電変換装置を集積化して複数個を
直列または並列に配列させることができない等多くの欠
点を有していた。In addition, single crystal substrates have many drawbacks, such as being extremely easily cracked and expensive, difficult to process, and unable to integrate photoelectric conversion devices and arrange a plurality of them in series or parallel.
本発明は非単結晶半導体中で電子・ホールを効率よく発
生させることのできる、また更に半導体に非単結晶を用
いた光電変換装置を目的としたものである。The present invention is directed to a photoelectric conversion device that can efficiently generate electrons and holes in a non-single crystal semiconductor, and further uses a non-single crystal semiconductor.
r問題点を解決する為の手段」
本発明は基板上の第1の半導体と該半導体上に第2の半
導体を有し、前記第1の半導体または前記第2の半導体
若しくは前記第1の半導体及び前記第2の半導体中にP
型の領域とN型の領域を有し、前記P型の領域上及び前
記N型の領域上に電極が設けられたことを特徴とする光
電変換装置により上記の目的を達成したものである。"Means for Solving Problems" The present invention has a first semiconductor on a substrate and a second semiconductor on the semiconductor, the first semiconductor, the second semiconductor, or the first semiconductor. and P in the second semiconductor.
The above object has been achieved by a photoelectric conversion device characterized in that it has a type region and an N-type region, and electrodes are provided on the P-type region and the N-type region.
1作用j
上記のような光電変換装置の構造、即ち同一光照射面よ
り、P型の領域、N型の領域をその半導体の深さ方向に
形成したことにより、P型の領域とN型の領域間での電
界方向での光強度が一定となる。特に、第2の半導体を
第1の半導体に比べて広いエネルギーバンド巾を有せし
める場合は電極近傍が実質的にW−N構造(WIDE−
T。1 Effect j The structure of the photoelectric conversion device as described above, that is, by forming the P-type region and the N-type region in the depth direction of the semiconductor from the same light irradiation surface, the P-type region and the N-type region are formed in the depth direction of the semiconductor. The light intensity in the electric field direction between regions is constant. In particular, when the second semiconductor is made to have a wider energy band width than the first semiconductor, the vicinity of the electrode has a substantially W-N structure (WIDE-
T.
NARROW)を有せしめ光励起により発生した電子・
ホール対のうち十電極に電子が一電極にホールが拡散し
てしまうことなく、十電極にはホルのみ一電極には電子
のみを拡散、集合せしめんとしたもので光電変換効率の
向上を計ろうとしたものである。 以下に実施例に従い
本発明を説明する。NARROW) and the electrons generated by photoexcitation.
It is designed to improve photoelectric conversion efficiency by diffusing and collecting electrons in ten electrodes and holes in ten electrodes and electrons in one electrode, without causing electrons to diffuse to one electrode among the hole pairs. This is what I tried to do. The present invention will be described below with reference to Examples.
r実施例IJ 第1図は本発明の製作工程を示す縦断面図である。rExample IJ FIG. 1 is a longitudinal sectional view showing the manufacturing process of the present invention.
第1図(A)において、基板(1)は導電性または絶縁
性基板である。この基板は安価であり以降の被膜形成工
程に対し機械的強度並びに対熱性を有していることがそ
の要件である。この為本実施例においては、瀬戸物、セ
ラミック、または、ガラス基板を主として用いた。この
基板(1)の上面に室温〜500°Cの温度にてプラズ
マCVD法により、SiH4: 20SCCM、圧カニ
0.01〜0.3↑ORRで約60分間Depoを行
い膜厚1μm、エネルギーバンド巾約1.6 eVの第
1の半導体(2)を形成した。In FIG. 1(A), the substrate (1) is a conductive or insulating substrate. The requirements for this substrate are that it is inexpensive and has mechanical strength and heat resistance for the subsequent film forming process. Therefore, in this embodiment, chinaware, ceramic, or glass substrates were mainly used. Deposition was performed on the upper surface of this substrate (1) for about 60 minutes at a temperature of room temperature to 500°C using SiH4: 20SCCM and a pressure crab of 0.01 to 0.3↑ORR to give a film thickness of 1 μm and an energy band. A first semiconductor (2) having a width of about 1.6 eV was formed.
この際原料ガスに必要に応じて C,O,Nを含むガス
を添加してエネルギーバンド巾を変化させてもよい。さ
らにこの第1の半導体上(2)に第2の半導体(3)を
形成した。ただし、第1の半導体よりエネルギーバンド
巾を0.5〜2eV程広くする為、第1の半導体と同じ
作製条件で反応ガスにさらにN、−0,Cを5〜50a
tm%添加したエネルギーバンド巾2.3 ev、膜厚
2500人の第2の半導体を形成した。At this time, the energy band width may be changed by adding a gas containing C, O, and N to the source gas as necessary. Furthermore, a second semiconductor (3) was formed on this first semiconductor (2). However, in order to make the energy band width about 0.5 to 2 eV wider than that of the first semiconductor, 5 to 50 μm of N, -0, and C were added to the reaction gas under the same manufacturing conditions as the first semiconductor.
A second semiconductor with an energy band width of 2.3 ev and a film thickness of 2,500 tm % was formed.
これら第1の半導体および第2の半導体は、P型、N型
のドーパントを添加しない限り実質的に真性の半導体で
あった。These first semiconductor and second semiconductor were substantially intrinsic semiconductors unless P-type and N-type dopants were added.
次に、この半導体を光電変換装置に必要な部分のみを残
すようにエツチングを行った後、半導体層の上表面およ
び側周辺に第2の半導体に対しマスク作用を有する絶縁
膜例えば酸化珪素または窒化珪素を500〜2000人
の厚さにプラズマCVD法により形成した。本実施例で
は5il14.N113を用いて窒化珪素を形成した。Next, after etching this semiconductor so as to leave only the portion necessary for the photoelectric conversion device, an insulating film such as silicon oxide or nitride, which has a masking effect on the second semiconductor, is formed on the upper surface and around the sides of the semiconductor layer. Silicon was formed to a thickness of 500 to 2000 layers by plasma CVD. In this example, 5il14. Silicon nitride was formed using N113.
さらに十電極および一電極になる部分に対し開口(7)
、 (8)をフォトエツチング法により絶縁膜(4)
を選択的に除去して形成した。この開口の巾は2〜20
μm特に5〜7μmと巾を狭くした櫛型とし、開口(7
)、 (8)間の距離(11)は第1の半導体の膜厚
とほぼ同一としたが、この距離は半導体中の再励起によ
って発生した電子・ホールの拡散距離より短くその1/
4〜1/2とするのがこのましかった。また開口は、た
んざく型等の形状にしてもよい。次に開口部(7)、(
8)よりそれぞれボロン(B)、フォスフイン(P)を
拡散法、イオン注入法等により、ドーパントを1018
cm−”〜3 mo1%の濃度にドープし、第1図(C
)のように、P型の領域(9)、N型の領域(10)を
第2の半導体層中に形成した。また第1および第2の半
導体は両方とも非単結晶半導体なので不純物は第1の半
導体内まで拡散してゆき、各々P型の領域(19) 、
N型の領域(20)となり、その深さは第1の半導体
と第2の半導体との界面より0〜2000人以内にとど
めた。Further openings (7) for the parts that become ten electrodes and one electrode.
, (8) is formed into an insulating film (4) by photo-etching.
was formed by selectively removing. The width of this opening is 2 to 20
It is a comb shape with a narrow width, especially 5 to 7 μm, and the opening (7
The distance (11) between ) and (8) was made almost the same as the film thickness of the first semiconductor, but this distance is shorter than the diffusion distance of electrons and holes generated by re-excitation in the semiconductor and is 1/1/2 the distance.
It was best to set it to 4 to 1/2. Further, the opening may have a shape such as a tanzak shape. Next, the opening (7), (
8), boron (B) and phosphine (P) were added as dopants by diffusion method, ion implantation method, etc.
cm-” to a concentration of 3 mo1%, Figure 1 (C
), a P-type region (9) and an N-type region (10) were formed in the second semiconductor layer. Furthermore, since the first and second semiconductors are both non-single crystal semiconductors, impurities diffuse into the first semiconductor, forming P-type regions (19) and 19, respectively.
It becomes an N-type region (20), and its depth is kept within 0 to 2000 depths from the interface between the first semiconductor and the second semiconductor.
これ以上深くした場合、キャリアの拡散距離より長くな
ってしまうためキャリアが途中で消滅してしまうからで
ある。This is because if the depth is deeper than this, the distance becomes longer than the carrier diffusion distance, and the carriers disappear midway.
次ぎに第1図(D)のようにP型の領域(9)N型の領
域(10)の各々の上面にアルミニウムを1μm蒸着し
オーミックコンタクト電極(14)。Next, as shown in FIG. 1(D), 1 μm of aluminum is deposited on the upper surface of each of the P-type region (9) and the N-type region (10) to form an ohmic contact electrode (14).
(15)およびそれより延在して基板上に外部接続端子
(16)、 (17)を形成した。External connection terminals (16) and (17) were formed on the substrate (15) and extending therefrom.
光は上方の(25)の如くに入射し実質的に真性の第2
の半導体(12)は光に対し窓効果を有しているためそ
の厚さを入射光の入/4に選定していわゆる反射防止膜
としての効果も助長させた。The light enters as shown in (25) above and becomes essentially an intrinsic second light.
Since the semiconductor (12) has a window effect with respect to light, its thickness was selected to be 4/4 of the incidence of incident light to promote its effect as a so-called anti-reflection film.
第1図CD)のA−A’ の破線に従ってそのエネルギ
、ハンドダイヤグラムを考察するとその一例として第2
図(A)を得た。十電極(14)第2のP型の領域(9
)、第1のP型の領域(19)実質的に真性の第1半導
体(2)第1のN型の領域(20)第2のN型の領域(
10) 、−電極(15)にそれぞれ対応して(14)
、(9) 、(19)、(2)、(20)、(10)
、(15)が記されている。If you consider the energy and hand diagram according to the broken line A-A' in Figure 1 CD), the second example is
Figure (A) was obtained. Ten electrodes (14) second P-type region (9
), a first P-type region (19) a substantially intrinsic first semiconductor (2) a first N-type region (20) a second N-type region (
10) , -corresponding to the electrode (15), respectively (14)
, (9) , (19), (2), (20), (10)
, (15) are written.
この第2図(A)より明らかな如く、ホールは(14)
へ、また電子は(15)へと拡散して行き、もしホール
の一部が(10)へと拡散した場合、第2の半導体の広
いエネルギーバンドにより撥ね返されてしまい一電権近
傍での再結合を禁止している。同様に電子の十電極近傍
でのホールとの再結合が第2の半導体(9)により禁止
している。As is clear from this Figure 2 (A), the hole is (14)
The electrons also diffuse to (15), and if some of the holes diffuse to (10), they will be repelled by the wide energy band of the second semiconductor, causing Recombination is prohibited. Similarly, recombination of electrons with holes in the vicinity of the ten electrodes is prohibited by the second semiconductor (9).
このことより本発明は光の入射に対しW−N構造を有す
るばかりではなく、電子・ホールのそれぞれに対し広い
エネルギーバンド巾が好ましく寄与しておりひとつの半
導体層(第2の半導体)により実質的にW−N−Wのサ
ンドインチ構造を作ることができた。From this, the present invention not only has a W-N structure with respect to the incidence of light, but also has a wide energy band width that favorably contributes to each of electrons and holes. We were able to create a W-N-W sandwich inch structure.
その結果筒2の半導体を第1の半導体と同一のエネルギ
ーバンド巾としたものと比ベア0〜200%の光電変換
効率の向上が見られ、本実施例では0.01eI11で
4.20%の効率が得られ、小面積であれば12〜16
%の効率を得られる可能型が見いだされた。As a result, it was found that the photoelectric conversion efficiency was improved by 0 to 200% compared to when the semiconductor in the cylinder 2 had the same energy band width as the first semiconductor, and in this example, it was 4.20% at 0.01eI11. Efficiency is obtained, and if the area is small, 12 to 16
% efficiency was found.
第2図(B)はP型の領域(19) N型の領域(20
)が第1の半導体層中に形成された場合の図で(A)よ
りさらに積極的に電子またはホールの再結合を禁止して
いる。Figure 2 (B) shows a P-type region (19) and an N-type region (20
) is formed in the first semiconductor layer, and inhibits recombination of electrons or holes more actively than in (A).
第2図(C)は第1図(D)においてB−B″の破線に
従って示したエネルギーバンド図である。FIG. 2(C) is an energy band diagram shown along the broken line B-B'' in FIG. 1(D).
r実施例2J
第3図(A)のように本実施例は実施例1とほぼ似た構
造である。rEmbodiment 2J As shown in FIG. 3(A), this embodiment has a structure almost similar to that of Embodiment 1.
但し第1の半導体と第2の半導体の間に、絶縁層(50
)が設けである。この絶縁層(50)はトンネル電流を
許容しうる範囲2〜50人特に2〜30人の厚さにした
。5il14とNH3を原料ガスとしてその流量比1
: 30.ITorr、30−で約20分間窒化珪素を
堆積させた。その他は実施例1と全く同様である。However, between the first semiconductor and the second semiconductor, there is an insulating layer (50
) is provided. This insulating layer (50) has a thickness of 2 to 50 layers, particularly 2 to 30 layers, which allows tunneling current. The flow rate ratio of 5il14 and NH3 as raw material gas is 1
: 30. Silicon nitride was deposited for about 20 minutes at ITorr, 30-. The rest is exactly the same as in Example 1.
これにより十電極、−電極において、MIS構造(Pの
半導体−絶縁膜一第1の半導体またはNの半導体−絶縁
膜一第1の半導体)となっている。As a result, the ten electrodes and the negative electrode have an MIS structure (P semiconductor-insulating film-first semiconductor or N semiconductor-insulating film-first semiconductor).
第1の半導体と第2の半導体の間に絶縁膜を挿入した為
、P型の領域とN型の領域を形成する際に不純物は第1
の半導体層迄侵入せずP、Nの領域の底面を実質的に第
1の半導体と第2の半導体の間に隣接して作製すること
ができた。このことによりキャリアの拡散距離を短くす
ることができた。Since an insulating film is inserted between the first semiconductor and the second semiconductor, when forming the P-type region and the N-type region, impurities are removed from the first semiconductor.
It was possible to fabricate the bottom surfaces of the P and N regions substantially adjacent to each other between the first semiconductor and the second semiconductor without penetrating the semiconductor layer. This made it possible to shorten the carrier diffusion distance.
第3図(B)〜第3図(D)に本発明の他の実施形態の
断面図をしめす。FIGS. 3(B) to 3(D) show cross-sectional views of other embodiments of the present invention.
本発明において半導体材料としては、珪素を含む半導体
のみではなくm−v族、n−IV族の化合物半導体でも
よく、その構造も非単結晶ならば、いわゆるアモルファ
ス、セミアモルファス、多結晶でもよい、またその作製
方法も公知の化学気相反応法でよい。In the present invention, the semiconductor material may be not only a silicon-containing semiconductor but also a m-v group or n-IV group compound semiconductor, and as long as its structure is non-single crystal, it may be so-called amorphous, semi-amorphous, or polycrystalline. Also, the method for producing it may be a known chemical vapor phase reaction method.
V発明の効果」
本発明の光電変換装置は代表的には第1図(D)のよう
な構造を持つ光電変換装置であります。V. Effects of the Invention The photoelectric conversion device of the present invention typically has a structure as shown in Figure 1 (D).
光照射面に対しP型の領域とN型の領域間に発生する電
界方向が平行でありさらに第1の半導体に比べ第2の半
導体のエネルギーバンド巾を0. 5〜2eV広く形成
させたことにより、電極近傍が実質的にWI DE−T
o−NARROW構造となっており十電極への電子、−
電極へのホールの移動を少なくしており高効率の光電変
換装置とすることができた。The direction of the electric field generated between the P-type region and the N-type region is parallel to the light irradiation surface, and the energy band width of the second semiconductor is 0.0% compared to that of the first semiconductor. By forming a wide range of 5 to 2 eV, the vicinity of the electrode is substantially WI DE-T.
It has an o-NARROW structure, and electrons to the ten electrodes, -
The movement of holes to the electrodes was reduced, making it possible to create a highly efficient photoelectric conversion device.
さらに、第2の半導体は窓効果と化学的安定性を有する
為、入射光は効率よく半導体層に導かれてゆき、かつ2
つの電極間のリークをおさえることができた。Furthermore, since the second semiconductor has a window effect and chemical stability, incident light is efficiently guided to the semiconductor layer, and the second semiconductor has a window effect and chemical stability.
We were able to suppress leakage between the two electrodes.
また半導体を非単結晶としたことにより、半導体を加工
しやすくなった。Also, by making the semiconductor non-single crystal, it has become easier to process the semiconductor.
その他の特徴としては、外部取り出し電極を基板上に形
成させたため一基板上の光電変換装置を複数個集積化し
て直、並列接続をすくことができ同一基板上に逆流防止
ダイオードをも同一半導体により作製することができる
。Other features include that the external lead-out electrodes are formed on the substrate, which allows multiple photoelectric conversion devices to be integrated on one substrate and connected in series or parallel, and backflow prevention diodes can also be installed on the same substrate using the same semiconductor. It can be made.
電極が一表面にのみ形成されている為、半導体作製の際
、その熱的ストレスを考慮する必要はない。Since the electrode is formed only on one surface, there is no need to consider thermal stress during semiconductor manufacturing.
構造が極めて簡単であり、また半導体の上、側周辺を窒
化珪素膜により被覆しであるため外部汚染に対する信頼
性にすぐれている。The structure is extremely simple, and since the top and periphery of the semiconductor are covered with a silicon nitride film, it has excellent reliability against external contamination.
第1図は本発明による構造を有する光電変換装置の作製
工程を示す縦断面図である。第2図は第1図(D)のエ
ネルギーバンド図である。
第3図(A)、 (B)、 (C)、 (D)は
本発明の他の実施形態の縦断面図である。
■・・・・・・・・・基板
2・・・・・・・・・第1の非単結晶半導体3・・・・
・・・・・第2の非単結晶半導体4・・・・・・・・・
絶縁膜
図面の浄書(内容に変更なし)
第1図
第
図
手
続
主甫
正
書
(方式)
1、事件の表示
光電変換装置
3、補正をする者
事件との関係FIG. 1 is a longitudinal sectional view showing the manufacturing process of a photoelectric conversion device having a structure according to the present invention. FIG. 2 is an energy band diagram of FIG. 1(D). FIGS. 3A, 3B, 3C, and 3D are vertical sectional views of other embodiments of the present invention. ■...Substrate 2...First non-single crystal semiconductor 3...
...Second non-single crystal semiconductor 4...
Engraving of insulating film drawings (no changes in content) Figure 1 Figure 1 Procedural official document (method) 1. Display photoelectric conversion device 3 of the case, person making the amendment Relationship with the case
Claims (1)
を有し、前記第1の半導体または前記第2の半導体若し
くは前記第1の半導体及び前記第2の半導体中にP型の
領域とN型の領域を有し、前記P型の領域上及び前記N
型の領域上に電極が設けられたことを特徴とする光電変
換装置。 2、特許請求の範囲第1項において、第2の半導体のエ
ネルギーバンド幅が第1の半導体のエネルギーバンド幅
より大きいことを特徴とする光電変換装置。 3、特許請求の範囲第1項において、P型の領域N型の
領域との間には、絶縁物または半絶縁物の領域が設けら
れたことを特徴とする光電変換装置。[Claims] 1. A first semiconductor on a substrate and a second semiconductor on the semiconductor, the first semiconductor or the second semiconductor or the first semiconductor and the second semiconductor. The semiconductor has a P-type region and an N-type region, and the semiconductor has a P-type region and an N-type region, and
A photoelectric conversion device characterized in that an electrode is provided on a region of a mold. 2. A photoelectric conversion device according to claim 1, wherein the energy band width of the second semiconductor is larger than the energy band width of the first semiconductor. 3. A photoelectric conversion device according to claim 1, characterized in that an insulating or semi-insulating region is provided between the P-type region and the N-type region.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63202533A JPH02377A (en) | 1988-08-12 | 1988-08-12 | Photoelectric converting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63202533A JPH02377A (en) | 1988-08-12 | 1988-08-12 | Photoelectric converting device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17147879A Division JPS5696879A (en) | 1979-12-30 | 1979-12-30 | Manufacture of photoelectric converter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02377A true JPH02377A (en) | 1990-01-05 |
JPH0559590B2 JPH0559590B2 (en) | 1993-08-31 |
Family
ID=16459074
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63202533A Granted JPH02377A (en) | 1988-08-12 | 1988-08-12 | Photoelectric converting device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02377A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6531711B2 (en) | 1997-12-26 | 2003-03-11 | Semiconductor Energy Laboratory Co., Ltd. | Photoelectric conversion device and process for producing photoelectric conversion device |
KR100788928B1 (en) * | 2004-04-06 | 2007-12-27 | 한국생명공학연구원 | 2 Peptides for inhibiting mdm2 function |
CN100366695C (en) * | 2003-03-14 | 2008-02-06 | 株式会社槌屋 | Adhesive tape and method of attaching the same |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4109271A (en) * | 1977-05-27 | 1978-08-22 | Rca Corporation | Amorphous silicon-amorphous silicon carbide photovoltaic device |
JPS5477088A (en) * | 1977-12-01 | 1979-06-20 | Toshiba Corp | Semiconductor photo detector |
-
1988
- 1988-08-12 JP JP63202533A patent/JPH02377A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4109271A (en) * | 1977-05-27 | 1978-08-22 | Rca Corporation | Amorphous silicon-amorphous silicon carbide photovoltaic device |
JPS5477088A (en) * | 1977-12-01 | 1979-06-20 | Toshiba Corp | Semiconductor photo detector |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6531711B2 (en) | 1997-12-26 | 2003-03-11 | Semiconductor Energy Laboratory Co., Ltd. | Photoelectric conversion device and process for producing photoelectric conversion device |
CN100366695C (en) * | 2003-03-14 | 2008-02-06 | 株式会社槌屋 | Adhesive tape and method of attaching the same |
KR100788928B1 (en) * | 2004-04-06 | 2007-12-27 | 한국생명공학연구원 | 2 Peptides for inhibiting mdm2 function |
Also Published As
Publication number | Publication date |
---|---|
JPH0559590B2 (en) | 1993-08-31 |
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