JPH0237737B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an image signal decoding device that is paired with an image signal encoding device that compresses and encodes an image signal with high efficiency. Typical of conventional image signal encoding devices
There is a DPCM encoding device. This uses the input image signal S (hereinafter referred to as the reference image signal) to determine the prediction signal x^ of the currently input image signal x (hereinafter referred to as the current image signal), and the prediction error signal e is determined by the difference between x and x^, e=x−x^ (1), and compression encoding is performed by taking advantage of the fact that the prediction error signal e tends to concentrate at small values around 0. . For the current image signal x, the reference image signal S is, for example, 3 pixels a, b,
This will be explained in more detail regarding the case where c is selected. In FIG. 1, the dotted line indicates the main scanning line, along which the image is scanned from left to right. When the right end is reached, scanning continues from the left end along the main scanning line one line below. Image signals are input to the encoding device in scanning order. Various methods can be considered to determine the predicted signal x^ by S=( _a , b, _c ), but the _pixels a, belonging to the reference image signal S, as shown in b, c
It is often determined by a linear combination of k ₁ , k ₂ , and k ₃ are constants called prediction coefficients, and are determined so that the prediction error signal e concentrates on small values around 0. For example, the root mean square value of e <e ² > _AV = < (x-x^) ² > _AV = < (x-k ₁ a-k ₂ b-k ₃ c) ²
> _AV (3) is determined to be small. The prediction error signal e determined in this way is 0 as shown in FIG.
Since it follows the centralized probability distribution P(e), it is compressed and encoded using this. FIG. 3 shows the code length L(e) for the prediction error signal e in conventional DPCM encoding. As shown in FIG. 3, a short code is assigned to a prediction error signal e having a small signal value with a high probability of occurrence, and a long code is assigned to a prediction error signal e having a large signal value having a low probability of occurrence.
When considered in more detail, the occurrence probability distribution of the prediction error signal e is considered to be different depending on the reference image signal S, and is an occurrence probability distribution of P(e|S) for each S. Here P(e|S) is e under condition S
The occurrence probability distribution is different for each S.
P(e) in Fig. 2 explained earlier is expressed as P(e|S)
P(e)= 〓 ^S P(e|S)P(S) (4). Here, P(S) is the probability of occurrence of the reference image signal S, and 〓 ^S means the sum of all S. Equation (4) expresses P(e|S) for each S as S
It shows that P(e) is weighted and averaged by the probability of occurrence of . Let's explain the difference between P(e|S) and P(e) using a specific example. Reference image signal S
consists of three pixels (a, b, c) in FIG. 1, and the image signal has 16 values from 0 to 15 (4 bits/pixel).
Let us assume that the prediction coefficients k ₁ , k ₂ , and k ₃ are chosen to be 0.7, 0.2, and 0.1. When S is S ₁ =(8, 8, 8), the predicted signal is x^=0.7×8+0.2×8+0.1×8=8 (6). When S=S ₁ , 3 around the current image signal x
Pixels a, b, and c are all 8, and x is considered to be in the flat part of the image, and x is very often 8 and 7 or 6 close to it. Therefore, S=
When S ₁ , the occurrence probability distribution P(e|
S ₁ ) has a sharp distribution that mostly concentrates on 0 and ±1 as shown in Figure 4. On the other hand, when S is S ₂ =(8, 11, 5) (7), the predicted signal is x^=0.7×8+0.2×11+0.1×5=8 (8). However, the calculation results were rounded off to the nearest whole decimal point. When S=S ₂ , the signal values of the three surrounding pixels a, b, and c of x change significantly to 11, 8, and 5, and x is considered to be at the edge of the image. At this time, it is thought that x often takes a signal value between 11 and 5 (e is +3 to -3), but there is no signal value that occurs with a particularly high probability. Therefore, when S=S ₂ , the occurrence probability distribution P(e|S ₂ ) of the prediction error signal e becomes a wide and gentle distribution as shown in FIG. Like this P
The type of (e|S) varies greatly depending on S. P(e
|S) is weighted averaged by P(S),
So to speak, the average P(e|S) is P as shown in Figure 2.
(e). Therefore, P(e) is less than P(e|S ₁ ),
Although the distribution is gentle, it is sharper than P(e|S ₂ ). In conventional DPCM encoding, e is encoded assuming that the occurrence probability distribution of e is P(e), and the fact that the occurrence probability distribution of e changes depending on S as described above is not taken into consideration at all. I haven't put it in. Therefore, S
Depending on the code length L(e) given in Fig.
However, it is often not appropriate and has the drawback of low compression ratio. An object of the present invention is to provide an image signal decoding device that can be paired with an image signal encoding device that has a high compression rate and eliminates such drawbacks. According to the present invention, the already input image signal S
The predicted signal of the currently input multilevel image signal x′ is calculated using
A prediction error signal e′ of x^′, mode signal M for e using means for inputting the decoded signal and the already decoded image signal S.
means for generating e, means for decompressing and decoding the compressed code of e using M to obtain e, means for generating a prediction signal x^ for the predictive decoded signal x of e using S, and predicting e. Decode the predicted decoded signal x
An image signal decoding device having means for outputting is obtained. By using the present invention, it is possible to efficiently decode an encoded image signal output from an image signal encoding device that encodes an image signal. Hereinafter, the present invention will be explained in detail using the drawings.
The image signal has 16 values from 0 to 15 (4 bits/pixel), and the reference image signal S consists of three pixels a, b, and c in FIG. 1 as an example. First, an encoding device paired with the first embodiment of the present invention will be described. FIG. 6 is an example of a block diagram of an encoding device that is paired with the first embodiment of the decoding device of the present invention. In FIG. 6, an image signal (4 bits/image) is sequentially input to a 4(l+2) bit shift register 1. Here l
is the number of pixels per main scanning line, and the shift register 1 stores image signals of 1 line + 2 pixels. The pixel that has just been input to shift register 1 is x, the one that was input immediately before is a,
The one inputted before the (l-1) pixel is c, and the one inputted one pixel, that is, one line before, is b. The predicted signal generator 2 inputs the reference image signal S=(a, b, c) through the shift register 1, and generates the predicted signal x^ of x by linear operation of a, b, c, as shown in equation (2), for example. Create and output. The subtracter 3 inputs x^ from the predicted signal generator 2 and x from the shift register 1, calculates and outputs a difference signal (see equation (1)) therefrom. This is the prediction error signal e of x. The mode signal generator 4 inputs the reference image signal S=(a, b, c) from the shift register 1 and outputs the mode signal M. The mode signal M takes two values, 0 and 1. M=0 indicates that the prediction error signal e is concentrated at 0, and M=1 indicates that the prediction error signal e is concentrated at 0. . As already explained in detail, e has its occurrence probability distribution P(e|S) depending on S.
are very different. Therefore, as S=S ₁ , P(e|
Type those where S) is sharply concentrated at 0, conversely S
= S ₂ If P(e|S) shows a gentle mountain shape, it is named a type, and S is classified into type and type. That is, the type has a high zero concentration of P(e|S), and the type has a low concentration. The mode signal generator 4 generates M=0 for type S and M=1 for type S according to this classification, and applies them to the prediction error signal encoding circuit 5. The prediction error signal encoding circuit 5 operates differently depending on the signal value of M. That is, when M=0, the prediction error signal encoding circuit 5 generates the prediction error signal e when S is the type.
(hereinafter referred to as type e), and when M=1, a code that matches the prediction error signal e when S is type (hereinafter referred to as type e) is generated. The occurrence probability distribution of type e is given by P(e|S) and the occurrence probability of S P(S), P〓(e)= 〓 ^S 〓P(e|S)P(S) (9) is given by Here, 〓 ^S 〓 means the summation for type S. P〓(e) is 0 as P(e｜S ₁ )
Since it is an average of the type of distribution that sharply concentrates on , it is also a distribution that sharply concentrates on 0 as shown in Figure 7. When M=0, the prediction error signal encoding circuit 5 generates a distribution in which e is sharply concentrated at 0.
Using the fact that P〓(e) is followed, this is compressed and encoded using the code F〓(e). Figure 8 shows the length L〓(e) of the symbol F〓(e). L〓(e) is 0 with a very high probability of occurrence
And for e that is very close to it, it is very short, and for e that is far from 0 and has a very close probability of occurrence,
It's very long. On the other hand, the occurrence probability distribution of type e is P(e
|S) and the occurrence probability distribution P(S) of S, it can be considered as P〓(e)= ^〓S〓P (e|S)P(S) (10). Here 〓 ^S 〓 means the sum of types S. Since P〓(e) is the average of a gentle mountain-shaped distribution centered on 0, like P(e|S ₂ ), it is also the 9th
As shown in the figure, it is a gentle mountain-shaped distribution centered on 0. When M=1, the prediction error signal encoding circuit 5 takes advantage of the fact that the type e follows a gentle mountain-shaped distribution P〓(e) centered on 0, and converts it into a code F〓(e). and compression-encodes it. Fig. 10 shows the length L〓(e) of the symbol F〓(e). L〓(e) is relatively short for 0, which has a relatively high probability of occurrence, and e around it, and is relatively long for e, which is far from 0, which has a relatively low probability of occurrence. As can be seen by comparing Figures 8 and 10, L〓(e) is smaller than L〓(e), and e around 0
For e which is longer away from 0 than for
shorter. The features of the present invention are as follows:
For each type e, the appropriate sign F〓
(e), F〓(e) is allocated to increase the efficiency of compression encoding. In conventional DPCM encoding, the code length L
(e) (see Figure 3) is L〓(e) (see Figure 8) and L〓(e)
(See Figure 10). Code length L(e)
Although it does not exactly match either type e or type e, it is set so that it does not deviate too much from both. In contrast, in the present invention, type e
For type e, L〓(e)
Since the code length is set to match the occurrence probability distribution of each e, it is more efficient than conventional DPCM encoding. In the end, the prediction error signal encoding circuit 5 has M=0
When M=1, the sign F〓(e) is
Select the output code F(e). FIGS. 11, 12, and 13 are block diagrams showing specific examples of the configuration of each predicted signal generator 2. The predicted signal generator shown in FIG. 11 is a linear predicted signal generator corresponding to equation (2). In FIG. 11, multipliers 6, 7, and 8 multiply a, b, and c by prediction coefficients k ₁ , k ₂ , and k ₃ , and the sum of the multiplication results is calculated by adder 9 and x^ is output as
The prediction signal generator shown in FIG. 12 changes the prediction coefficients k ₁ , k ₂ , k ₃ depending on the signal value of M. This is because the appropriate prediction coefficients k ₁ , k ₂ , and k ₃ are considered to be different between the flat part of an image where M=0 and the edge part of an image where M=1. Using prediction coefficients that change in this way is expected to make predictions more accurate and improve coding efficiency. 1st
In FIG. 2, the selection circuits 10, 12, and 14 select prediction coefficients k ₁₁ , k ₂₁ , and k 31 when M=0, and select prediction coefficients k ₁₂ , k ₂₂ , and _{k 32 when} M=1. Multipliers 11, 13, and 15 multiply a, b, and c by the selected prediction coefficient. Adder 16 calculates the sum of these multiplication results and outputs it as x^. The predicted signal generator shown in FIG. 13 is a method in which the predicted signal x^ for each reference image signal S=(a, b, c) is stored in the ROM. As mentioned above, the method of determining x^ by linear operation of a, b, and c is simple and is often used, but the resulting x^ is not necessarily the optimal one when considered for each S. Not necessarily. Let's consider the reasons below. Prediction coefficient
k ₁ , k ₂ , and k ₃ are determined, for example, by equation (3) so that the mean square prediction error is minimized. Equation (3) can be considered as follows. <e ² > _AV = <(x-x^) ² > _AV = 〓 ^S 〓 ^X P(x, S) (x-x^) ² = 〓 ^S 〓 ^X P(S) P(x | S) ( x−x^) ² = 〓 ^S P(S) { 〓 ^X P(x|S ⁾ (x−x^) ² }= 〓 ^S P(S){ 〓 ₁ a−k ₂ b−k ₃ c) ² } (11) Here, P(S) is the probability of occurrence of the reference image signal S, P(x|S), when the reference image signal is S, the current image signal is This is the conditional probability that x will occur. Equation (4), i.e.
In equation (11), the mean square prediction error over all S is considered. By the way, the mean square prediction error <e ² _S > _AV for each S is different from this, and is as follows: <e ² _S > _AV = <(X _S −x^ _S ) ² > _AV = 〓 〓 ^X P(x| S)(x-x^) ² =ΣP(x|S)(x-k _1S a
−k _2S b−K _3S c) ² (12) is given. In equation (12), the subscript S added to e, x, x^, k ₁ , k ₂ , k ₃ is especially when the reference image signal is S, e, x, x, k ₁ , k ₂ , k ₃ . If the prediction coefficients _{k 1S} ^, k _2S , k _3S are determined for each S so that <e _S 2 > _AV is minimized, the mean square prediction error for all S is <e ² > _AV = ΣP( S) <e _S ² > _AV (13) is given by. Obviously, <e ² > _AV in (13) is smaller than <e ² > _AV in (11). However, in (11), the prediction coefficients k ₁ , k ₂ , k ₃
was constant regardless of S, but in (14) it is necessary to give different prediction coefficients k ₁ , k ₂ , k ₃ for each S. That is, the prediction coefficients k ₁ , k ₂ , k ₃ for each S
need to be memorized and prepared. This is the same as storing and preparing a prediction signal x for each S. And in many cases ＜e _2S ＞ _A in (12)
The x^ _S that minimizes _V is the same as the x that occurs with the highest probability in each S. FIG. 13 shows the configuration of a predicted signal generator using this method. In Figure 13,
The ROM 17 inputs the reference image signal S=(a, b, c) as an address signal, and outputs the contents of the memory at the corresponding address as a prediction signal x^. The image signal is 16 values (4 bits), the reference image signal S is 3 pixels a,
When consisting of B and C, the ROM 17 has a 12-bit address and a 4-bit output. The configuration shown in FIG. 13 requires a ROM, but as explained in detail above, the prediction accuracy is higher than the configurations shown in FIGS. 11 and 12. FIG. 14, FIG. 15, and FIG. 16 are block diagrams showing the configuration of the mode signal generator 4, and although various types are possible, three specific examples are shown. The mode signal generator in FIG. 14 calculates the degree of change in the image signal within the reference image signal S=(a, b, c) by Σ=(a-b) ² +(b-c) ² +(c -a) ² (14) Measured by the sum Σ of the square of the difference between = 0, and when it is large, M = 1. When the change in the image signal within S is small, it is considered to be a flat part of the image, and prediction is likely to be accurate, and P(e|S) often has a sharp type of distribution, so M=0. When the change in the image signal is large within S, it is considered to be at the edge of the image, and the prediction is difficult to predict.
Since (e|S) often has a gentle mountain-type distribution, M=1. In FIG. 14, subtracters 18, 19, 20 are a-b, b-c, c
-a is subtracted, and the multiplication circuits 21, 22, 23
are the respective squares (a-b) ² , (b-c) ² , (c
-a) Calculate ² and add it to the adder circuit 24. The adder circuit 24 calculates their sum Σ and adds it to the threshold circuit 25. The threshold circuit 25 outputs a mode signal M in which M=0 when the sum Σ is smaller than the threshold Θ, and M=1 when it is larger. The mode signal generator in FIG. 15 calculates the degree of change in the image signal within the reference image signal S=(a, b, c) by D _nax =Max{(a-b) ² , (b-c) ² , (c-a) ² }
(17) and the maximum value of the square of the difference between the image signal in the reference image signal
Measured by D _nax , M = 0: D _nax < Θ (18) M = 1: D _nax Θ (19) When D _nax is smaller than a certain threshold Θ, M = 0, and when it is larger, M = 1. . In FIG. 15, the subtraction circuits 26, 27, 28 are a-b, b-c, c
-a is subtracted, and the multiplication circuits 29, 30, 31
are the respective squares (a-b) ² , (b-c) ² , (c
-a) Calculate ² and add it to the maximum value detection circuit 32.
The maximum value detection circuit 32 detects (a-b) ² , (b-c) ² ,
(c-a) Detect the maximum value D _nax of ² and add it to the threshold circuit 33. The threshold circuit 33 outputs a mode signal of M=0 when D _nax is smaller than the threshold value Θ, and outputs a mode signal of M=1 when D nax is larger. The mode signal generator in FIG. 16 calculates the accuracy of prediction for each reference image signal S=(a, b, c),
The difficulty of hitting is stored in the ROM and output as a mode signal M. When the prediction is easy to come true, M=
0, when it is difficult to hit, M=1. In Figure 16
The ROM 34 stores the reference image signal S=(a, b, c)
is input as an address signal, and the contents of the memory at the corresponding address are output as a mode signal M.
When the image signal is 16 values (4 bits) and the reference image signal S consists of 3 images a, b, and c, the ROM 34 is at address 12.
bit, output 1 bit. Although the configuration shown in FIG. 16 requires a ROM, it has the advantage that the criterion for accuracy of prediction can be set arbitrarily. For example, the mean square prediction error <e ² _S > _AV = ΣP(e|S) e ² (20) found for each reference image signal S can be used as the standard. Here, the subscript S of e _S specifically indicates e when the reference image signal is S. At this time, the mode signal M is as follows: M = 0: <e ² _S > _AV < Θ (21) M = 1: <e ² _S > _AV Θ (22) When <e ² _S > _AV is smaller than a certain value Θ Set it as 0, and set it as 1 when it is large. Further, the probability P(o|S) that the prediction error signal becomes 0 when the reference image signal is S can be used as a standard. At this time, the mode signal M is as follows: M=0:P(o|S)Θ (23) M=1:P(o|S)<Θ (24) and P(o|S) is larger than a certain value Θ Time 0,
Set to 1 when it is small. No matter what other criteria are used to determine the accuracy of the prediction, each S
It is only necessary to write the signal value of M for the ROM into the ROM 34. Of course, M can also be determined by comparing Σ, D _Max , and Θ as in the configurations shown in FIGS. 14 and 15. Each S in each configuration
All you have to do is write M determined for each case in the ROM 34. FIG. 17 is a block diagram showing an example of the prediction error signal encoding circuit 5 of FIG. 6. Image signal is 0
From 15 to 16 values. In Figure 17, code ROM3
7 inputs the mode signal M and prediction error signal e as address signals A ₆ to A ₀ , and when M=0, (A ₆ =0), the sign F〓(e) for type e is set to M=1 (A ₆ =
1) For type e, F〓(e) is Q ₁₀ ~ _{Q 0}
Output to. This is applied to the parallel data input terminals D ₁₀ to _{D 0} of the shift register 39. code length
The ROM 38 inputs the mode signal M and the prediction error signal e as address signals B ₆ to B ₀ , and M=0 (B ₆ =
0), the length L of code F〓(e)〓 is the two's complement of (e) M
=1 (B ₆ =1), the two's complement of the length L〓(e) of the mark F〓(e) is output to P ₃ to P ₀ . This is applied to the initial value setting terminals C ₃ to C ₀ of the counter 40. The shift register 39 has parallel data input terminals D ₁₀ to _{D 0}
The code F(e) input into (F〓(e) when M=0, M=
1, F〓(e)) from the serial data output terminal SO
Output one after another in the order of D ₁₀ to D ₀ . At this time, the counter 40 calculates the length L(e) of the code F(e) (when M=0
L〓(e), when M=1, L〓(e)) is counted, and when the shift register 39 outputs the sign from SO for L(e) bits, the shift operation is stopped there and the next Input code data from the parallel data input terminal. Code ROM3 from Table 1 to Table 4
7. An example of the contents of the code length ROM is shown below. Tables 1 and 2 are for M=0 (A ₆ =0),
Tables 3 and 4 are for M=1 (A ₆ =1). The code ROM 37 has 11-bit output data terminals Q ₁₀ to Q ₀ . The number of bits at the output data terminal of the code ROM 37 is determined by the longest code length of F(e). When the length of the code F(e) is shorter than the maximum code length of 11 bits, the code F(e) is changed in order from Q ₁₀ to Q ₀ .
(e) is stored. For example, in Table 1, when the ROM address is 2, the code ROM output data is 1101, which means Q ₁₀ = 1, Q ₉ = 1, Q ₈ = 0, Q ₇ =
It means 1 and Q ₆ to Q ₀ are empty and can store anything. In the ROM address column, values are shown in decimal notation when _A5 to _A0 (same as _B5 to _E0 ) are considered as binary numbers with _A5 as MSB and _A0 as LSB. When the ROM address is 1, the prediction error signal e is a negative number A ₅ ~
A ₀ represents a negative number e in two's complement representation. for example
When the ROM address is -2, it is A ₅ to A ₀ (111110) ₂ . The code length ROM output data field shows the code length.
Output data P ₃ to _{P 0} of the ROM 38 are described. P ₃ to _{P 0} is the code length L(e) (L〓(e) when M=0, when M=1
It is the two's complement of L〓(e)). When taking two's complement,
P ₃ to _{P 0} are set to 2, where P ₃ is the MSB (sign bit) and P ₀ is the LSB.
Think of it as a base number. _P3 in the code length ROM output data field
~ _P0 is considered to be a binary number without a sign bit, with _P3 being the MSB and Po being the LSB, and is expressed in decimal notation. for example,
13 indicates P ₃ to P ₀ = (1101) ₂ . The code length L(e)(M
When =0, L〓(e), when M=1, L〓(e)) is shown in decimal notation.

【table】

【table】

【table】

【table】

【table】

[Table] Figures 18 and 19 are the codes of Tables 1 to 4.
This is a code tree used to determine the contents of the ROM 37 and code length ROM 38. FIGS. 18 and 19 are code trees for the code F〓(e) for M=0 and the code F〓(e) for M=1, respectively. At each branch point on the code tree, a code 1 is given when branching upward, and a code 0 is given when branching downward. There are 31 terminal ends of the code tree, each with a prediction error signal e (+15 to -15)
corresponds to The corresponding signal value of e is written in <> at the end of the code tree, followed by the code F(e) (18th
In the figure, the code F〓(e) for M=0 is shown, and in FIG. 19, the code F〓(e)) for M=1 is shown. The numbers circled on the branches will be explained later. Code tree for M=0 (Figure 18),
As can be seen by comparing the code table (Tables 1 and 2), the code tree for M=1 (Figure 19), and the code table (Tables 3 and 4), the code of type (M=0)
F〓(e) code length L〓(e) is the code of type (M=1)
Compared to the code length L〓(e) of F〓(e), for e around 0,
For e that is shorter and farther from 0, it is set longer. The operation of the prediction error signal encoding circuit shown in FIG. 17 will be explained in detail using the time chart shown in FIG. 20. Each signal name written on the left in Fig. 20 is
This corresponds to the signal name given to each signal line in Figure 7. However, since the corresponding signal lines for t, L(e), and COUT are not shown in FIG. 17, they will be explained. t is a time noted for the convenience of the following explanation, and is increased by 1 when the CLK signal generates one pulse. L(e) is the code length of signal F(e),
P ₃ to _{P 0} are two's complement numbers of L(e). COUT
indicates the contents of the counter 40, and the initial value is P ₃ to _{P 0}
is given by The operation of the prediction error signal encoding circuit shown in FIG. 17 will be explained below using the time chart shown in FIG. When the STAT signal is applied at time 0, the prediction error signal encoding circuit starts operating. First, the counter 40 is cleared by the STAT signal. At time 1, the pulse generator 35 generates a pulse signal DSTA and ORs it at the falling edge of the STAT signal.
Add to circuit 36. The OR circuit 36 passes the DSTA signal and outputs it as an RQST signal. The shift register 1 in FIG. 6 performs a shift operation based on the CLK signal when the RQST signal is H, and inputs the first current image signal x. Accordingly, the 6th
The predicted signal generator 2 and mode signal generator 4 shown in the figure generate a predicted signal x^ and a mode signal M for the first current image signal x. However, shift register 1
The content of is cleared to 0 before the first x is input. Then, the prediction error signal e for the first x is calculated from x and x^ by the subtracter 3, and the code ROM of this prediction error signal encoding circuit is
Address signal A ₅ to _{A 0} to 37 (code length ROM 38)
(B ₅ to _{B 0} ). The mode signal M is applied to the code ROM 37 (code length ROM 38) as an address signal A ₆ (B ₆ ). In the case of the time chart in FIG. 20, the first e is 1 and M is 0. The code ROM 37 has address signals M=0, e=
1 (A ₆ =0, A ₅ to _{A 0} =1), the first code F(e) is output to Q ₁₀ to _{Q 8} as (101) ₂ (see Table 1). The code length ROM 38 uses the address signal M=
0, e=1 (B ₆ = 0, B ₅ to _{B 0} = 1), the code length L(e) for the first code F(e) is the one's complement of 3 (see Table 1). ) is output. This is set in the counter 40 as an initial value. This set operation is performed at the end of the time when the RQST signal (H) is applied to the LD terminal of the counter 40. Therefore, at time 2, the contents of the counter 40
COUT changes from 0 to 13. The shift register 39 loads the outputs Q ₁₀ to Q ₀ of the code ROM 37 via parallel data input terminals D ₁₀ to _{D 0} .
This loading operation is performed at the end of the time when the RQST signal (H) is applied to the LD terminal of the shift register 39. Therefore, the output signal SO of the shift register 39 at time 2 is Q ₁₀ =1 at time 1.
is equal to Shift register 39 at times 3 and 4
performs a shift operation using the CLK signal and outputs codes 0 and 1 sequentially from the SO terminal. At this time, the counter 40 performs a count-up operation in response to the CLK signal, and its content COUT changes to 14, 15. 4
At time 4, the bit counter 40 generates a CARY signal when its content becomes COUT=(15) ₁₀ .
Detect completion of output of the first code F(e). The CARY signal passes through the OR circuit 36 and becomes the RQST signal, which is applied to the shift register 1 in FIG. Shift register 1 performs a shift operation when the RQST signal becomes H, and transfers the second current image signal x.
Enter. Accordingly, the prediction signal generator 2 and mode signal generator 4 in FIG. 6 generate a prediction signal x^ and a mode signal M for the second current image signal x. Then, the prediction error signal e for the second x is calculated by the subtracter 3 and applied to the prediction error signal encoding circuit shown in FIG. The following is added to this prediction error signal encoding circuit. Hereinafter, this prediction error signal encoding circuit generates the first prediction error signal e.
Perform the same operation as for . In the time chart of FIG. 20, the second prediction error signal e is zero. At time 4, code ROM37
outputs the code F(e)=(0) ₂ (Q ₁₀ =0), and the code length is
The ROM 38 outputs the one's complement (15) ₁₀ of L(e).
Then, at time 5, the shift register 39
The code F(e) = (0) ₂ (length of 1 bit) is output from the SO terminal. At time 5, the counter 40 is
When the one's complement number (15) ₁₀ of L(e) is loaded from the code length ROM 38, a CARY signal is immediately generated.
The CARY signal passes through the OR circuit 36 and becomes the RQST signal, which requests the shift register 1 of FIG. 6 to perform a shift operation and input the third current image signal x. The prediction error signal of FIG. 17 repeats the same operation thereafter in accordance with the time chart of FIG. 20. Note that the x mark on the time chart indicates that the signal value is indefinite or may be any value. This concludes the description of the encoding device that is paired with the first embodiment. Next, an encoding device paired with the second embodiment of the present invention will be described. FIG. 21 is a block diagram showing an encoding device paired with the second embodiment of the present invention.
The following explanation will be given assuming that the image signal consists of 16 values from 0 to 15, and the reference image signal consists of the three pixels a, b, and c shown in FIG. 1, similar to the encoding device paired with the first embodiment. In FIG. 21, the subtracter 41 uses the current image signal x
(0 to 15) and its predicted signal x^ (0 to 15) (see formula (1)), and the prediction error signal e (+15 to -15) is calculated.
Output as . The quantizer 42 generates a prediction error signal e
(+15 to -15) 5 bits are quantized and converted into a signal y that can be expressed with 5 bits or less. The adder 45 adds the quantized prediction error signal y and the prediction signal x^ to create a locally decoded signal x'. Local decoded signal x' is shown as shift register 48. 48 is 4(l+
2) It is a bit shift register. Here, l is the number of pixels per main scanning line. The local decoded signal x′, which has just been input to the shift register 48,
The locally decoded signal input just before that is a′, (l−
1) The local decoded signal input before the pixel is c', and the local decode signal input one pixel before, that is, one line before, is b'. The predicted signal generator 43 inputs the local decoded signals a', b', c' from the shift register 44, and outputs the predicted signal x^ of x based on the locally decoded signals a', b', c'. The configuration of the predicted signal generator 43 in FIG. 21 is similar to the predicted signal generator 2 in FIG. 6 in the encoding device paired with the first embodiment (see FIGS. 11 to 13). Conceivable. The mode signal generator 47 receives local decoded signals a', b', c' from the shift register 47 and outputs a mode signal M based thereon. The configuration of the mode signal generator 47 in FIG. 21 is similar to the mode signal generator 4 in FIG. 6 in the encoding device paired with the first embodiment (see FIGS. 14 to 16). Conceivable. The prediction error signal encoding circuit 48 compresses and encodes the quantized prediction error signal y and outputs it as a code F(y). At this time, the prediction error signal encoding circuit 48 performs different operations when M=0 and M=1. That is, when M=0, the matching code F〓
(y), when M=1, the appropriate sign F〓
(y) is selected and output as F(y). The configuration of the prediction error signal encoding circuit 46 in FIG. 21 is considered to be similar to the prediction error signal encoding circuit 5 in FIG. 6 in the encoding device paired with the first embodiment (see FIG. 17). It will be done. FIG. 23 is a block diagram showing an example of the quantization characteristics of the prediction error signal quantization circuit 42. In FIG. 23, the horizontal axis shows the input prediction error signal e, and the vertical axis shows the output quantized prediction error signal y. In FIG. 23, a black circle at a break point of the quantization characteristic indicates that the quantization characteristic curve passes through that break point, and a white circle indicates that the quantization characteristic curve does not pass through that break point. According to this quantization characteristic +
e takes 31 values from 15 to -15, +15, +8,
It is converted to y, which takes on five values: 0, -8, and -15. y, which takes on 5 different values, can be expressed using 3 bits. This quantization circuit is a circuit that converts 5 bits e into y that can be expressed in 3 bits. The encoding device paired with the second embodiment differs from the encoding device paired with the first embodiment in that a prediction error signal quantization circuit 42 is present. The encoding device paired with the second embodiment coarsely quantizes the prediction error signal e into y and compresses and encodes it, so the encoding efficiency is higher than that of the encoding device paired with the first embodiment. get well. However, the locally decoded signal x' differs from x due to quantization noise (the quantization circuit causes y to be a value slightly deviated from e. This is the amount of deviation). In the decoding device of the second embodiment of the present invention, only x' is obtained as the decoded signal, so the image signal x
is not completely decoded and is a slightly different image signal.
The drawback is that you can only get x′. In contrast, the decoding apparatus according to the first embodiment of the present invention can obtain exactly the same decoded signal as the image signal x. This concludes the description of the encoding device that is paired with the second embodiment. In the above, the mode signal M is a binary signal in the encoding device paired with the first and second embodiments, but
It is also possible to use a 3-value, 4-value, or more multi-value signal. Then, the prediction error signal e (quantized prediction error signal y) can be encoded after being classified into 3, 4, or more, and the probability of occurrence for e(y) classified into each type is If the code ratio is adjusted to match the distribution, the encoding efficiency can be further improved. In addition, in the encoding device paired with the first and second embodiments, the reference image signal S is made up of three pixels a, b, and c, but it can be increased to four pixels, five pixels, or even more for prediction. You can make it easier. Further, although the image signal has always been described as having 16 values (4 bits) from 0 to 15, an encoding device paired with a decoding device for image signals having other numbers of levels can be constructed in the same manner. Furthermore, in the encoding device paired with the first and second embodiments, the prediction error signal e (quantization error signal y)
The difference signal between the current image signal x and its predicted signal x^ (see equation (1)) was used as the prediction error signal e, and the ranking of the accuracy of the prediction was used as the prediction error signal e (Technical Research Report of the Institute of Electronics and Communication Engineers, CS79). −176, Mizuno et al. “Coding of halftone facsimile signals”). This concludes the description of the encoding device that is paired with the decoding device of the present invention. Next, the decoding device of the present invention will be explained. First, a first example will be described. FIG. 24 is an example of a block diagram of the decoding device of the first embodiment. The encoding device paired with this is shown in FIG. As with the encoding device,
The following description will be made assuming that the image signal consists of 16 values (4 bits per pixel) and the reference image signal consists of 3 pixels a, b, and c shown in FIG. In Fig. 24, the output F(e) of the encoding device
is input and added to the prediction error signal decoding circuit 51. The prediction error signal decoding circuit 51 is a pair with the prediction error signal encoding circuit 5 of the encoding apparatus shown in FIG. The mode signal generator 49 is exactly the same as the mode signal generator 4 of the encoding apparatus shown in FIG. 6, and generates a mode signal M by inputting already decoded image signals a, b, and c. Mode signal M is applied to prediction error signal decoding circuit 51. The mode signal M is F when M=0 to the prediction error signal decoding circuit 51.
(e) is the sign F for the prediction error signal e of type
(e), and when M=1, F(e) is the sign F〓(e) for the prediction error signal of type e. The prediction error signal decoding circuit 51 determines and decodes F(e) as F〓(e) when M=0 and F〓(e) when M=1, and outputs it as a prediction error signal e. The predicted signal generator 50 is exactly the same as the predicted signal generator 2 of the encoding device shown in FIG.
Print x^. The addition circuit 52 is paired with the subtraction circuit 3 of the encoding device shown in FIG. 6, and inputs the prediction signal x and the prediction error signal e, performs the addition of x=x^+e (25), and generates a decoded image. Output signal x.
The 4(l+2) bit shift register 53 is exactly the same as the shift register 1 in FIG.
The shift register 53 sequentially receives the decoded image signals from the adder circuit 52 and stores them. The shift register 53 stores decoded image signals for 1 line + 2 pixels, and from this the reference image signals a, b,
c is extracted and applied to the mode signal generator 49 and prediction signal generator 50. FIG. 25 is a block diagram showing an example of the prediction error signal decoding circuit 51 of FIG. 24. The image signal had 16 values from 0 to 15. Register 56 in Figure 25
inputs the mode signal M and code F(e) from input terminals D ₆ and D ₅ and outputs from output terminals P ₆ and P ₅ . Decryption
The ROM 58 outputs the mode signal M and the code F(e) as the address signals A ₆ and A ₅ to the output terminals P _{6 and 5} of the register 56, respectively.
Enter from _P5 . The decoding ROM 58 further outputs the address signals A ₄ to A ₀ to the output terminal P ₄ of the register 57.
Input from P ₀ . The decoding ROM 58 outputs data from output terminals _Q6 to _Q0 based on address signals _A6 to _A0 . If the signal applied to the input terminal _A5 is the last bit of a certain code F(e), the output data _Q6 (DETC) will be at H level,
This indicates that one code F(e) has been detected. At this time, output data Q ₅ to Q ₀ indicate the expanded decoded signal e of code F(e), and are set in the register 60. if,
If the signal applied to input terminal A ₅ is not the last bit of code F(e), output data Q ₅ (DETC) will be low.
The level and symbol F(e) indicate that it has not been detected yet. The output data Q ₄ to Q ₀ at this time are set in the register 57 and become the next address signals A ₄ to A ₀ of the decoding ROM 58. At the next time, the decoding ROM 58 inputs a new mode signal M and code F(e) from the register 56 as address signals A ₆ and A ₅ , and also inputs new address signals A ₄ to A _0.
is input from the register 57. This operation is repeated to detect the code F(e), and the decoding
When the ROM 58 detects the last bit of the code F(e), it outputs an H level output signal from _Q6 . At this time, the decoding ROM 58 outputs an expanded decoded signal e of code F(e) from _Q5 to _Q0 . e is set in register 60 and output. FIG. 26 shows an example of a time chart of the prediction error signal encoding circuit of FIG. 25. The operation of the prediction error signal decoding circuit shown in FIG. 25 will be specifically explained in detail using the time chart shown in FIG. 26. Second
Each signal name written on the left side in FIG. 6 corresponds to the signal name of each signal line in FIG. 25. However, t is a time noted for the convenience of the following explanation, and is increased by 1 when the CLK signal generates one pulse. 25 using the time chart in Figure 26 below.
The operation of the prediction error signal decoding circuit shown in the figure will be explained.
When the STAT signal is applied at time 0, the prediction error signal encoding circuit starts operating. Pulse generator 5
4 generates the DSTA signal at the falling edge of the STAT signal.
Add to OR circuit 55. The OR circuit 55 passes this signal and adds it to the register 57 as a CLEA signal. Register 57 is cleared by the CLEA signal. Starting from time 0, a new mode signal M and code F(e) are successively set in the register 56 one after another at each time by the CLK signal. At time 0, M is O, F(e)
are 1, and these are the address signals A ₆ ,
It is added to the decoding ROM 58 as _A5 . At time 1, the register 57 is cleared by the CLEA signal, and P ₄ to P ₀ are zero. These are address signals
They are added to the decoding ROM 58 as A ₄ to A ₀ . The decoding ROM 58 receives the address signal A ₆ = at time 1.
0, A ₅ = 1, A ₄ ~ _{A 0} = 0, Q ₆ (DETC) =
0 (L level), outputs Q ₅ to Q ₀ =1. DETC
The signal L level indicates that F(e)=1 at time 0 is not the final bit of code F(e). In the time chart of Fig. 26, A ₄ to _{A 0} and Q ₅ to _{Q 0} are A ₄ , respectively.
It is shown as a binary number with Q ₅ as the most significant bit (MSB) and A ₀ and Q ₀ as the least significant bit (LSB).
However, the display uses decimal representation. Q ₅ -Q ₀ =1, that is, Q ₄ -Q ₀ =1, is set in the register 57 by the CLK signal, and is applied to the decoding ROM 58 as address signals A ₄ to A ₀ at time 2. At time 2, the decoding ROM 58 sends a new mode signal M=0 and code F(e)=0 as an address signal.
Input from the register 56 as A ₆ and A ₅ . Further, address signals A ₄ to _{A 0} =1 are input from the register 57, Q ₆ (DETC) = 0 (L level), Q ₅ to _{Q 0} =
Outputs 3. DETC signal L level is F at time 1
Indicates that it is not the final bit of (e). Q ₅ ~Q ₀ = 3
That is, Q ₄ to _{Q 0} =3 are set in the register 57 by the CLK signal, and are added to the decoding ROM 58 as address signals A ₄ to A ₀ at time 3. At time 3, the decoding ROM 58 outputs a new mode signal M=
0 and code F(e)=1 are input from the register 56 as address signals A ₆ and A ₅ . Further address signal
Input A ₄ to _{A 0} = 3 from register 57, and Q ₆
Outputs (DETC) = 1 (H level) and Q ₅ to _{Q 0} = 1. The DETC signal H level is F(e)=1 at time 2,
This indicates the last bit of a certain code F(e). At this time, Q ₅ to Q ₀ =1 indicates the expanded decoded signal e of the detected code F(e)=101. When the DETC signal becomes H level at a certain time, the pulse signal generator 59 generates the pulse signal SETR at the next time. Therefore, e=Q ₅ -Q ₀ =1 is set in the register 60 by the SETR signal and output from the prediction error signal decoding circuit at time 4. The SETR signal passes through the OR circuit 55 and becomes the CLEA signal. register 57
is cleared by the CLEA signal at time 4. At time 4, the decoding ROM 58 inputs a new mode signal M=0 code F(e)=1 through the register 57. Furthermore, address signals A ₄ to _{A 0} =0 are sent to register 5.
Enter from 7 and continue the same operation. In the time chart of FIG. 26, e represents _R5 to _R0 as a binary number, with _R5 being the most significant bit (MSB) and _R0 being the least significant bit (LSB), and expressed in decimal notation. However, negative numbers are expressed in two's complement representation using the MSB (R ₅ ) as the sign bit. When the DETC signal becomes H, the pulse generator 58 outputs the SETR signal at the next time, and the decompressed decoded signal e of the detected code F(e) is set in the register 60 from the decoding ROM 58. The SETR signal then passes through the OR circuit 56.
It becomes a CLEA signal and clears the register 57.
The prediction error signal decoding circuit continues this operation and outputs prediction error signals e one after another. finally decrypted
Let's explain the contents of ROM58. Tables 5 to 12 show examples of the contents of the decryption ROM 58. Tables 5 to 8 correspond to A ₆ =0, that is, M=0, and Tables 9 to 12 correspond to A ₆ =1.
That is, it corresponds to M=1. Among the tables regarding M=0 (A ₆ =0), Tables 5 and 7 correspond to A ₅ =0, that is, F(e)=0, and Tables 6 and 8 correspond to A ₅ =0.
1, which corresponds to F(e)=1. M=1( _A6 =
Among the tables related to 1), Tables 9 and 11 are A ₅
=0, that is, F(e)=0, and Tables 10 and 12 correspond to A ₅ =1, that is, F(e)=1. In each table, the left column shows _A4 to _A0 , where _A4 is the most significant bit (MSB) and _A0
is considered to be a binary number with the least significant bit (LSB), and is shown in decimal representation.

【table】

【table】

【table】

【table】

【table】

【table】

【table】

【table】

【table】

【table】

[Table] The center column of each table shows Q ₅ to _{Q 0} as a binary number, with Q ₅ being the most significant bit (MSB) and Q ₀ being the least significant bit (LSB), and expressed in decimal notation. be. However, in the case of a negative number, two's complement representation is used with the MSB (Q ₅ ) as the sign bit. The right column of each table is
_Q6 . The contents of the tables regarding M=0 (Tables 5 to 8) are determined from the code tree shown in FIG. M=
The contents of the tables related to 1 (Tables 9 to 12) are as follows.
It is determined from the code tree in Figure 9. In the code trees in Figures 18 and 19, the numbers circled on each branch are
Indicates A ₄ to _{A 0} , and the number (1 or 0) not surrounded by circles on the next branch indicates A ₅ . The numbers surrounded by a circle marked with A ₅ on the same branch as A ₅ are the numbers A ₄ to A 5.
Q ₅ to _{Q 0} corresponding to the address of A ₀ A ₅ are shown. However, if there is no number surrounded by a circle on the branch next to the branch marked A ₄ to A ₀ , that is, when the branch is at the end, the numbers in <> will indicate the corresponding Q ₅ to Q _0. show. And when the branch ends like this, Q ₆ =
1, otherwise Q ₆ =0. All branches are marked with a circle. For example, in Figure 18, the next right branch marked with ◎ is the upper branch marked with the number 1, the numbers 〇, and <〇>.
There is a lower branch marked with . This is M=0 (A ₆ =
0), the decoding ROM 58 sets A ₄ to _{A 0} =0,
If A ₅ = 1, output Q ₅ to Q ₀ = 1, Q ₆ = 0, and A ₄
If ~A ₀ = 0, A ₅ = 0, then Q ₅ ~ _{Q 0} = 0, Q ₆ = 1
means to output. In addition, in FIG. 18, the branches to the right after the number 1 are marked include an upper branch marked with the number 1 and a lower branch marked with the number 0. This is decoded when M = 0 (A ₆ = 0)
If A ₄ ~A ₀ =1, A ₅ =1, then Q ₅ ~
Output Q ₀ = 2, Q ₆ = 0, A ₄ ~A ₀ = 1, A ₅ = 0
This means that Q ₅ to _{Q 0} =3 and Q ₆ =0 are output. In the prediction error decoding operation described in detail above, the output signals _Q4 to _Q0 of the decoding ROM 58 were used as the next address signals _A4 to _A0 .
This corresponds to tracing the code tree from left to right in FIGS. 18 and 19. At this time, when the sign F(e)=1 (A ₅ =1), the upper one is selected as the next right branch, and the image F(e)=
When 0 (A ₅ =0), select the lower one.
If the end of the branch is reached, the decoding result e is output to _Q5 to _Q0 , and _Q6 =0 indicates that one code has been decoded. This concludes the explanation of the prediction error signal decoding circuit shown in FIG. 25. This concludes the description of the first embodiment of the present invention. Next, a description of a second embodiment of the present invention will be given. Second
FIG. 7 is an example of a block diagram of a decoding device according to the second embodiment. This is a pair of the encoding device shown in FIG. In FIG. 27, the encoded quantized prediction error signal F(y) is input to the prediction error signal decoding circuit 61. In FIG. Mode signal generator 62 applies mode signal M to prediction error signal decoding circuit 61 . The mode signal generator 62 is the mode signal generator 4 of FIG. 21 in the encoding device paired with the second embodiment.
It is exactly the same as 7. When M=0, F(y)
is the sign F〓(y) for the type y, and when M=1, F(y) is the sign F〓(y) for the type y.
It is. The prediction error signal decoding circuit 61 receives the mode signal M
, it is determined whether F(y) is F〓(y) or F〓(y) and decoded, and the quantized prediction error signal y
Output. The configuration of the prediction error signal decoding circuit 61 is similar to the prediction error signal decoding circuit 51 of FIG. 24 in the first embodiment (see FIG. 25).
is possible. The adder 65 is a predictive signal generator 6
3, the prediction signal x^ is sent to the quantization error signal decoding circuit 6
The quantized prediction error signal y is inputted from 1, and these signals are added and output as a decoded image signal x'. The configuration of the predicted signal generator 63 is similar to the predicted signal generator 4 in FIG. 21 in the encoding device paired with the second embodiment.
It is exactly the same as 3. The shift register 64
Enter x′. The configuration of the shift register 64 is the second
The shift register 44 in FIG. 21 in the encoding device paired with the embodiment shown in FIG. That is, when the image signal consists of 16 values from 0 to 15, and the reference image signal consists of the three pixels a, b, and c in Fig. 1,
Shift register 64 is a 4(l+2) bit shift register. Here, l is the number of pixels per main scanning line. As shown in FIG. 22, the decoded image signal currently input to the shift register 64 is x', and the decoded image signal input immediately before is
The decoded image signal input before a'(l-1) pixels is c', the decoded image signal input before l pixels, that is, one line before, is b'. The prediction signal generator 63 receives decoded image signals a', b',
It inputs c' and outputs the predicted signal x^ of x based on it. The mode signal generator 62 inputs the decoded image signals a', b', and c' from the shift register 64, and outputs the mode signal M for the code F(y) based thereon. This concludes the description of the second embodiment of the present invention. In the above first and second embodiments, the mode signal M
Although a binary signal is used, it is also possible to use a 3-value, 4-value, or more multi-value signal. Then, in the encoding device paired with this, the prediction error signal e (quantized prediction error signal y) can be encoded after being classified into three, four, or more categories, and the prediction error signal e (quantized prediction error signal y) can be encoded after being classified into three, four, or more types. For e(y),
Encoding efficiency can be further improved if the code ratio is precisely latched. Further, in the first and second embodiments, the reference image signal S is made up of three pixels a, b, and c, but it may be increased to four pixels, five pixels, or more. In this case, the paired encoding device will be able to more accurately predict the prediction, and the encoding efficiency will increase. Furthermore, although the image signal has always been described as having 16 values (4 bits) from 0 to 15, decoding apparatuses for image signals having other numbers of levels can be constructed in a similar manner. Furthermore, in the first and second embodiments, the difference signal between the current image signal x and its predicted signal x^ (see equation (1)) was used as the prediction error signal e (quantized prediction error signal y). Prediction error signal e
Using the ranking of accuracy of prediction as (quantized prediction error signal y) (Technical Research Report of Institute of Electronics and Communication Engineers
CS79-176 Mizuno et al. "Coding of halftone facsimile signals") may also be considered. As described in detail above, according to the present invention, it is possible to realize a highly efficient image signal decoding device that is paired with a highly efficient image signal encoding device.

[Brief explanation of drawings]

Figure 1 is a diagram showing an example of the positional relationship between the image signal being input and the reference image signal, Figures 2, 4, 5, 7, and 9 are diagrams showing examples of various prediction error signal generation probability distributions, , 8 and 10 are diagrams showing examples of the lengths of various codes for prediction error signals, and FIGS. 6 and 21 are diagrams showing first and second embodiments of the encoding device paired with the present invention. Block diagrams, Figures 11, 12, and 13 are diagrams showing examples of various predictive signal generators, Figures 14,
Figures 15 and 16 are diagrams showing an example of various mode signal generators, Figure 17 is a diagram showing an example of a prediction error signal encoding circuit, Figures 18 and 19 are diagrams showing an example of a code tree, and Figure 20. 22 is a diagram showing an example of a shift register, FIG. 23 is a diagram showing an example of quantization characteristics of a prediction error signal quantization circuit, FIGS. FIG. 27 is a block diagram showing the first and second embodiments of the decoding device of the present invention, FIG. 25 is a diagram showing an example of a prediction error signal decoding circuit, and FIG. 26 is a time chart of the decoding device. It is a figure showing an example. In the figure, 1, 44, 48, 53, 64,...
...Shift register for storing image signals, 2, 43, 5
0,63...Prediction signal generator, 4,47,49,
62...Mode signal generator, 3, 18, 19, 2
0, 26, 27, 28, 41...subtraction circuit, 9,
16, 24, 45, 52, 65...addition circuit,
5, 46...Prediction error signal encoding circuit, 6, 7,
8, 11, 13, 15, 21, 22, 23, 2
9, 30, 31...Multiplication circuit, 10, 12, 14
... Selection circuit, 17 ... Prediction signal generation ROM, 2
5, 33... Threshold circuit, 32... Maximum value detection circuit, 34... Mode signal generation ROM, 35, 5
4,59...Pulse generation circuit, 36,55...
OR circuit, 37... code ROM, 38... code length
ROM, 40... Counter, 39... Shift register for code output, 42... Prediction error signal quantization circuit, 51, 61... Prediction error signal decoding circuit, 5
6, 57, 60...Register, 58...Decoding
ROM.

Claims (1)

[Claims] 1. In an image signal decoding device that divides a prediction error signal of a multilevel image signal into a plurality of groups for each pixel, and performs unequal length decoding for each pixel using a different unequal length code set for each group. ,
Using the image signal s that has already been input, a prediction signal x^ of the multivalued image signal x currently being input, a prediction signal error e of x, and a mode signal M indicating the degree of accuracy of the prediction.
, and converts the prediction error signal e into a mode signal M
A means for inputting a signal encoded by using a set of unequal length codes given to the group to input a prediction error signal e for each group, and an image signal that has already been decoded. s' to generate a mode signal M' for the prediction error signal e'; means for obtaining a signal e'; means for generating a prediction signal x^' for a predictive decoded signal x' of the prediction error signal e' using the decoded image signal s'; 1. An image signal decoding device comprising means for predictively decoding and outputting a predictively decoded signal x'.