JPH0234397B2 - GIONHATSUSEIKAIRO - Google Patents
GIONHATSUSEIKAIROInfo
- Publication number
- JPH0234397B2 JPH0234397B2 JP22337582A JP22337582A JPH0234397B2 JP H0234397 B2 JPH0234397 B2 JP H0234397B2 JP 22337582 A JP22337582 A JP 22337582A JP 22337582 A JP22337582 A JP 22337582A JP H0234397 B2 JPH0234397 B2 JP H0234397B2
- Authority
- JP
- Japan
- Prior art keywords
- information
- circuit
- pulse
- tone
- waveform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 241000272201 Columbiformes Species 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 241000544061 Cuculus canorus Species 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Electrophonic Musical Instruments (AREA)
- Headphones And Earphones (AREA)
Description
【発明の詳細な説明】 本発明は擬音発生回路に関するものである。[Detailed description of the invention] The present invention relates to an onomatopoeia generating circuit.
従来、例えばハト時計ではフイゴ，笛を用いて
ハトの鳴声の擬音を発生しており、構成的に複雑
になるものであつた。 Conventionally, for example, cuckoo clocks have used bells and whistles to generate onomatopoeic sounds of pigeons, making them complex in structure.
そこで本発明は簡単な回路構成で擬音を合成す
るようにした擬音発生回路を提供するものであ
る。 Therefore, the present invention provides an onomatopoeia generating circuit which can synthesize onomatopoeia with a simple circuit configuration.
以下本発明の一実施例を図面に基づいて説明す
る。第１図において、OSは発振器，Ｄは分周器，
PC1は音長および音の間隔を決定するプログラマ
ブルカウンタで、その出力によつてアドレスカウ
ンタACが歩進され記憶回路Ｍの情報が読み出さ
れる。このうちの音長情報および音の間隔情報に
よつてプログラマブルカウンタPC1の分周比が指
定され、その出力によつてフリツプフロツプ回路
Ｆからは第２図ＡのごとくパルスP1，P2が発生
する。PC2は記憶回路Ｍからの音階情報に基づい
て第２図Ｄのごとく周波数信号を生じるプログラ
マブルカウンタである。記憶回路Ｍの端子ｂから
は１ビツトの波形情報が第２図Ｂのように読み出
され、アナログスイツチS1，S2が開閉される。ま
ずインバータVTの出力によつてアナログスイツ
チS2がオンになるとフリツプフロツプ回路Ｆから
の第２図ＡのパルスP1（パルス幅64mS）が、抵
抗R2およびコンデンサＣからなる時定数回路に
供給される。この時定数はｔ＝15mSに設定して
あり、その出力端子ｃには第２図Ｃの電圧波形
W1が生じ、これと第２図Ｄの周波数信号1（1K
Hz）とがアナログスイツチS3で合成され、端子ｅ
に第２図Ｅの擬音信号g1が生じる。 An embodiment of the present invention will be described below based on the drawings. In Figure 1, OS is an oscillator, D is a frequency divider,
PC1 is a programmable counter that determines the note length and interval between notes, and the address counter AC is incremented by its output, and the information in the memory circuit M is read out. The frequency division ratio of the programmable counter PC 1 is specified by the note length information and the note interval information, and the pulses P 1 and P 2 are generated from the flip-flop circuit F by its output as shown in Figure 2A. do. PC 2 is a programmable counter that generates a frequency signal as shown in FIG. 2D based on the scale information from the memory circuit M. One bit of waveform information is read out from terminal b of the memory circuit M as shown in FIG. 2B, and analog switches S 1 and S 2 are opened and closed. First, when the analog switch S 2 is turned on by the output of the inverter VT, the pulse P 1 (pulse width 64 mS) shown in FIG. 2A from the flip-flop circuit F is supplied to the time constant circuit consisting of the resistor R 2 and the capacitor C. Ru. This time constant is set to t = 15 mS, and the output terminal c has the voltage waveform shown in Figure 2 C.
W 1 is generated, and this and the frequency signal 1 (1K
Hz) is synthesized by analog switch S3 , and terminal e
The onomatopoeic signal g1 shown in FIG. 2E is generated.
つぎに300mSの間隔をおいて第２図Ａのパルス
P2（パルス幅200mS）が生じると波形情報は第２
図Ｂのごとく“１”になりアナログスイツチS1が
オンになる。そのためパルスP2は、抵抗R1およ
びコンデンサＣからなる時定数回路に供給され、
端子ｃには第２図Ｃの電圧波形W2が生じる。こ
の時定数はｔ＝40mSに設定してある。一方端子
ｄには第２図Ｄの周波数信号2（800Hz）が生じ、
これと電圧波形W2とがアナログスイツチS3で合
成され端子ｅに第２図Ｅの擬音信号g2が生じる。 Next, at an interval of 300 mS, the pulse shown in Figure 2 A is applied.
When P 2 (pulse width 200mS) occurs, the waveform information is
As shown in Figure B, it becomes "1" and analog switch S1 is turned on. The pulse P 2 is therefore supplied to a time constant circuit consisting of a resistor R 1 and a capacitor C,
A voltage waveform W 2 as shown in FIG. 2C is generated at terminal c. This time constant is set to t=40mS. On the other hand, frequency signal 2 (800Hz) in Figure 2D is generated at terminal d,
This and the voltage waveform W2 are combined by an analog switch S3 , and an onomatopoeic signal g2 shown in FIG. 2E is generated at the terminal e.
上記の擬音信号g1，g2によつて「ポツポー」と
いうハトの鳴声の擬音が生じる。 The above-mentioned onomatopoeic signals g 1 and g 2 produce an onomatopoeia of the sound of a pigeon called "potsupo".
以上のように本発明によれば、簡単な回路で良
質の電子的なハト音等の擬音が得られ、報時時計
に用いると特に有効である。 As described above, according to the present invention, high-quality electronic onomatopoeia such as pigeon sounds can be obtained with a simple circuit, and is particularly effective when used in a time signal clock.
第１図は本発明の一実施例を示した電気回路
図、第２図は動作説明のためのタイムチヤートで
ある。
PC1，PC2……プログラムカウンタ、AC……ア
ドレスカウンタ、Ｍ……記憶回路、Ｆ……フリツ
プフロツプ回路、S1〜S3……アナログスイツチ、
R1，R2……抵抗、Ｃ……コンデンサ。
FIG. 1 is an electric circuit diagram showing an embodiment of the present invention, and FIG. 2 is a time chart for explaining the operation. PC1 , PC2 ...Program counter, AC...Address counter, M...Memory circuit, F...Flip-flop circuit, S1 to S3 ...Analog switch,
R1 , R2 ...Resistor, C...Capacitor.
Claims (1)
情報および波形情報を記憶した記憶回路と、この
記憶回路の音長情報に応じたパルス幅でかつ音の
間隔情報に応じた間隔でパルスを発生するプログ
ラマブルカウンタと、このプログラマブルカウン
タからのパルスによつて歩進され上記記憶回路の
アドレス指定を行つて上記音長情報、音階情報お
よび波形情報を同時に読み出し上記音長情報に続
いて上記音の間隔情報を読み出すアドレスカウン
タと、上記波形情報に対応した複数の時定数回路
と、上記音階情報に対応した周波数信号を生じる
第１の回路と、上記波形情報に基づいて上記時定
数回路のいずれかを選択し上記プログラマブルカ
ウンタからの上記音長情報に対応した幅のパルス
を供給する第２の回路と、上記選択された時定数
回路の出力と第１の回路からの周波数信号とを合
成する第３の回路とからなる擬音発生回路。1 A memory circuit that stores tone length information, tone interval information, scale information, and waveform information of a specific onomatopoeia, and a pulse width that corresponds to the tone length information of this memory circuit and a pulse at intervals that correspond to the tone interval information. A programmable counter that generates a pulse, and addresses the memory circuit that is incremented by the pulse from the programmable counter to simultaneously read out the tone length information, scale information, and waveform information, and then reads out the note length information, scale information, and waveform information simultaneously. an address counter that reads out interval information, a plurality of time constant circuits corresponding to the waveform information, a first circuit that generates a frequency signal corresponding to the scale information, and one of the time constant circuits based on the waveform information. a second circuit that selects one of the following and supplies a pulse with a width corresponding to the tone length information from the programmable counter, and synthesizes the output of the selected time constant circuit and the frequency signal from the first circuit. An onomatopoeia generating circuit consisting of a third circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22337582A JPH0234397B2 (en) | 1982-12-20 | 1982-12-20 | GIONHATSUSEIKAIRO |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22337582A JPH0234397B2 (en) | 1982-12-20 | 1982-12-20 | GIONHATSUSEIKAIRO |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59113497A JPS59113497A (en) | 1984-06-30 |
| JPH0234397B2 true JPH0234397B2 (en) | 1990-08-02 |
Family
ID=16797155
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22337582A Expired - Lifetime JPH0234397B2 (en) | 1982-12-20 | 1982-12-20 | GIONHATSUSEIKAIRO |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0234397B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH067339B2 (en) * | 1985-06-24 | 1994-01-26 | 三菱電機株式会社 | Onomatopoeia generator |
-
1982
- 1982-12-20 JP JP22337582A patent/JPH0234397B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59113497A (en) | 1984-06-30 |
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