JPH02298080A - Solar battery cell - Google Patents
Solar battery cellInfo
- Publication number
- JPH02298080A JPH02298080A JP1119337A JP11933789A JPH02298080A JP H02298080 A JPH02298080 A JP H02298080A JP 1119337 A JP1119337 A JP 1119337A JP 11933789 A JP11933789 A JP 11933789A JP H02298080 A JPH02298080 A JP H02298080A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- solar cell
- diode
- silicon substrate
- solar
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 13
- 229910052710 silicon Inorganic materials 0.000 abstract description 13
- 239000010703 silicon Substances 0.000 abstract description 13
- 239000000758 substrate Substances 0.000 abstract description 13
- 238000009792 diffusion process Methods 0.000 abstract description 9
- 239000006059 cover glass Substances 0.000 abstract description 6
- 239000000853 adhesive Substances 0.000 abstract description 5
- 230000001070 adhesive effect Effects 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 235000018185 Betula X alpestris Nutrition 0.000 description 1
- 235000018212 Betula X uliginosa Nutrition 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/142—Energy conversion devices
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/544—Solar cells from Group III-V materials
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Life Sciences & Earth Sciences (AREA)
- Sustainable Development (AREA)
- Sustainable Energy (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分針)
本発明は、太陽電池モジュールの一部の太陽電池セルが
発電全停止又は発電が低下した場合に、他の太陽電池に
発生し九電圧が、逆バイアス電圧として印加され、太陽
電池セルが破壊されることを防止する太陽電池の構造に
関するものである。Detailed Description of the Invention (Industrial Application Minute Hand) The present invention provides a method for detecting a voltage that occurs in other solar cells when some of the solar cells in a solar module completely stop generating power or when the power generation decreases. , relates to a structure of a solar cell that is applied as a reverse bias voltage and prevents the solar cell from being destroyed.
特に宇宙用として有尾なものである。Especially for space use, it has a tail.
(従来の技術)
一般に人工衛1の電源として使用される太陽電池モジュ
ールには、太陽との関係位置により、衛星本体又は特に
アンテナのような突出した構造体の影が発生することが
ある。第4図−)はその説明図であって、多数の太陽1
池セルを直列及び並列に接続した太陽電池モジエール1
5の出力部には、シャントトランジスタ19が並列に接
続され、さらにその出力はブロッキングダイオード24
を介してバッチIJ −20に接続されている。この時
、太陽電池モジュール15のア1/イの一部の太陽電池
セル16r(:、影ができることがある。この状態のブ
ロック図が第4図(b)である。影のできた太1!J)
電池セル16を含むこれと並列方向に接続されている太
陽電池セルとよりなるサブモジュール17には、これと
直列に接続される影のない他の部分の太陽′1池モジュ
ール18で発生した電圧vUが、逆バイアス電圧として
印加される。逆バイアス電圧は、バッチ!J−20に′
成力を供給する負荷供給子−ドでは、バッテリー20の
電圧をvB とすると、vB−vυに等しくなる。シ
ャントトランジスタ19が動作するシャントモードでは
、はぼ−vgに等しくなる。逆バイアス電圧がサブモジ
ュール17に印加されると、サグモジュール17の電流
と逆バイアス電圧との積で求められる電力がサブモジュ
ール17で消費され、サブモジ1−ル17中の影のない
部分の太陽電池セルが発熱し、場合によっては、各太陽
電池セルを接続するインタコネクタの接続部が分離した
り、太陽電池セルが短絡して破壊することがある0
第5図は、このような状態の電流・電圧特性を示すもの
で、曲線21は影のある部分を含むサブモジュール17
の逆方向特性を示し・曲線22は他の部分の太St池モ
ジュール18の出力特性を示す、点23はシャントモー
ドの場合の動作点で、ある。(Prior Art) In general, a solar cell module used as a power source for an artificial satellite 1 may be shadowed by a protruding structure such as a satellite body or an antenna, depending on its position in relation to the sun. Figure 4-) is an explanatory diagram of this, showing a large number of suns
Solar cell module 1 with pond cells connected in series and parallel
A shunt transistor 19 is connected in parallel to the output section of 5, and its output is further connected to a blocking diode 24.
It is connected to batch IJ-20 via. At this time, a shadow may be formed on some of the solar cells 16r (A1/A) of the solar cell module 15. A block diagram of this state is shown in FIG. 4(b). J)
A sub-module 17 consisting of a solar battery cell connected in parallel with the battery cell 16 receives the voltage generated in the solar battery module 18 of the other unshaded part connected in series with this sub-module 17. vU is applied as a reverse bias voltage. Reverse bias voltage is batch! To J-20'
In the load supply node that supplies power, if the voltage of the battery 20 is vB, it becomes equal to vB - vυ. In shunt mode, in which shunt transistor 19 operates, is equal to -vg. When a reverse bias voltage is applied to the submodule 17, power determined by the product of the current of the sag module 17 and the reverse bias voltage is dissipated in the submodule 17, and the solar power in the unshaded part of the submodule 1-17 is dissipated by the submodule 17. The battery cells generate heat, and in some cases, the connection parts of the interconnectors that connect each solar battery cell may separate, or the solar battery cells may be short-circuited and destroyed. It shows the current/voltage characteristics, and the curve 21 is the submodule 17 including the shaded part.
Curve 22 shows the output characteristics of the other parts of the Stike module 18, and point 23 is the operating point in the shunt mode.
ンヤントモードの場合は、サブモジュール17の逆バイ
アス電圧vAは、−VUと等しくなる。In the negative mode, the reverse bias voltage vA of the submodule 17 is equal to -VU.
負荷供給モードの場合は、サブモジュール17の逆バイ
アス電圧vλ′は、v、、’−VUに等しくなる。In the case of load supply mode, the reverse bias voltage vλ' of the submodule 17 is equal to v,,'-VU.
サブモジュール17に発生する電力は、動作点における
電圧と′直流との積となり、第5図の斜線部で示される
。シャントモードの場合は、右上から左下への斜線で示
される領域であり、負荷供給モードの場合は、左上から
右下への斜線で示される領域である。The power generated in the submodule 17 is the product of the voltage at the operating point and the direct current, and is shown by the shaded area in FIG. In the shunt mode, this is the area indicated by diagonal lines from the upper right to the lower left, and in the case of the load supply mode, it is the area indicated by the oblique lines from the upper left to the lower right.
このような逆バイアス電圧の発生は、モジュール上に影
が生じることによって起るだけでなく、太)1!電池セ
ルが破損したり、各太陽電池セル間を接続しているイン
ターコネクタの断線によっても起ることがある。このよ
うな逆バイアス電圧の発生、さらにこれに起因する太陽
電池セルの短絡破壊を防止するため、一般にサブモジュ
ールに並列に、または複数のサブモジュールを直列に接
続したものに並列に、パイパスダイオードを接続する対
策が施されている。The occurrence of such a reverse bias voltage is caused not only by the shadow on the module, but also by the presence of a shadow on the module. This can also occur due to damage to the battery cells or disconnection of the interconnector connecting each solar battery cell. To prevent the generation of such reverse bias voltage and the resulting short-circuit damage to solar cells, bypass diodes are generally installed in parallel with submodules or in parallel with multiple submodules connected in series. Measures have been taken to connect.
このようなパイパスダイオードは、サブモジュールに影
のないときは逆バイアスされ、サブモジュールに影が発
生し太[場電池セルに逆バイアス電ト五が発生すると、
順方向にバイアスされるように接続される。すなわち、
パイパスダイオードのP(+)電極が天場電池セルのN
(→電極に、ま九パイパスダイオードのN (−)電極
が太陽電池セルのP (+)を極に接続される。このよ
うな目的で使用されるパイパスダイオードには、次の3
糧類がある。Such a bypass diode is reverse biased when there is no shadow on the submodule, and when a shadow occurs on the submodule and a reverse bias current is generated on the battery cell,
Connected to be forward biased. That is,
The P(+) electrode of the bypass diode is the N of the Tenba battery cell.
(→electrode, the N (-) electrode of the bypass diode is connected to the P (+) pole of the solar cell. The bypass diode used for this purpose has the following three types.
There is food.
1、 通常のパッケージダイオード、
2、 パッケージのないウェーハ状のダイオード、(い
わゆる太陽電池セル型ダイオード)3、 太陽電池セル
のシリコン基板に形成され九ダイオード、(いわゆるイ
ンテグラルダイオード付太陽電池セル)
(発明が解決しようとする課題)
前項の1、の通常のパッケージタイプのダイオードは、
太陽電池セルの周辺に設ける必要があるので、太陽電池
アレイのかなりのスペースが、ダイオード設置の丸めに
必要となり、太陽電池セルの実装密度が悪くなる。1. Ordinary packaged diode, 2. Wafer-shaped diode without a package (so-called solar cell type diode), 3. Nine diodes formed on the silicon substrate of the solar cell, (so-called solar cell with integral diode) ( Problem to be Solved by the Invention) The normal package type diode in item 1 above is:
Since they need to be provided around the photovoltaic cells, a considerable amount of space in the photovoltaic array is required for the rounding of the diode installation, resulting in poor packaging density of the photovoltaic cells.
前項の2.0ウエーハ状のダイオードは、太陽電池セル
と同じ形状であり、1.0場合のような不都合な突起が
ないので、最近の太陽電池アレイの主流となってきてい
る折り量み式のフレキシブルソーラアI/イに適してい
る。しかし、このダイオードもかなりのスペースが必要
であり、1.のダイオードの場合と同様に、太陽電池ア
1/イにおける太陽′電池セルの!!装密度が悪くなる
。The 2.0 wafer-shaped diode mentioned in the previous section has the same shape as a solar cell and does not have the inconvenient protrusions like the 1.0, so it is a foldable type that has become the mainstream in recent solar cell arrays. Suitable for flexible solar I/I. However, this diode also requires a considerable amount of space; Similarly to the case of the diode in the solar cell A1/A, the solar cell ! ! Packing density deteriorates.
前項の8.のダイオードは、太陽電池セルのシリコン基
板の裏面に形成されているので、前項の1゜又は2.0
ダイオードの場合のように、太陽!池セルの実装密度が
悪くなる欠点はないが、太陽電池セルとダイオードを同
一シリコン基板上に形成する必要があり、製造方法が複
雑になり、現在の所、実際には使用されていない。8 of the previous section. Since the diode is formed on the back side of the silicon substrate of the solar cell, the diode of 1° or 2.0
As in the case of diodes, the sun! Although it does not have the disadvantage that the packaging density of the solar cell is poor, it requires forming the solar cell and the diode on the same silicon substrate, which complicates the manufacturing method, so it is not actually used at present.
17′2.、上記の1.2.及び3、のダイオードをパ
イパスダイオードとして使用するには、天場電池セルに
適当な方法で結線して接続する必要があり、組立、配線
に手間がかかる欠点がある。17'2. , 1.2 above. In order to use the diodes of 3 and 3 as bypass diodes, it is necessary to wire and connect them to the solar cell in an appropriate manner, which has the disadvantage that assembly and wiring are time-consuming.
(111題を解決するための手段)
本発明においては上記の欠点を除く丸め、太陽電池セル
の何れかの表面又は側面に隣接して、これと並列にパイ
パスダイオードを逆方向に少くと屯−個のコネクタによ
り接続した。(Means for Solving Problem No. 111) In the present invention, the above-mentioned drawbacks are eliminated, and a bypass diode is placed adjacent to any surface or side surface of a solar cell in parallel with it in the opposite direction. Connected by two connectors.
(作用)
本発明によるパイパスダイオード付太陽電池セルは、パ
イパスダイオードが太陽電池と並列に接続されており、
他のセルとの接続は、太陽電池セルのP′rIL!及び
N電極の二端子のみで行うことができ、逆バイアス電圧
をバイパス1−太陽電池の損傷を防止する。(Function) In the solar cell with a bypass diode according to the present invention, the bypass diode is connected in parallel with the solar cell,
The connection with other cells is P'rIL! of the solar cell. Bypassing the reverse bias voltage can be done with only two terminals of the and N electrodes - to prevent damage to the solar cell.
(実施例)
第1図(a)は本発明の一実施例の側面図、同図(b)
はその平面図、同図(C)はその背面図である。この太
陽電池セルは一般的なNJIを受光面としたものであっ
て、P型シリコン基板2の裏面にはほぼ全面にわたbp
z極4が設けられ、表面にはN型拡散層1が形成1れ、
その表面には接着剤7を介してカバーガラス6が設けら
れている。このカバーガラス6は宇宙空間での放射線に
対する、太陽電池セルの保護のためである。N、型拡敵
層1の表面の大部分には適当の間隔を置いてグリッド電
極5.5・が配列されて電流を収集し、それらはN型拡
散層1の端縁部に設けられ九コンタクト電極3に接続さ
れている。パイパスダイオードDFi、ダイオード用の
P型シリコン基板9の一方の面にN型拡教層8全形成し
、それらの外側にそれぞれPt[11及N’1EI11
0が形成されている。カバーガラス6の長さはP#1シ
リコン基板2の長さより短かくされ、その表面のN型拡
散層1の端縁部のコンタクト電極3の表面に、パイパス
ダイオードDのP1樺11を半田付尋により直接接続す
る。パイパスダイオードDのN’l![10と太陽電池
セルのPK[4とは、銀その細溝電率の良い金属片のコ
ネクタ13により接続されている。パイパスダイオード
DのN’l(極10及びPt1illは、光が入射しな
いように適宜の連光手段が施されている。(Embodiment) FIG. 1(a) is a side view of an embodiment of the present invention, and FIG. 1(b) is a side view of an embodiment of the present invention.
is a plan view thereof, and FIG. 3(C) is a rear view thereof. This solar cell has a general NJI light-receiving surface, and the back surface of the P-type silicon substrate 2 has a bp covering almost the entire surface.
A z-pole 4 is provided, and an N-type diffusion layer 1 is formed on the surface.
A cover glass 6 is provided on its surface with an adhesive 7 interposed therebetween. This cover glass 6 is used to protect the solar cells from radiation in outer space. Grid electrodes 5.5 are arranged at appropriate intervals on most of the surface of the N-type diffusion layer 1 to collect current; It is connected to the contact electrode 3. For the bypass diode DFi, an N-type expansion layer 8 is entirely formed on one surface of a P-type silicon substrate 9 for the diode, and Pt[11 and N'1EI11 are formed on the outside thereof, respectively.
0 is formed. The length of the cover glass 6 is made shorter than the length of the P#1 silicon substrate 2, and the P1 birch 11 of the bypass diode D is soldered to the surface of the contact electrode 3 at the edge of the N-type diffusion layer 1 on the surface thereof. Connect more directly. N'l of bypass diode D! [10] and PK[4 of the solar cell are connected by a connector 13 made of a thin metal piece of silver or the like with good electrical conductivity. N'1 (pole 10 and Pt1ill) of the bypass diode D are provided with suitable continuous light means so that no light enters them.
また、太陽電池セルのNil極であるコンタクト電Wi
3には、他の太陽電池セルとの接続用のインターコネク
タ12.12が設けれている。コネクタ13及インター
コネクタ12と太陽電池セル又はバイハスダイオードD
との接続は溶接又は半田付は等で行われる。In addition, the contact electrode Wi, which is the Nil electrode of the solar cell,
3 is provided with an interconnector 12.12 for connection with other solar cells. Connector 13 and interconnector 12 and solar cell or bihas diode D
The connection is made by welding, soldering, etc.
第2図(a)、 (b)及び(c)は他の実施例を示す
もので(a)は側面図、(b)は平面図、(C)は背面
図であって、パイパスダイオードDt−受光面の反対側
に設けである。第1図(a)、 (b)及び(c)と同
一の部分には、同一の符号を付しである。パイパスダイ
オードD。FIGS. 2(a), (b), and (c) show other embodiments, in which (a) is a side view, (b) is a top view, and (C) is a rear view, in which the bypass diode Dt - Provided on the opposite side of the light receiving surface. The same parts as in FIGS. 1(a), (b) and (c) are given the same reference numerals. Bypass diode D.
NtlilOを太陽電池セルのPt[4に接続し、パイ
パスダイオードDのP11FJilliコネクタ13に
よってコンタクト電極3に接続している。NtliIO is connected to Pt[4 of the solar cell, and connected to the contact electrode 3 by the P11FJilli connector 13 of the bypass diode D.
第3図(a)、(b)及び(c)はさらに他の実施例を
示すもので、パイパスダイオードDを太陽電池セルと並
列に設けたものである。同図(a)は側面図、同図(b
)は平面図、同図(C)は背面図である。第1図(a)
(b)(c)及び第2図(a)(b)Lclと同一の部
分には、同一の符号を付しである。この実施例において
は、パイパスダイオードDはN型シリコン基板9−1の
一方の面Vcp型拡散拡散層1を形成し、それぞれの表
面にNIE極1o及びP電極11を設け、太陽電池セル
のコンタクト電極3とパイパスダイオードDのPIE極
11をコネクタ13−1で接続し、太陽電池セルの裏面
のP@電極とパイパスダイオードD(DN電[101に
コネクタ13−2で接続しである。パイパスダイオード
Dの側面と太陽電池セルの側面とを絶縁性の接着剤14
によって接着する。FIGS. 3(a), (b), and (c) show still another embodiment, in which a bypass diode D is provided in parallel with the solar cell. The same figure (a) is a side view, the same figure (b)
) is a plan view, and (C) is a rear view. Figure 1(a)
The same parts as Lcl in FIGS. 2(b) and 2(c) and FIGS. 2(a) and 2(b) are designated by the same reference numerals. In this embodiment, the bypass diode D is formed by forming a Vcp type diffusion layer 1 on one side of an N type silicon substrate 9-1, and providing an NIE electrode 1o and a P electrode 11 on each surface, and contacting the solar cell. The electrode 3 and the PIE pole 11 of the bypass diode D are connected with the connector 13-1, and the P@ electrode on the back side of the solar cell is connected to the bypass diode D (DN electrode [101] with the connector 13-2. An insulating adhesive 14 connects the side surface of D and the side surface of the solar cell.
Glue by.
パイパスダイオードとしては、他のダイオード例えば、
シ璽ットキーダイオードを使用することができ、太陽電
池セルとしてはGaAsセル等を使用することができる
。As a bypass diode, other diodes such as
A Schottky diode can be used, and a GaAs cell or the like can be used as the solar cell.
(発明の効果)
本発明は以上のような構造であるから、太陽電池モジュ
ールを構成する何れかの太陽電池セルに影が発生し、太
陽電池セルのN電極が逆バイアスされた場合、太陽電池
セルに並列に接続されたパイパスダイオードが直に順方
向にバイアスされるために、影の発生していない他の太
陽電池モジュールの電流はパイパスダイオードを通して
流され、影の発生している太陽電池セルには逆バイアス
電圧が発生しない。また、本発明による太陽電池セル相
互間又は他の太陽電池セルとの接続は、通常の太陽電池
セルと同様にN電極とPK極の相互接続のみで十分であ
り、従来のパイパスダイオードと太陽電池セルとの間に
必要であっ六複雑な配線。(Effects of the Invention) Since the present invention has the above-described structure, if a shadow occurs on any of the solar cells constituting the solar cell module and the N electrode of the solar cell is reverse biased, the solar cell Since the bypass diode connected in parallel with the cell is directly forward biased, the current of other solar modules that are not shaded is passed through the bypass diode, and the current of the other solar cell module that is not shaded is passed through the bypass diode, and the current of the solar cell module that is not shaded is passed through the bypass diode. No reverse bias voltage is generated. Further, the connection between the solar cells according to the present invention or with other solar cells is sufficient by interconnection of the N electrode and the PK electrode as in the case of ordinary solar cells, and the connection between the solar cells and the conventional bypass diode and the solar cell is sufficient. Six complex wirings are required between the cells.
接続は不要になる。また、パイパスダイオードを設ける
ことによる太陽電池プレイの実装密度の低下を防ぐこと
ができる。No connection is required. Further, it is possible to prevent a decrease in the mounting density of the solar cell play due to the provision of the bypass diode.
萬1図(a)は本発明の一実施例の側面図9同図(b)
はその平面図−同図(c)はその背面図、第2図(a)
は本発明の他の実施例の側面図、同図(b3はその平面
図・同図(c)はその背面図、第3図(a)は本発明の
さらに他の実施例の側面図、同図(b)はその平面図−
同図(c)はその背面図、第4図(a)は太陽電池モジ
ュールの一部に影が発生した場合の説明図、同図(b)
ハ逆バイアス説明のブロック図、第5図は逆バイアス発
生時の電流電圧特性を示すグラフである。
1・・・N型拡散層、2・・・P型シリコン基板、3・
・・コンタクト電極、4・・・pH[,5・・・グリッ
ド電極、6・・・カバーガラス、7・・・接着剤、8・
・・N型拡散層、8−1・・・P型拡散層、9・・・P
型シリコン基板、9−1・・・N盟シリコン基板、10
・・・Nll[,11・・・Ptff1.12・・・イ
ンターコネクタ、13.13−1゜13−2・・・コネ
クタ、14・・・接着剤、D・・・パイバ苓 I 図(
Q、1
纂 / 1m Cb)
第1図(C)
*2m(bン
第2図(c)
第3図(b)
纂3 図 (C)
!−@(=:)Figure 1(a) is a side view of one embodiment of the present invention, and Figure 9(b) is a side view of one embodiment of the present invention.
is its plan view - Figure 2 (c) is its rear view, Figure 2 (a)
is a side view of another embodiment of the present invention, (b3 is a plan view thereof, FIG. 3(c) is a rear view thereof, and FIG. 3(a) is a side view of still another embodiment of the present invention, Figure (b) is the plan view.
Figure 4 (c) is its rear view, Figure 4 (a) is an explanatory diagram when a shadow occurs on a part of the solar cell module, Figure 4 (b)
C. A block diagram for explaining reverse bias. FIG. 5 is a graph showing current-voltage characteristics when reverse bias occurs. 1... N type diffusion layer, 2... P type silicon substrate, 3...
... Contact electrode, 4... pH[, 5... Grid electrode, 6... Cover glass, 7... Adhesive, 8...
...N type diffusion layer, 8-1...P type diffusion layer, 9...P
type silicon substrate, 9-1...N type silicon substrate, 10
...Nll[,11...Ptff1.12...Interconnector, 13.13-1゜13-2...Connector, 14...Adhesive, D...Paiva Rei I Figure (
Q, 1 string / 1m Cb) Figure 1 (C) *2m (b Figure 2 (c) Figure 3 (b) Line 3 Figure (C) !-@(=:)
Claims (1)
オードを逆方向に少くとも一個のコネクタにより接続す
ることを特徴とする太陽電池セル。1. A solar cell characterized in that a bypass diode is connected adjacent to and in parallel with the solar cell in the opposite direction by at least one connector.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1119337A JPH02298080A (en) | 1989-05-12 | 1989-05-12 | Solar battery cell |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1119337A JPH02298080A (en) | 1989-05-12 | 1989-05-12 | Solar battery cell |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02298080A true JPH02298080A (en) | 1990-12-10 |
Family
ID=14758985
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1119337A Pending JPH02298080A (en) | 1989-05-12 | 1989-05-12 | Solar battery cell |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02298080A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0535614A3 (en) * | 1991-09-30 | 1994-02-16 | Sharp Kk | |
US5616185A (en) * | 1995-10-10 | 1997-04-01 | Hughes Aircraft Company | Solar cell with integrated bypass diode and method |
EP0933818A1 (en) * | 1998-01-29 | 1999-08-04 | Angewandte Solarenergie - ASE GmbH | Solar module in integrated thin film technology |
WO2001006565A1 (en) * | 1999-07-14 | 2001-01-25 | Hughes Electronics Corporation | Monolithic bypass-diode and solar-cell string assembly |
JP2007073898A (en) * | 2005-09-09 | 2007-03-22 | Sharp Corp | Solar cell with bypass function and manufacturing method thereof |
JP2007110123A (en) * | 2005-10-11 | 2007-04-26 | Emcore Corp | Reliable interconnection in solar battery including integrated bypass diode |
JP2012156504A (en) * | 2011-01-27 | 2012-08-16 | Semikron Elektronik Gmbh & Co Kg | Power semiconductor element and arrangement structure of power semiconductor element for at least one solar cell |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5856368A (en) * | 1981-09-30 | 1983-04-04 | Agency Of Ind Science & Technol | Solar cell module |
JPS5994880A (en) * | 1982-11-24 | 1984-05-31 | Fuji Electric Corp Res & Dev Ltd | Solar battery |
JPH01260864A (en) * | 1988-04-12 | 1989-10-18 | Mitsubishi Electric Corp | Photovoltaic generating element |
-
1989
- 1989-05-12 JP JP1119337A patent/JPH02298080A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5856368A (en) * | 1981-09-30 | 1983-04-04 | Agency Of Ind Science & Technol | Solar cell module |
JPS5994880A (en) * | 1982-11-24 | 1984-05-31 | Fuji Electric Corp Res & Dev Ltd | Solar battery |
JPH01260864A (en) * | 1988-04-12 | 1989-10-18 | Mitsubishi Electric Corp | Photovoltaic generating element |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0535614A3 (en) * | 1991-09-30 | 1994-02-16 | Sharp Kk | |
US5330583A (en) * | 1991-09-30 | 1994-07-19 | Sharp Kabushiki Kaisha | Solar battery module |
US5616185A (en) * | 1995-10-10 | 1997-04-01 | Hughes Aircraft Company | Solar cell with integrated bypass diode and method |
EP0933818A1 (en) * | 1998-01-29 | 1999-08-04 | Angewandte Solarenergie - ASE GmbH | Solar module in integrated thin film technology |
WO2001006565A1 (en) * | 1999-07-14 | 2001-01-25 | Hughes Electronics Corporation | Monolithic bypass-diode and solar-cell string assembly |
US6635507B1 (en) | 1999-07-14 | 2003-10-21 | Hughes Electronics Corporation | Monolithic bypass-diode and solar-cell string assembly |
JP2007073898A (en) * | 2005-09-09 | 2007-03-22 | Sharp Corp | Solar cell with bypass function and manufacturing method thereof |
JP2007110123A (en) * | 2005-10-11 | 2007-04-26 | Emcore Corp | Reliable interconnection in solar battery including integrated bypass diode |
EP1775778A3 (en) * | 2005-10-11 | 2008-11-12 | Emcore Corporation | Reliable interconnection of solar cells including integral bypass diode |
JP2012156504A (en) * | 2011-01-27 | 2012-08-16 | Semikron Elektronik Gmbh & Co Kg | Power semiconductor element and arrangement structure of power semiconductor element for at least one solar cell |
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