JPH0226261U - - Google Patents
Info
- Publication number
- JPH0226261U JPH0226261U JP10386188U JP10386188U JPH0226261U JP H0226261 U JPH0226261 U JP H0226261U JP 10386188 U JP10386188 U JP 10386188U JP 10386188 U JP10386188 U JP 10386188U JP H0226261 U JPH0226261 U JP H0226261U
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- integrated circuit
- semiconductor device
- thickness
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000002184 metal Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
Description
第１図は本考案の実施例１を示す縦断面図、第
２図は本考案の実施例２を示す縦断面図、第３図
は従来の半導体装置を示す縦断面図である。
１…リードフレーム、２…樹脂、３…ボンデイ
ングワイヤ、４…半導体集積回路、５…絶縁物、
６ａ…外部金属板、６ｂ…内部金属板。
FIG. 1 is a vertical cross-sectional view showing a first embodiment of the present invention, FIG. 2 is a vertical cross-sectional view showing a second embodiment of the present invention, and FIG. 3 is a vertical cross-sectional view showing a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1... Lead frame, 2... Resin, 3... Bonding wire, 4... Semiconductor integrated circuit, 5... Insulator,
6a...External metal plate, 6b...Internal metal plate.
Claims (1)
る半導体集積回路において、リードフレームの板
厚をワイヤーボンデイング部のみ薄くしたことを
特徴とする半導体装置。 A semiconductor device comprising a semiconductor integrated circuit mounted on a lead frame, characterized in that the thickness of the lead frame is reduced only at the wire bonding portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10386188U JPH0226261U (en) | 1988-08-05 | 1988-08-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10386188U JPH0226261U (en) | 1988-08-05 | 1988-08-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0226261U true JPH0226261U (en) | 1990-02-21 |
Family
ID=31335066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10386188U Pending JPH0226261U (en) | 1988-08-05 | 1988-08-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0226261U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0817988A (en) * | 1994-06-28 | 1996-01-19 | Hitachi Ltd | Resin-sealed semiconductor device and manufacture thereof |
| JP2010045265A (en) * | 2008-08-15 | 2010-02-25 | Techwin Opto-Electronics Co Ltd | Method of manufacturing led lead frame |
-
1988
- 1988-08-05 JP JP10386188U patent/JPH0226261U/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0817988A (en) * | 1994-06-28 | 1996-01-19 | Hitachi Ltd | Resin-sealed semiconductor device and manufacture thereof |
| JP2010045265A (en) * | 2008-08-15 | 2010-02-25 | Techwin Opto-Electronics Co Ltd | Method of manufacturing led lead frame |
| JP4531830B2 (en) * | 2008-08-15 | 2010-08-25 | 特新光電科技股▲分▼有限公司 | LED lead frame manufacturing method |