JPH021939A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To finish an ion-implantation process in one time only and to obtain an LDD structure constituted as was expected by a method wherein when sidewalls are each formed on both end parts of a gate electrode, an oxide film doped with an impurity of a corresponding conductivity type is deposited and low-doped diffused regions are formed in a selected main surface of a semiconductor substrate using the oxide film, doped with this impurity, as a diffusion source. CONSTITUTION:Phosphorus is diffused in the main surface of a substrate from a phosphorus-doped oxide film 15 and low-doped regions, in short, N<-> regions 16 are formed comparatively shallow comprising parts close to both end parts of a gate electrode 14 in source and drain regions. An N-type impurity, such as arsenic here, is ion-implanted in a selected main surface of the semiconductor substrate 11 using a field oxide film 12, the electrode 14 and sidewalls 17 as masks on a condition of 50keV and 10<15>/cm<3>. Thereby, high-doped regions, in short, N<+> regions 18 are each formed comparatively deep in each N<-> region 16 of parts apart from both end parts of the electrode 14 in the source and drain regions by an amount equivalent to the width of each sidewall 17. Lastly, a heat treatment is performed at 1000 deg.C for 60 minutes or thereabouts and these N<-> and N<+> regions 16 and 18 are activated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and more specifically, to an improvement in a method for manufacturing a MOS field effect transistor having a so-called LDD structure.

[Conventional technology]

Generally, miniaturized MOS (Metal Oxide)
In order to improve the drain breakdown voltage of the Sem1conduc jor) type field effect transistor, the so-called LDD(Li)<
In other words, a structure in which the impurity concentration in the drain diffusion region near the end of the gate electrode is lower than the impurity concentration in other regions is adopted.

As a conventional device configuration of this type, in this work, the second
Figures (a) to (e) show the main manufacturing steps of a method for forming an LDD structure in an N-channel MOS field effect transistor in order of process.

That is, in FIGS. 2(a) to 2(e) of the Kowara, the conventional method uses 1, for example, a resistivity of 1OΩcm, which is separated by a thick field oxide @2 for isolation between elements.
First, a gate electrode 4 is selectively formed through a thin gate oxide film 3 at a predetermined position on a P-type silicon semiconductor substrate l (see FIG. 2(a)), and in this state, Using these field oxide film 2 and gate electrode 4 as a mask, N is deposited on the selected main surface of the semiconductor substrate l.
Impurities of the form, e.g. phosphorus at 50 eV, 1
By performing ion implantation (first time) under the condition of 0''/crn', a low concentration impurity region is formed including the portions close to both ends of the gate electrode 4 in the source and drain regions.

In other words, an N- region 5 is formed (FIG. 2(b)).

Next, an oxide film, in this case, a non-doped oxide film 6 which is not particularly doped with impurities, is deposited on the entire surface to a thickness of about 3000 (see Figure (C)), and then this is selectively deposited. By etching, both ends of the gate electrode 4, including a part of the N- region 5, are etched to a thickness of 300 mm.
A side wall 7 with a thickness of about 0 is formed (see the same figure).
d)).

Thereafter, using the field oxide film 2, gate electrode 4, and sidewall 7 as masks, N-type impurities, for example Arsenic at 50KeV, 1015
By performing ion implantation (second time) under the condition of /crn', a high concentration impurity region, that is, an N+ region, is formed in the source and drain regions at a distance corresponding to the width of the sidewall 7 from both ends of the gate electrode 4. form 8 and finally,
A heat treatment is performed at 1000° C. for about 60 minutes to activate each of these N- regions 5 and N1 regions 8 (FIG. 3(e)).
), thus obtaining an N-channel MOS field effect transistor having the desired LDD structure.

Therefore, when an N-channel MOS configured as described above is used as a field effect transistor, an N-channel MOS transistor is formed near the end of the gate electrode 4 as a low concentration impurity diffusion region which becomes a drain region.
An N+ region 8 as a high-concentration impurity diffusion region is formed in a part of the - region 5 and in the other part of the drain region, including the other part of the N- region 5, and these are L
A DD structure can be configured to improve the drain breakdown voltage of this device.

[Problem to be solved by the invention]

However, in the conventional example manufactured through the above-mentioned steps, 1. In the method for manufacturing an N-channel MOS field effect transistor having an OD structure, two
This method requires multiple ion implantations, which results in complicated manufacturing operations, poor workability, and a lack of productivity.

This invention was made to solve these conventional problems, and its purpose is to make it possible to obtain the desired LDD structure by completing the ion implantation process only once. . This type of semiconductor device manufacturing method,
The object of the present invention is to provide a MOS field effect transistor having an LDD structure.

[Means to solve the problem]

In order to achieve the above object, the method for manufacturing a semiconductor device according to the present invention deposits an oxide film doped with an impurity of the corresponding conductivity type when forming sidewalls on both ends of a gate electrode. Using an oxide film doped with impurities as a diffusion source, a low concentration impurity diffusion region is formed on a selected main surface of a semiconductor substrate.

That is, the present invention is a method for forming an LDD structure in a MOS field effect transistor, in which impurities of a second conductivity type are first added onto a semiconductor substrate of a first conductivity type on which a gate oxide film and a gate electrode have been formed. A doped oxide film is deposited, and a relatively shallow low-concentration impurity diffusion region is selected on the main surface of the semiconductor substrate, including portions close to both ends of the gate electrode, using the impurity-doped oxide film as a diffusion source. Then, the impurity-doped oxide +1fi is selectively removed to form sidewalls at both ends of the gate electrode, and then the width of each sidewall is reduced from both ends of the gate electrode. A method for manufacturing a semiconductor device, characterized in that impurities of a second conductivity type are ion-implanted into a low-concentration impurity diffusion region separated by a considerable distance and heat-treated to form a relatively deep high-concentration impurity diffusion region. be.

[For production]

Therefore, in the method of the present invention, a second conductivity type semiconductor substrate is formed on a semiconductor substrate of a first conductivity type on which a gate oxide film and a gate electrode are formed.
An oxide film doped with a conductive type impurity is deposited, and this is used as a diffusion source to selectively form a relatively shallow low concentration impurity diffusion region including the areas close to both ends of the gate electrode. After forming the sidewalls,
Impurity of the second conductivity type is ion-implanted into the low-concentration impurity diffusion region located away from both ends of the gate electrode by the width of each sidewall, and heat-treated to form a relatively deep high-concentration impurity diffusion region. Because I did it, LDD
The ion implantation operation required to form the structure can be completed only once, thereby simplifying the manufacturing process and increasing productivity.

〔Example〕

Hereinafter, one embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail with reference to FIGS. 1(a) to 1(e).

These FIGS. 1(a) to 1(e) are cross-sectional views schematically showing the main manufacturing steps of the method for forming the LDD structure in the N-channel MOS field effect transistor used in this embodiment in order of process. It is.

That is, in FIGS. 1(a) to 1(e) of Kowara, this embodiment method also applies to 9 parts separated by a thick field oxide film 12 for isolation between elements, for example, when the resistivity is 1.
First, a gate electrode 14 is selectively formed at a predetermined position on the P-type silicon semiconductor substrate II of about 0 Ωcrn through a thin gate oxide film I3 (FIG. 2(a)).
, and a phosphorus-doped oxide film 15 doped with N-type impurities, for example, 11% of phosphorus, is deposited on these entire surfaces to a thickness of about 3,000 (see the same figure).
b)).

Next, heat treatment is performed at 1100° C. for about 30 minutes in the state described in No. 111 to diffuse phosphorus from the phosphorus-doped oxide film 15 onto the selected main surface of the semiconductor substrate l, thereby forming a material in the source and drain regions. A low concentration impurity region, that is, an N- region 16 is formed relatively shallowly including a portion close to both ends of the gate electrode 14 (FIG. 1C),
Thereafter, this phosphorus-doped oxide film 15 is selectively etched to form a sidewall 17 having a thickness of about 3000 mm at both ends of the gate electrode 14, including a part of the N- region 16. ((d) in the same figure).

Further, using these field oxide film 12° gate electrode 14 and sidewall 17 as a mask,
A selected main surface of the semiconductor substrate 11 is doped with an N-type impurity, for example arsenic, at 50 KeV.

By implanting ions under the condition of 1015/crn', a high concentration impurity is implanted in the N- region 16 in the source and drain regions, which is a part of the N- region 16 that extends from both ends of the gate electrode I4 by an amount equivalent to the width of the side wall 17. area, that is, N
+ region 18 is formed relatively deeply, and finally, 10
Each of these N-
Activate region 16 and N+ region 18 (FIG. (C)
), thus obtaining an N-channel MOS field effect transistor having the desired LDD structure.

Therefore, in the N-channel MOS field effect transistor constructed by the method of this embodiment, the gate electrode
A part of the N- region 16 as a low-concentration impurity diffusion region that becomes a train region is located near the end of the fourth N- region 16, and a part of the N- region 16, which is a low concentration impurity diffusion region that becomes a train region, is located in the vicinity of the end of the fourth N- region 16. N+ regions 18 as concentrated impurity diffusion regions are formed in each region, and these constitute an LDD structure to improve the drain breakdown voltage of this device.

In this case, the first low concentration impurity diffusion region,
In other words, since the N- region 16 is formed by diffusion from the phosphorus-doped oxide film 15, and the next high concentration impurity diffusion region, that is, the N+ region 16, is formed by arsenic ion implantation, ion implantation is only performed once. This simplifies the manufacturing process and improves productivity.

In the above embodiment method, a case was described in which a phosphorus-doped oxide film was used as the impurity-doped oxide film that served as a diffusion source for the low-concentration impurity diffusion region and as a sidewall at both ends of the gate electrode. , this may be replaced with an oxide film doped with an impurity such as arsenic, or even if the conductivity types of the semiconductor substrate and each impurity diffusion region are reversed, similar actions and effects can be obtained.

〔Effect of the invention〕

As described in detail above, according to the method of the present invention, in the method for forming an LDD structure in a MOS field effect transistor, a first conductor substrate of the first conductivity type on which a gate oxide film and a gate electrode are formed is formed. An oxide film doped with impurities of two conductivity types is deposited, and this is used as a diffusion source to selectively form relatively shallow low-concentration impurity diffusion regions including portions close to both ends of the gate electrode.
After each sidewall is formed, impurities of the second conductivity type are ion-implanted into the low-concentration impurity diffusion region located away from both ends of the gate electrode by the width of each sidewall, and heat-treated to diffuse the high-concentration impurity. Since the region is formed relatively deep, low concentration and
The LDD structure with a high concentration impurity diffusion region can be formed by diffusion from an impurity-doped oxide film and impurity ion implantation and diffusion, making it possible to complete the ion implantation operation, which would otherwise complicate the manufacturing process, only once. This makes it possible to simplify the manufacturing process and improve productivity.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(e) schematically show, in order of process, the main manufacturing steps of a method for forming an LDD structure in an N-channel MOS field effect transistor to which an embodiment of the present invention is applied. Yes, and ′f, Figure 2 (
a) or e) is the same N-channel MOS according to the conventional example.
2A and 2B are cross-sectional views schematically showing the main manufacturing steps of a method for forming an LDD structure in a type field effect transistor in order of process. 11... P-type silicon semiconductor substrate, 12... Field oxide film, 13... Gate oxide film, I4...
...Gate electrode, 15...Phosphorus (N-type impurity) doped oxide film, 16...N- region (low concentration impurity diffusion region), 17...Side wall, 18...N
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Claims (1)

[Claims] A method for forming an LDD structure in a MOS field effect transistor, in which an oxide film doped with impurities of a second conductivity type is first deposited on a semiconductor substrate of a first conductivity type on which a gate oxide film and a gate electrode have been formed. Using this impurity-doped oxide film as a diffusion source, a relatively shallow and selective low-concentration impurity diffusion region is formed on the main surface of the semiconductor substrate, including portions close to both ends of the gate electrode, and then , the impurity-doped oxide film is selectively removed to form sidewalls at both ends of the gate electrode, and then a low Ion-implanting impurities of the second conductivity type into the concentrated impurity diffusion region and heat-treating the regions.
A method of manufacturing a semiconductor device, characterized in that a high concentration impurity diffusion region is formed relatively deeply.