JPH02141112A - Nonlinear amplifier circuit - Google Patents

Abstract

PURPOSE:To increase the emphasis and to improve the S/N by synthesizing an input video signal and a resulting signal from the input video signal or an output video signal passing through a low frequency stop filter or a logarithmic transformation circuit so as to obtain the output video signal. CONSTITUTION:A signal path comprising a low frequency stop filter 2 and a logarithmic transformation circuit 3 has a characteristic having a small gain in a low frequency where passing is limited by the low frequency stop filter 2, having a large gain in a high frequency at a small amplitude and having a small gain at a large amplitude. Thus, the circuit acts like a simple amplifier at a small amplitude of the input video signal. Moreover, the logarithmic transformation circuit 3 is formed by connecting amplitude limit amplifier circuits 41-4N each having a nonlinear characteristic in cascade acting like an amplitude limiter at a large amplitude, then the nonlinear emphasis or nonlinear de- emphasis characteristic is easily obtained even at a very small level region.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a nonlinear amplifier circuit, and in particular, a nonlinear amplifier circuit suitable for a nonlinear emphasis/deemphasis circuit for FM-modulated video signals. Regarding.

(Prior Art) Generally, in a VTR (video tape recorder) or a video disc, a video signal is FM modulated and recorded. When an FM-modulated video signal is recorded, reproduced, and demodulated, the noise after FM demodulation increases as the frequency increases, and this is called triangular noise. As a method to suppress this triangular noise and improve the S/N, emphasis
De-emphasis is known. This uses an emphasis circuit (also called a pre-emphasis circuit) to emphasize (emphasis) the high-frequency components of the video signal and performs FM modulation, and during demodulation, a de-emphasis circuit with characteristics opposite to the emphasis characteristics suppresses the high-frequency components ( It is a technology that does (de-emphasis).

Furthermore, as the recording time of VTRs becomes longer, nonlinear emphasis is also used that changes the amount of emphasis depending on the signal amplitude. As such a nonlinear emphasis circuit, for example, as described in Japanese Patent Laid-Open No. 52-108711, an input signal is passed through a bypass filter and a first
A configuration is known in which the output signal of the diode clipper is inputted to a diode clipper after passing through an amplifier, and the output signal of the diode clipper is added to the input video signal amplified by the amplifier of TJ2.

However, in a nonlinear emphasis circuit with such a configuration, in order to obtain nonlinear emphasis characteristics even in the region where the input signal is at a minute level, a diode clipper is used so that the nonlinear region of the diode of the diode clipper can be used even in the region at a minute level. It is necessary to make the input signal of the first amplifier sufficiently large.

Therefore, if the input signal level is originally high, the output signal amplitude of the first amplifier becomes excessive, causing problems such as waveform distortion and the need to increase the power supply voltage.

(Problems to be Solved by the Invention) As described above, in the conventional nonlinear emphasis circuit that utilizes the nonlinear characteristics of diodes, when trying to obtain nonlinear emphasis characteristics up to the minute level region of the input signal,
There are problems in that the signal amplitude within the circuit becomes excessive, causing waveform distortion, and that the power supply voltage must be increased.

SUMMARY OF THE INVENTION An object of the present invention is to provide a nonlinear amplifier circuit that can obtain nonlinear emphasis/deemphasis characteristics up to the minute level region of an input signal without increasing the signal amplitude excessively.

[Structure of the Invention] (Means for Solving the Problems) A nonlinear amplifier circuit according to the present invention guides an input video signal or an output video signal to a logarithmic conversion means via a filter means for removing a low-frequency component, The basic feature is that a non-linear emphasis characteristic or a non-linear de-emphasis characteristic is obtained by combining the output signal of the converting means and the input video signal in a predetermined polar relationship to obtain an output video signal.

Here, the logarithmic conversion means includes, for example, a plurality of amplitude-limiting amplifying means cascade-connected to the output side of the filter means, and each amplitude-limiting amplifying means includes an amplifying means for amplifying the input signal, an amplifying means for amplifying the input signal, The amplitude limiting means limits the output signal to a predetermined amplitude, and the adding means adds the output signal of the amplitude limiting means and the output signal of the amplifying means (claim 1).

According to another example, the logarithmic conversion means includes a plurality of amplitude limiting means connected in cascade to the output side of the filtering means, and converts the sum of the output signal of the plurality of amplitude limiting means and the output signal of the filtering means. (claim 2).

According to yet another example, the logarithmic conversion means is coupled to a plurality of amplitude adjustment means connected in cascade or in parallel to the output side of the filter means, and both emitters are connected to the output terminal of the filter means and A plurality of emitter-coupled transistor pairs each constituted by a first transistor and a second transistor, each connected to an output terminal of the amplitude:A adjustment means, and whose other base is connected to a reference voltage source, respectively;
A constant current source connected to the emitter coupling point of each of the plurality of emitter-coupled transistor pairs, and commonly connected to the respective collectors of the first transistors and the respective collectors of the second transistors of the plurality of emitter-coupled transistor pairs. A voltage signal proportional to the current flowing through the second constant voltage source is synthesized with the input video signal in a predetermined polarity relationship (claim 3).

(Function) In the nonlinear amplifier circuit of the present invention, the signal path consisting of the filter means for removing low-frequency components of the input video signal or the output video signal and the logarithmic conversion means has a gain that is low in a region where the frequency of the input video signal is low. In a region where the frequency of the input video signal is high, the gain increases as the signal amplitude decreases. Therefore, if the output signal of the logarithmic conversion means and the input video are added by the synthesis means, when the input video signal has a large amplitude, the amount of emphasis (amount of emphasis on high-frequency components) is small, and as the amplitude of the input video signal becomes small, A nonlinear emphasis characteristic in which the amount of emphasis increases is obtained. Furthermore, if the synthesis means performs subtraction, a nonlinear de-emphasis characteristic, which is an inverse characteristic to the nonlinear emphasis, can be obtained.

In this case, since the logarithmic conversion means utilizes the nonlinear input/output characteristics of the amplitude limiting amplification means, for example, unlike conventional nonlinear amplification circuits using diode clippers, it is easy to perform nonlinear engraving and amphasis even in the minute level region. characteristic or nonlinear de-emphasis characteristic is obtained.

Further, since this logarithmic conversion means has a low gain for a large amplitude signal, the input signal amplitude does not become excessive. This suppresses waveform distortion and lowers the power supply voltage.

(Example) Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing a nonlinear amplifier circuit according to a first embodiment of the present invention. In the figure, a video signal inputted from a terminal 1 is supplied to one input terminal of a low-pass removal filter 2 and an adder 5 which is a combining means. The low-pass removal filter 2 is designed to obtain emphasis or de-emphasis characteristics for high-frequency components, and to prevent the input/output characteristics of the logarithmic conversion circuit 3 for AC component input signals from being affected by the DC component of the input signal. It removes low-frequency components including DC components, and its output signal is input to the logarithmic conversion circuit 3. The output signal of this logarithmic conversion circuit 3 is supplied to the other input terminal of an adder 5, and the output signal of the adder 5 is sent to an output terminal 6 as an output video signal.

The logarithmic conversion circuit 3 includes a plurality of (N) amplitude limiting amplifier circuits 41 to
4N connected in cascade, the amplitude limiting amplifier circuit 41 to
4N is an amplifier 11 that amplifies the input signal, and an amplifier 11 that amplifies the input signal and outputs the output signal with a predetermined amplitude (VL).
It is composed of an amplitude limiter 12 that limits the amplitude to , and an adder 13 that adds the output signals of the amplifier 11 and the amplitude limiter 12.

FIG. 2 shows in detail one of the amplitude limiting amplifier circuits 41 to 4N. 12 is composed of transistors 28, 29, emitter resistors 30, 31, constant current source 32, and collector resistor 27. The bases of the transistors 22.28 are connected to the terminal 21 to which the input signal Vin is supplied. Further, a reference voltage V ref' is applied to the bases of the transistors 23 and 29.

The emitters of the transistors 22 and 23 are commonly connected to a constant current source 26 via resistors 24 and 25, respectively. Similarly, the emitter of transistor 28.29 is resistor 30.3
1, and are commonly connected to a constant current source 32 through respective terminals. The collectors of the transistors 22 and 28 are connected to the power supply Vcc, and the collectors of the transistors 23 and 29 are connected to the output terminal 33 and also to the power supply Vcc through a resistor 27 in common.

Compared to the emitter resistance 24.25 in amplifier 11,
The value of emitter resistance 30, 31 in amplitude limiter 12 is set small. In this case, if the conditions other than the emitter resistance are the same for the amplifier 11 and the amplitude limiter 12, the relationship between the gain of the amplifier 11 and the gain Ω of the amplitude limiter 12 is as follows.
Generally, it is kg × g.

Since the sum of the collector currents of both transistors 23.29 flows through the resistor 27 commonly connected to the collectors of the transistors 23.29, the adder shown in FIG. A voltage signal corresponding to the output of adder 13 is obtained.In other words, adder 1
3 is substantially constituted by a resistor 27.

Here, each of the output signals V out of the amplitude limiting amplifier circuits 41 to 4N has an input signal Vin of Vin≦VI, /
I), Vout = V1n・(k+42)・”
(1) becomes. Also, when Vin>VL/ff, V
out=k−Vin+VL−
(2) becomes.

Moreover, when the input signal (input signal of the logarithmic conversion circuit 3) Vil of the first amplitude-limiting amplifier circuit 41 is Vil≦VL/(k+N) I, the first amplitude-limiting amplifier circuit 4I
The output signal Vol of is in a linear relationship with the input signal Vil of the first amplitude limiting amplifier circuit 41.

Next, when amplitude limiting is performed in the first amplitude limiting amplifier circuit 4I (that is, the input signal Vll of the amplitude limiting circuit 4■
is larger than VL/D), the output signal of the N-th amplitude limiting amplifier circuit 4N (output signal of the logarithmic conversion circuit 43) VoN
is VoN-VL (1+ to + to 2+-,,-,)+v
tt (k+jll) I' kN-+...(3) Here, for example, in the case of -1, equation (3) is VoN-VL
(N −1) +V11 N! + 1)...(
4) It becomes.

Input signal Vil and output signal Vo shown by this equation (4)
The relationship between l, ie, the human output characteristics of the logarithmic conversion circuit 3, is shown in a table as shown in FIG. As is clear from FIG. 3, the input/output characteristics of the logarithmic conversion circuit 3 exhibit approximately logarithmic characteristics.

Therefore, the low-pass removal filter 2 and the logarithmic conversion circuit 3 in FIG.
The signal path consisting of has a small gain in the low frequency region whose passage is restricted by the low-pass removal filter 2,
Also, in the high frequency region, the gain is large when the amplitude is small;
It has a characteristic that the gain becomes small when the amplitude is large. For this reason,
If the input video signal and the output signal of the logarithmic conversion circuit 3 are combined (added) with the same polarity in the adder 5, the amount of emphasis will be small when the input video signal has a large amplitude, and the amount of emphasis will be reduced as the amplitude of the input video signal becomes small. Since the amount increases, the first
The nonlinear amplifier circuit shown in the figure is a nonlinear emphasis circuit.

Conversely, if the adder 5 combines (subtracts) the input video signal and the output signal of the logarithmic conversion circuit 3 with opposite polarity, the first
The nonlinear amplifier circuit shown in the figure is a nonlinear de-emphasis circuit.

In addition, in this embodiment, the logarithmic conversion circuit is constructed by cascade-connecting amplitude limiting amplifier circuits 41 to 4N having nonlinear characteristics that operate as a simple amplifier when the amplitude of the input video signal is small and as an amplitude limiter when the amplitude is large. 3, it is possible to easily obtain a nonlinear emphasis characteristic or a nonlinear de-emphasis characteristic even in a minute level region.

Moreover, the logarithmic conversion circuit 3 has a low gain for large amplitude signals, and the internal signal amplitude does not become excessive, so it is possible to suppress the generation of waveform distortion, and also to
c, etc.) can be lowered in voltage.

FIG. 4 shows a nonlinear amplifier circuit according to a second embodiment of the present invention. While the nonlinear amplification circuit shown in FIG. 1 has a feedforward configuration in which an adder 5 adds the input video signal and the signal passed through the low-pass removal filter 2 and the logarithmic conversion circuit 3, the present invention differs. The embodiment has a feedback type configuration. That is, in this embodiment, the output terminal 6
A part of the output video signal sent to the low frequency removal filter 2
and is fed back to the other input terminal of the adder 5 via the logarithmic conversion circuit 3, where it is added to the input video signal from the input terminal 1, and the output signal of the adder 5 is sent to the output terminal 6 as an output video signal. be done. The logarithmic conversion circuit 3 is composed of an amplifier 11, an amplitude limiting circuit 12, and an adder 13, as in FIG.

In this case, if the input video signal and the output signal of the logarithmic conversion circuit 3 are combined with the same polarity using the adder 4, which is the combining means, as in the embodiment shown in FIG. This becomes a nonlinear de-emphasis circuit.

FIG. 5 is a block diagram showing a nonlinear amplifier circuit according to a third embodiment of the present invention, in which the input video signal from the input terminal 1 is input to one of the inputs of the low-pass removal filter 2 and the adder 5, which is a combining means. Supplied at the end. The output signal of the low-pass removal filter 2 is input to the logarithmic conversion circuit 7, and the output signal of the logarithmic conversion circuit 7 is supplied to the other input terminal of the adder 5. The output signal of adder 5 is sent to output terminal 6 as an output video signal.

The logarithmic conversion circuit 7 in this embodiment differs from the logarithmic conversion circuit 3 in FIGS. 1 and 4 in that the low-pass removal filter 2
Amplitude limiters 81 to 8N of N@ are connected in cascade to the output side of
and the output signal of the low-pass removal filter 2 and the amplitude limiter 81
It is constituted by an adder 9 that takes the sum of output signals of ~8N, and the output signal of the adder 9 becomes the output of the logarithmic conversion circuit 7. If the input signal of this logarithmic conversion circuit 7 (the input signal of the first amplitude limiter 81) is Vl, and the output signal (output signal of the adder 9) is 0, then the relationship between the two, that is, the logarithmic conversion circuit 7 The input/output characteristic of is roughly logarithmic as shown in FIG.

FIG. 7 shows a nonlinear amplifier circuit according to a fourth embodiment of the present invention, which has a feedback type configuration in contrast to the feedforward type configuration shown in FIG. That is, a part of the output video signal from the output terminal 6 is input to the low-pass removal filter 2, and the output signal of the low-pass removal filter 2 is sent to the adder via the logarithmic conversion circuit 7 similar to the embodiment shown in FIG. It is fed back to the other input terminal of 5.

In both the embodiments shown in FIGS. 5 and 7, if the adder 5 combines two input signals with the same polarity, a nonlinear emphasis characteristic can be obtained, and if they are combined with opposite polarities, a nonlinear de-emphasis characteristic can be obtained.

Amplitude limiter 81 used in the embodiments of FIGS. 5 and 7
A specific example of ~8N is shown in FIG.

This is a transistor 52.5 whose emitters are connected in common.
3, a constant current source 54 connected to the emitter connection point of transistors 52 and 53, and resistors 55 and 56 connected to the collectors of transistors 52 and 53, respectively, and the base of transistor 52 is A reference voltage source V rer is applied to the base of the transistor 53 connected to the input terminal 51 . The collector of transistor 56 is connected to output terminal 58. Further, in order to improve linearity, a capacitor 57 may be connected between the collectors of the transistors 52 and 53.

FIGS. 9 and 10 show an example of an amplitude limiter that improves the linearity of the output signal for a small amplitude signal that is not subjected to amplitude limitation.

The amplitude limiter shown in FIG. 9 includes a first differential amplifier consisting of transistors 62 and 63 and a constant current source 64 connected to their emitter connections, and transistors 65 and 66 connected to their emitter connections. a second differential amplifier consisting of a constant current i67; the collectors of transistors 62 and 65 are commonly connected to a load resistor 68;
．． The collectors of 66 are commonly connected to a load resistor 69.

The base of the transistor 62.65 is connected to the input terminal 61, and the base of the transistor 63.66 is connected to the reference voltage V.
rel' is applied and the same transistor 963.66
The collector of is connected to the output terminal 70. here,
The emitter area ratio of the transistor 62 and the transistor 65 is l:n (n is any number exceeding l, for example nζ4)
The emitter area ratio of transistor 63 and transistor 66 is selected to be n:1.

According to the configuration shown in FIG. 9, an offset is given to the output current (collector) current of the transistor, and by adding the offset to the output current, linearity is improved especially when a small amplitude signal is input. Ru.

In FIG. 10, input signal Vin from terminal 71 is applied to the base of transistor 72. In FIG.

The emitter of the transistor 72 is connected to a constant current source 74 via a resistor 73, and a signal obtained by adding a DC offset to the input signal Vln is obtained from both ends of the resistor 73.

The signals appearing across this resistor 73 are respectively input to the bases of transistors 76 and 77 whose collectors are connected to the common resistor 75.

On the other hand, the reference voltage V ref' from terminal 78 is applied to the base of transistor 79. Similarly to the transistor 72, the emitter of the transistor 79 is connected to a constant current source 91 via a resistor 90, and a signal obtained by adding a DC offset to the reference voltage V ref is obtained from both ends of the resistor 90. The signal appearing across this resistor 90 is also transmitted by a transistor 93.9 whose collector is connected to a common resistor 92.
It is input to the base of 4.

Emitter of transistor 76.94 and transistor 7
The emitters of 7.93 are connected in common, and each emitter coupling point is connected to a constant current source 95.96, respectively. The output signal V out is then led to the terminal 97 from the collectors of the transistors 93 and 94. With such a configuration, an offset is added to the output current, and linearity is improved as in the case of FIG. 9.

FIG. 11 shows a nonlinear amplifier circuit according to a fifth embodiment of the present invention, in which a logarithmic conversion circuit 10 has an emitter coupled to N-1 cascaded amplitude adjustment circuits 101 to 1ON-1. N emitter-coupled transistor pairs 201 to 2ON configured by first and second transistors Ql and Q2, respectively, and emitter-coupled transistor pair 2
Constant current sources 301 to 3ON connected to respective emitter coupling points of 01 to 2ON, and first and second constant voltage sources 4
01,402.

That is, the input video signal from the input terminal 1 is input to the low-pass removal filter 2, and the output signal of the filter 2 is sequentially input to the amplitude adjustment circuits 101 to 10N-1.
It is input to the base of the first transistor Q1 of the second emitter-coupled transistor pair 201. The output signals of the amplitude adjustment circuits 101 to 10N-1 are input to the bases of the first transistors Q1 of the emitter-coupled transistor pairs 202 to 2ON, respectively. At the base of the second transistor Q2 of the emitter-coupled transistor pair 201-2ON,
A reference voltage V ref' is applied to each.

Further, the collectors of the first transistors Q1 of the emitter-coupled transistor pairs 201-2ON are commonly connected to a first voltage source 401 consisting of a resistor R3 and the transistor Q3, and the collectors of the second transistors Q2 of the emitter-coupled transistor pairs 201-2ON are It is commonly connected to a second voltage source 402 consisting of a resistor R4 and a transistor Q4.

The output terminal of this logarithmic conversion circuit 10 is a second constant voltage source 401
A voltage signal proportional to the current flowing through the second constant voltage source 402 appears here. This voltage signal is input to the other input terminal of the adder 5, and is added to the input video signal from the input terminal 1 which is input to one input terminal of the adder 5, thereby outputting it to the output terminal 6. A video signal is generated.

In the above configuration, each emitter-coupled transistor pair 20
Transistor Ql in 1-2ON.

Q2 base-emitter voltage VBE and collector current 1
The relationship with c, that is, the voltage-current characteristics, is m ” Va
E=fIn(I c + I cEs / I
C[! 5ICES: Collector current at VBE-0 m-q/k Tq: Electron charge: Boltzmann's constant T: Expressed as absolute temperature. In this case, one emitter-coupled transistor pair has a logarithmic characteristic over an input signal amplitude range of about 15 dB.

Therefore, the amplitude adjustment circuit 101-1ON-1 appropriately adjusts the amplitude of the input signal of the emitter-coupled transistor pair 202-2ON, and the emitter-coupled transistor pair 201
By varying the amplitude change ranges of the respective input signals of ~2ON, the logarithmic conversion circuit 10 as a whole exhibits logarithmic characteristics for input signals having a very wide amplitude range.

Figure 11 shows a feedforward type configuration.
A feedback type configuration may be used in which the output video signal to the output terminal 6 is inputted to the low-pass removal filter 2 and the output signal of the logarithmic conversion circuit 10 is fed back to the adder 5 as in FIGS. 4 and 7.

Further, in FIG. 11, the amplitude adjustment circuits 101 to 1ON-1 are connected in cascade, but it goes without saying that similar results can be obtained even if they are connected in parallel.

However, when amplitude adjustment circuits are connected in cascade, each gain may be the same, but when connected in parallel, each gain must be different in order to vary the amplitude range of the input signal of the emitter-coupled transistor pair. .

[Effects of the Invention] As explained above, according to the present invention, an output video signal is obtained by combining an input video signal or a signal obtained by passing an input video signal or an output video signal through a low-pass removal filter and a logarithmic conversion circuit with the input video signal. By obtaining this, it is possible to obtain nonlinear characteristics down to minute input signal amplitudes, and it is possible to increase the amount of emphasis and achieve a significant improvement in S/N.

Furthermore, since the logarithmic conversion circuit according to the present invention does not require the input signal amplitude to be made larger than necessary as is the case when a diode clipper is used, deterioration of waveform characteristics is reduced and the power supply voltage can be lowered. becomes possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a first embodiment of the present invention;
The figure shows a specific example of the amplitude limiting amplifier circuit in Fig. 1, Fig. 3 shows the input/output characteristics of the logarithmic conversion circuit in Fig. 1, and Fig. 4 shows a second embodiment of the present invention. Block diagram, FIG. 5 is a block diagram showing a third embodiment of the present invention,
6 is a diagram showing the input/output characteristics of the logarithmic conversion circuit in FIG. 5, FIG. 7 is a block diagram showing the fourth embodiment of the present invention, and FIGS. 7 and 7, and FIG. 11 is a diagram showing a fifth embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Input terminal, 2... Low frequency removal filter (filter means) 3... Logarithmic conversion circuit, 41-4N... Amplitude limiting amplifier circuit, 5... Adder (synthesizing means) 6.・
- Output terminal, 11... Amplifier, 12... Amplitude limiter, 13... Adder, 7... Logarithmic conversion circuit, 81-8
N... Amplitude limiter, 10... Logarithmic conversion circuit, 101
~ION21...amplitude adjustment circuit, 201~2ON...
・Emitter-coupled transistor pair, Ql...first transistor, Q2...second transistor, 301-3ON
. . . constant current source, 401, 402 . . . first and second constant voltage sources. Applicant's Representative Patent Attorney Takehiko Suzue

Claims (3)

[Claims] (1) A filter means for removing low-frequency components of an input video signal or an output video signal, a plurality of amplitude-limiting amplification means connected in cascade to the output side of this filter means, and a plurality of amplitude-limiting amplification means connected in cascade. The amplitude limiting amplifying means includes an amplifying means for amplifying the input signal, and a synthesizing means for synthesizing the signal passed through the means and the input video signal in a predetermined polarity relationship to generate an output video signal, and the amplitude limiting amplifying means includes an amplifying means for amplifying the input signal, 1. A nonlinear amplifier circuit comprising: amplitude limiting means for amplifying and limiting an output signal to a predetermined amplitude; and addition means for adding an output signal of the amplitude limiting means and an output signal of the amplifying means. (2) a filter means for removing low-frequency components of an input video signal or an output video signal; a plurality of amplitude limiting means cascade-connected to the output side of the filter means; and an output signal of the filter means and the amplitudes of the plurality of amplitudes. It is characterized by comprising an adding means for obtaining the sum of the output signals of the limiting means, and a synthesizing means for synthesizing the output signal of the adding means and the input video signal in a predetermined polarity relationship to generate the output video signal. nonlinear amplifier circuit. (3) filter means for removing low-frequency components of the input video signal or output video signal; a plurality of amplitude adjustment means connected in cascade or parallel to the output side of this filter means; both emitters coupled, one of the a plurality of emitter couplings each constituted by a first and a second transistor whose bases are respectively connected to the output terminal of the filter means and the output terminals of the plurality of amplitude adjustment means, and whose other bases are respectively connected to a reference voltage source; a constant current source connected to the emitter coupling point of each first transistor of the plurality of emitter-coupled transistor pairs; and commonly connected to the collector of the first transistor of each of the plurality of emitter-coupled transistor pairs. a first constant voltage source and a second constant voltage source commonly connected to the collectors of the second transistors of each of the plurality of emitter-coupled transistor pairs; and a voltage signal proportional to the current flowing through the second constant voltage source. and an input video signal in a predetermined polar relationship to generate an output video signal.