JPH02138654A - Inter-system communication system - Google Patents

Abstract

PURPOSE:To improve the instantaneous properties of the inter-system communication which is carried out via a shared memory by sending an interruption signal from the memory to read the communication data when the write of this data is through. CONSTITUTION:An interruption signal transmission part 4 is included in a shared memory 21 and transmits the interruption signals 51 to all process systems except the communication transmitter when the write of the communication data is through. An interruption process part 10 is added to each process system 20 and reads the communication data via the signal 51. The memory 21 transmits the signals 51 to all process systems except the communication transmitter when the write of the communication data 50 is through. The process system receives the signal 51 and reads the data 50 out of the memory 21 via the part 10 to fetch the data if addressed to the process system itself. Thus the data 50 is read based on an interruption. As a result, the instantaneous properties are improved for the inter-system communication.

Description

[Detailed Description of the Invention] [Summary] The present invention relates to an intersystem communication method, and aims to improve the immediacy of intersystem communication performed via a shared storage device, and to write communication data to the shared storage device. , is an inter-system communication method in which all processing systems read the communication data and receive it if it is addressed to its own system, and is provided in the storage device and removes the communication source when writing of the communication data is completed. An interrupt signal sending unit that sends an interrupt signal to all processing systems, and an interrupt processing unit that is provided in each processing system and reads the communication data using the interrupt signal are provided, and when writing of the communication data is finished, the communication data is read from the storage device. It is configured to send an interrupt signal to cause reading.

[Industrial application field]

The present invention relates to improvements in intersystem communication systems.

LCMP (Loose Coupled Muti
Intersystem communication (Processor) system
For inter-processor communication), methods such as using an inter-processor coupling device or communicating via a shared external storage device (hereinafter referred to as DASD; direct access storage device) have been adopted, but the former method requires a small In the case of a large amount of communication, the cost becomes high, and in the latter method, conventionally each processing system periodically battled to read and receive data from the DASD, so there was a problem that it lacked immediacy.

For this reason, there is a need for an intersystem communication system that uses a shared DASD and is instantaneous.

[Conventional technology]

FIG. 4 is an explanatory diagram of an intersystem communication method using a shared DASD.

Figure 4 shows an example of an LCMP system in which multiple CPt1 (processing systems) share the I10 device, etc. A communication area 6 is provided in the shared DASD 5, and intersystem communication is performed in the following manner. be exposed.

That is, when a communication request occurs, the communication source CPU (I system C
PU) is the communication data 50 with the communication destination address attached.
is stored in the shared DASD 5 via the channel 2 of its own system, and the (1) and (2) system CPUs periodically read (patrol) this communication area 6 and receive it if it is addressed to their own system.

[Problems to be Solved by the Invention] As described above, the conventional method in which each prefecture periodically patrols and receives data from a shared DASD has a problem in that communication lacks immediacy.

For this reason, a method of notifying the other party after writing the communication data can be considered, but this requires a notification means between the two and the configuration becomes complicated.

In view of the above problems, it is an object of the present invention to provide an instantaneous intersystem communication method using a shared DASD.

[Means to solve the problem]

In order to achieve the above object, the inter-system communication system of the present invention uses a shared storage device (2
1), which sends an interrupt signal (51) to all processing systems except the communication source when writing of the communication data is completed; , and an interrupt processing section (10) that reads the communication data in response to the interrupt signal.

[For production]

When the shared storage device 21 finishes writing the communication data 50, it sends an interrupt signal 51 to all processing systems except for the communication source, and the processing system that receives this interrupt signal 51 uses the interrupt processing unit 10 to send an interrupt signal 51 to all processing systems except the communication source. The communication data 50 is read from the shared storage device 21, and if it is addressed to the own system, it is taken in.

Since the communication data 50 is read in response to an interrupt in this way, the immediacy of communication is improved.

〔Example] Embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a block diagram of the LCMP system of the embodiment, and FIG. 3 is a communication processing operation flowchart.

In this embodiment, a system-shared DASD (magnetic disk device) is used as the shared storage device 21, and the communication area 6
will be established.

When writing communication data 50, in order to distinguish it from other data, the communication source is CCW and WRIRti & RE.
A PORT command 52 is issued to request transmission of an interrupt signal 51, and the DASD control device 3 notifies the channel control device DCH as the interrupt signal 51 using an "attention" (coded as 51) which is a device status byte.

In Figure 2, 1a+ lb and lc are ■ system CPU and II system C, respectively.
P.U.

■ system CPU (processing system 21), which is ■ system CPU
The configuration illustrated in lc (processor 7, main memory 8
), and 8 is the main memory, which is a storage area for programs that perform data processing, and a CAM for accessing the DASD 5.
(Channel Address Word), CCW (Channel Command Word), an area for receiving communication data 50 (not shown), and a CSW in which attention 51 is set.
C3-storage area 9 for storing (channel status language)
and a storage area for an interrupt processing unit 10; 10 is an interrupt processing unit which is activated when an interrupt is received from the channel control device DCH and an attention 51 is set in the CSW, and which stores the communication area 6 of the DASD 5; 2a, 2b, and 2c are channel control bags belonging to the I, ■, and ■ systems, respectively. &DCH controls writing/reading of DASD 5, and WRIRE & R1
1! When PORT command 52 is issued, DASDfl
C that instructs the J-controlled device 3 to send out the child device 3 and sets the attention 51 at the end of writing.
3 is a DASD control device that performs writing and reading of the DASD 5, and sends an attention 51 to all DCHs except the DCH of the write command light when writing of the communication data 50 is completed. 5 is a DASD CF61 disk device (DASD CF61 disk device) which is shared by I-systems to II-systems, and is provided with a communication area 6 for inter-system communication.

Note that the storage device 21 in FIG. 1 is a DASD controller 3. D
Compatible with ASD5.

In the LCMP system with the above configuration, intersystem communication is performed as follows.

(1) The communication source CPU (I system CPU la) writes the communication data 50 with the address of the communication destination.
The wRrRE & REPORT command 52 is issued by A to instruct the DCH 2a of the own system.

(2) The communication source channel DCH2a reads the communication data 50 from the main memory "8" based on the CC-, transfers it to the DASD control device 3, and instructs the transmission of the attention 51.

(3) When writing of the communication data 50 to the DASD control device DASD 5 is completed, the interrupt signal sending unit 4 sends a message to all channel control devices DCH2b and DCH2c except for the communication source DCII 2a.
Attention 51 is sent to.

(4) DCtl 2b, DCH which received the receiving side channel controller attention 51
2c each stores a C3W with an attention 51 set in a predetermined area of the main memory 8 of its own system, and
Interrupt U.

(5) Receiving side CPU (n system, ■ system CPU) The interrupt processing unit 10 is activated by the attention 51 in the CSW.

(6) Read the communication data 50 from the interrupt processing unit DASD 5, determine whether it is addressed to the own system, and if it is addressed to the own system, receive it.

As described above, when the communication data 50 is written to the shared DASD 5, the DASD control device 3 transmits the attention 51 to all receiving target CPUs, and the communication data 50 is read by interrupt processing.

Therefore, immediacy can be improved compared to conventional periodic reading (patrol), and there is no need to provide dedicated hardware since notification is made using channel interrupts.

〔Effect of the invention〕

The present invention provides an intersystem communication method that generates an interrupt to all receiving target systems when communication data writing is completed, especially in intersystem communication using a shared DASD, without providing a dedicated notification means. The effects of immediate intersystem communication are significant.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the principle of the present invention, FIG. 2 is a block diagram of an LCMP system according to an embodiment, FIG. 3 is a communication processing operation flowchart, and FIG. 4 is an explanatory diagram of an intersystem communication method using a shared DASD. In the figure, 1.1a+lb, Ic is CPU, 2.2a
, 2b, 2c are channels, 3.13 is a DASD control device, 4 is an interrupt signal sending unit, 5 is a magnetic disk device, D
ASD, 6 is a communication area, 7 is a processor, 8 is a main memory, 9 is a C8 storage area, 10 is an interrupt processing unit, 20 is a processing system, 21 is a storage device, 50 is communication data, 51 is an interrupt signal, attention , Fig. 1 Fig. 2 Communication processing operation flowchart Fig. 3

Claims (1)

[Claims] An intersystem communication method in which communication data (50) is written in a shared storage device (21), and all processing systems (20) read the communication data and receive it if it is addressed to its own system. an interrupt signal sending unit (4) provided in the storage device (21) and sending out an interrupt signal (51) to all processing systems except the communication source when writing of the communication data is completed; and each processing system. (20) is provided with an interrupt processing unit (10) that reads the communication data in response to the interrupt signal, and when writing of the communication data is completed, an interrupt signal (51) is sent from the shared storage device to cause the communication data to be read. An intersystem communication method characterized by: