JPH02122593A - Manufacture of printed wiring board - Google Patents

Abstract

PURPOSE:To simply manufacture a printed wiring board having excellent adhesion between a circuit and an insulated substrate and high concentration by forming a thin layer consisting of an oxide on a temporary holding base material and laminating insulating organic materials for removing the holding base material followed by performing deoxidation treatment and forming a plated circuit pattern by plating. CONSTITUTION:For instance, a copper oxide thin film 2 is formed on a teflon tape 1, and after pressure adhesion of an insulating organic glass cloth - epoxy prepreg 3 and a copper oxide 2 face followed by peeling and removing a teflon film 1 to be dipped in a reducer water solution to deoxidize a copper oxide layer. Next, non-electrolytic copper plating 4 is performed. After flashing and drying, photoresists are laminated and irradiated with ultraviolet rays; developing fluid is sprayed and developed; resist patterns 5 are formed; then non- electrocopperplating (copper sulfate plating) is performed to form copper patter 6.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a method for manufacturing printed wiring boards.

(Prior technology) The methods for manufacturing printed wiring boards include the etched foil method, in which circuits are processed by etching a copper-clad laminate, and the etched foil method, in which a conductive metal is plated to a desired thickness on an insulating substrate by electroless plating to form a wiring pattern. Further, there has been proposed an additive method for forming a thin base metal layer on an insulating substrate, and an unclad method for performing circuit processing by forming a plating resist, pattern plating, removing the plating resist, and quick etching.

(Problems to be Solved by the Invention) In the etched foil method, there is a problem of side etching, making it difficult to manufacture high-density wiring boards. In the additive method, the surface of the substrate with the contact agent layer must be treated with a roughening liquid, and most of the roughening liquids that can be used in this case contain oxidizing agents and are highly toxic, resulting in a poor working environment. and special waste liquid treatment is required. In addition, components soluble in the roughening solution generally have poor electrical insulation properties. For example, there is deterioration in moisture-resistant insulation properties and high-temperature insulation properties. Also,
Since the adhesive layer has low heat resistance and a high dimensional change rate, there are limits to its application to multilayer printed wiring boards that require high dimensional accuracy and through-hole connection reliability.

The fineness and high density of wiring boards in the uncladding method depend on the thickness of the underlying metal layer.

That is, the thinner the underlying metal layer to be etched, the higher the etching accuracy. Therefore, when forming a high-density wiring board, the base is a copper-clad laminate using copper foil as thin as 5 to 9 μm, but aluminum foil (approximately 50 μm thick), which is the carrier of the copper foil, is used as the base! There are disadvantages such as the need to dynamically or chemically remove the first layer.

There is also a method of processing circuits by applying electroless plating on a rough surface with good adhesiveness formed by a replica method using a substrate with a rough surface, but this requires a step to form a rough surface as an original. be.

The present invention has excellent adhesive strength between the circuit and the insulating substrate, and
The present invention provides a method for manufacturing a high-density printed wiring board through simple steps.

(Means for Solving the Problems) In the present invention, first, a thin layer made of a metal oxide is formed on a temporary holding base material by a vacuum evaporation method, a sputtering method, or the like.

The thickness of the oxide layer to be formed is approximately 0.05 to 2.0 μm. Next, an insulating organic material is laminated, and the holding base material is removed.

Next, the thin layer on the surface of the insulating organic material is subjected to a reduction treatment to form a metal and/or conductive suboxide. The desired metallic copper layer is then applied by zero-order electroless plating or a combination of electroless copper and electrolytic copper plating. The plating circuit pattern is formed to the full thickness.

FIG. 1 (al-te+ shows one embodiment of the present invention.

Teflon tape with product name manufactured by Chias, medium 1501)l
Above is a vacuum evaporation device EBV-6DA (manufactured by Nippon Vacuum Technology Co., Ltd.)
A copper oxide thin layer 2 with a thickness of 1.0 μm is formed by electron beam evaporation using a copper oxide thin layer 2 (see Figs. (al, (bl)).

Vapor deposition source Copper oxide acceleration voltage 6KV Beam current 0.8A Pressure 1. OX 10-'Torr heating temperature 100°C oxygen gas 33CCM As the oxide, not only copper oxide but also cuprous oxide, nickel oxide, etc. can be used.

In addition to fluororesin films, the temporary holding base materials that can be used in this case include polyethylene terephthalate films, polyimide films, metal plates coated with fluorine or polyimide resins that have been roughened for adhesion, and glass. Examples include plates, mirror-finished stainless steel plates, and the like.

Next, the insulating organic glass cloth-epoxy prepreg 3 and the oxidized W42 surface are bonded together under pressure (Fig. 1 (C1). The lamination conditions are a molding pressure of 35 kg/aJ and a temperature of 170°C for 60 minutes. The oxidized M42 Other examples of the insulating organic base material to be laminated after formation include glass cloth, resin sheets, etc. impregnated with thermosetting resins used in general copper-clad laminates, such as modified polyimide, polyimide, and phenol. Thermoplastic materials such as polyethylene, polyethersulfone, polyetherimide, etc. can also be used.

Next, the Teflon film 1 was peeled off, and a reducing agent aqueous solution (sodium borohydride 2 g/L NaOHL 2.
5 g/, ilI! The copper oxide layer is reduced by immersing it in a temperature of 55° C. for 10 minutes.

2° is reduced copper and/or cuprous oxide. In this case, formalin, hypophosphorous acid,
One or more of sodium hypophosphite, hydrazine hydrate, hydrazine sulfate, N,N'trimethylborazane, N,N'-dimethyliborazane, etc. may be dissolved therein.

Next, electroless copper plating 4 is performed with the following composition and conditions.

Cu5O-・5Hz O=10g/I EDTA・4Na=40g/l pH=12.3 37%HCHO=3ml/1 Plating solution addition amount = small amount Plating solution temperature = 70℃ Plating film thickness = 3μm Note that copper oxide If cuprous oxide is deposited instead, electroless plating can be performed without going through the reduction treatment step.

After washing with water and drying, the photoresist was laminated using a roll laminator, a positive mask was applied, and ultraviolet rays were irradiated, followed by spraying a developer and developing. The lines/spaces of the formed resist pattern 5 are 50 μm and 750 μm (
fdl in FIG. 1), and then electrolytic copper plating (copper sulfate plating) was applied to form a copper pattern 6 with a thickness of 30 μm at a desired portion.

First, remove the resist pattern 5 with methylene chloride and etch part of the electroless plating layer 5 and the copper and/or copper oxide layer 2° formed by reduction with an ammonium persulfate solution (concentration: 50 g/l liquid level = 45°C). Figure cd)), a desired wiring pattern 6 was obtained. As the etching solution in this case, oxygen-based etchants such as copper and iron salts of ammonium persulfate, and the above-mentioned alkaline-based etchants (polyammonium persulfate-based) can be used.

After peeling off the Teflon film l in the above process,
The wiring pattern can also be obtained by various processes such as those described below.

A. Form a resist pattern, reduce the copper oxide exposed outside the resist pattern area, form a pattern 6 with the desired thickness by electroless plating, peel off the resist pattern, and remove the copper oxide exposed at the bottom of the resist pattern. How to remove copper oxide by tight etching.

B. Forming a resist pattern, reducing copper oxide exposed outside the resist pattern area, and forming a pattern with a desired thickness using a combination of electroless plating and electroplating;
A method of peeling off the resist pattern and using quick etching to remove the copper oxide located at the bottom of the resist pattern.

C. Form a resist pattern and remove copper oxide exposed outside the resist pattern area by quick etching.
A method in which after the resist pattern is removed, the remaining copper oxide is reduced and electroless plating is applied.

D. Copper oxide 2 is reduced, and after forming a resist pattern, electroless plating or a combination of electroless plating and electroplating is used to form a pattern 6 of desired thickness, and after peeling off the resist pattern, reduction. A quick etching method to remove generated copper or cuprous oxide.

In the present invention, the thickness and shape of the metal and/or suboxide produced on the persimmon substrate by the reduction treatment are determined by the thickness of the metal oxide layer formed on the holding substrate or the conditions in the reduction treatment step. It can be adjusted by changing as appropriate.

The adhesion force of the suboxide and/or metal produced by reduction to the resin substrate depends on the adhesion force of the oxide to the resin substrate, and can be adjusted by changing the shape of the oxide depending on the vapor deposition conditions.

(Effect of the invention) According to the present invention, the following effects could be obtained.

(1) It was possible to produce a high-density printed wiring board with excellent in-line precision and insulation properties by etching, and high adhesive strength with wiring metal.

(2) Since the surface of the metal or suboxide produced by reduction has fine irregularities, roughening treatment for resist pattern formation is not necessary, and furthermore, a catalyst treatment process for electroless plating is not necessary. , throughput was significantly improved.

(3) Compared to the replica method, it is easier to form an adhesive layer (for example, a cuprous oxide or copper layer in the shape of copper oxide) and it can be used directly as a base layer for wiring formation, reducing costs and increasing productivity. We were able to improve this.

[Brief explanation of the drawing]

Figures 1 (al to e) are cross-sectional views showing the method of the present invention. Explanation of symbols 1 Holding base material 2 #I cupric copper and/or cuprous oxide layer prepreg electroless copper plating resist (b) (c) (e) Figure

Claims (1)

[Claims] 1. A process of forming a thin layer of oxide on a temporary holding base material, layering an insulating organic material on the surface of this thin layer, removing the holding base material, and plating a conductive metal after contacting with a reducing agent solution. A method for manufacturing a printed wiring board characterized by performing circuit processing including.