JPH02121355A - Ceramic multilayer substrate - Google Patents
Ceramic multilayer substrateInfo
- Publication number
- JPH02121355A JPH02121355A JP27417388A JP27417388A JPH02121355A JP H02121355 A JPH02121355 A JP H02121355A JP 27417388 A JP27417388 A JP 27417388A JP 27417388 A JP27417388 A JP 27417388A JP H02121355 A JPH02121355 A JP H02121355A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- layer
- layers
- laminated
- hollowed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 30
- 239000000919 ceramic Substances 0.000 title claims abstract description 10
- 239000003507 refrigerant Substances 0.000 claims description 17
- 238000010030 laminating Methods 0.000 claims description 3
- 239000002826 coolant Substances 0.000 abstract description 8
- 239000000498 cooling water Substances 0.000 abstract description 5
- 238000000034 method Methods 0.000 abstract description 5
- 238000001816 cooling Methods 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 229920000954 Polyglycolide Polymers 0.000 description 3
- 235000010409 propane-1,2-diol alginate Nutrition 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明はIC等の半導体装置などを実装するための基板
に関し、更に詳しくは、シート状セラミックスを多層に
積層した基板に関する。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a substrate for mounting semiconductor devices such as ICs, and more particularly to a substrate in which sheet-shaped ceramics are laminated in multiple layers.
〈従来の技術〉
近年、半導体素子の高速化や高集積化に伴い、その発熱
が問題となっている。特に、PGA(ビングリッドアレ
イ)やハイブリッドIC等においては、素子の高密度化
に伴って集中的に熱が発生する。<Prior Art> In recent years, as semiconductor devices have become faster and more highly integrated, heat generation has become a problem. Particularly in PGAs (bin grid arrays), hybrid ICs, and the like, heat is intensively generated as the density of elements increases.
従来、このような熱を外部に放出するための技術として
、金属ベース基板を用いたり、あるいはPGAに放熱器
を装着する等の技術が知られている。Conventionally, as techniques for dissipating such heat to the outside, techniques such as using a metal base substrate or attaching a heat sink to the PGA are known.
〈発明が解決しようとする課題〉
従来の放熱技術のうち、金属ベース基板では高密度多層
配線が困難であるし、また、放熱器付PGAでは小型化
が困難である。<Problems to be Solved by the Invention> Among conventional heat dissipation techniques, it is difficult to achieve high-density multilayer wiring with a metal base substrate, and it is difficult to miniaturize a PGA with a heat sink.
本発明の目的は、小型で放熱(冷却)効果が高く、しか
も、高密度多層配線等にも容易に対応できる回路基板を
提供することにある。An object of the present invention is to provide a circuit board that is small in size, has a high heat dissipation (cooling) effect, and can be easily adapted to high-density multilayer wiring.
〈課題を解決するための手段〉
上記の目的を達成するため、本発明では、3層以上のシ
ート状セラミックスを積層して基板を形成し、その最上
層および最下層を除く中間層のうち、少なくとも1つの
層を部分的に刺り貫き、この刳り貫き部を直接もしくは
他の層を介して基板の外方に連通させ、全体として入口
と出口を備えた冷媒通路を基板の内部に形成している。<Means for Solving the Problems> In order to achieve the above object, in the present invention, three or more layers of sheet-like ceramics are laminated to form a substrate, and among the intermediate layers excluding the top layer and bottom layer, At least one layer is partially pierced, and the hollow portion is communicated directly or through another layer to the outside of the substrate, thereby forming a coolant passageway with an inlet and an outlet within the substrate as a whole. ing.
く作用〉
基板の内部に冷媒通路が形成されるので、この通路内に
冷却水等を導くことによって、基板上に搭載されたIC
等から発生する熱はこの基板を介して冷却水等によって
強制的に奪われる。A coolant passage is formed inside the board, so by guiding cooling water etc. into this passage, the IC mounted on the board can be cooled.
The heat generated from the substrate is forcibly removed by cooling water and the like through this substrate.
積層基板であるから、冷媒通路を避けることにより多層
配線も可能である。Since it is a laminated board, multilayer wiring is possible by avoiding refrigerant passages.
〈実施例〉
第1図は本発明実施例の外観図で、第2図はその分解斜
視図である。<Embodiment> FIG. 1 is an external view of an embodiment of the present invention, and FIG. 2 is an exploded perspective view thereof.
基板は3層のアルミナ等のシート状セラミックス1.2
および3を積層して形成されており、その内部に基板表
面に沿ってコ字形に伸びる冷媒通路4が形成されている
。そして、この冷媒通路4は、基板の端面において冷媒
人口5および冷媒出口6に連通している。The substrate is 3 layers of sheet-like ceramics such as alumina 1.2
and 3 are laminated, and a refrigerant passage 4 extending in a U-shape along the surface of the substrate is formed therein. The refrigerant passage 4 communicates with a refrigerant port 5 and a refrigerant outlet 6 at the end surface of the substrate.
冷媒通路4と冷媒人口5、出口6は、最上の第1層1と
最下の第3層3で挾まれた第2層2にコ字形の制り貫き
部2aを設けることによって形成される。The refrigerant passage 4, the refrigerant population 5, and the outlet 6 are formed by providing a U-shaped punch-through portion 2a in the second layer 2 sandwiched between the uppermost first layer 1 and the lowermost third layer 3. .
すなわち、各層の積層前のグリーンシートの状態におい
て、第2層2に刳り貫き部2aを形成するわけである。That is, the hollow portion 2a is formed in the second layer 2 in the state of the green sheet before lamination of each layer.
その製法は、例えば通常の多層基板と同様に、グリーン
シートから第1〜第3層1〜3を基板の大きさにあわせ
て切り出し、このうち第2層2を打ち抜いて刳り貫き部
2aを形成した後、各層を積層して焼成する。あるいは
、第2層2は刳り貫き部2aによって実質的には2葉(
2a、2b)となるから、これらの各層2a2bをグリ
ーンシートから個別に切り出して位置合わせをして積層
してもよい。The manufacturing method is, for example, like a normal multilayer board, the first to third layers 1 to 3 are cut out from a green sheet according to the size of the board, and the second layer 2 is punched out to form a hollow part 2a. After that, each layer is laminated and fired. Alternatively, the second layer 2 has substantially two leaves (
2a, 2b), each of these layers 2a2b may be individually cut out from the green sheet, aligned, and laminated.
以上の本発明実施例において、冷媒人口5と冷媒出口6
に適当な口金等を固着し、冷却水等を冷媒通路4内に導
いて循環させることによって基板全体が冷却され、例え
ば第1層1上に装着されたIC等からの熱を有効に奪う
ことができる。In the above embodiment of the present invention, the refrigerant population 5 and the refrigerant outlet 6
By fixing a suitable cap or the like to the cooling water and circulating cooling water or the like into the coolant passage 4, the entire board is cooled, and heat from, for example, an IC mounted on the first layer 1 is effectively removed. Can be done.
第3図は本発明の他の実施例の外観図で、第4図はその
分解斜視図である。FIG. 3 is an external view of another embodiment of the present invention, and FIG. 4 is an exploded perspective view thereof.
この例では、4層のシート状セラミックス11〜14を
積層して基板を形成しており、冷媒通路15は中間層で
ある第2および第3層12および13の双方にまたがっ
て形成され、基板端面の冷媒人口16と冷媒出口17に
連通している。In this example, four layers of sheet-like ceramics 11 to 14 are laminated to form the substrate, and the refrigerant passage 15 is formed across both the second and third layers 12 and 13, which are intermediate layers, to form the substrate. It communicates with the refrigerant port 16 and the refrigerant outlet 17 on the end face.
すなわち、第2層12にはその一端面に冷媒入口・出口
16・17に対応する刳り貫き部12a・12bと、こ
れと所定の距離を隔てて上述の一端面に平行に伸びる9
jり貫き部12cが形成され、また、第3層13には、
第2層12の9jり貫き部12a、12b間のピッチと
等しいピッチで互いに平行に伸びる2つの刳り貫き部1
3a、13bが形成されている。That is, the second layer 12 has hollow portions 12a and 12b corresponding to the refrigerant inlets and outlets 16 and 17 on one end surface thereof, and hollow portions 9 extending parallel to the above-mentioned one end surface at a predetermined distance from the hollow portions 12a and 12b.
A piercing portion 12c is formed in the third layer 13.
Two hollow parts 1 extending parallel to each other at a pitch equal to the pitch between the hollow parts 12a and 12b of the second layer 12
3a and 13b are formed.
そして、この第2、第3層12.13を挟んで第1、第
4層11.14が積層され、この積層状態で各刳り貫き
部が12 a −+ 13 a −+ 12 c →1
3 b→12bと互いに連通ずるよう構成されている。Then, the first and fourth layers 11.14 are stacked with the second and third layers 12.13 in between, and in this stacked state, each hollow portion is 12 a −+ 13 a −+ 12 c →1
3b → 12b and are configured to communicate with each other.
以上のように冷媒通路15を複数層に亘って形成するこ
とにより、4層以上の多層の基板に対しても充分な冷却
効果が得られる。また、適当に9jり貫き部を層間で分
担させることで、第1図、第2図に示した例のように制
り貫き部を形成することによりシートが2葉に分離され
ることがなく、積層時の位置合わせが容易になるという
効果もある。By forming the refrigerant passages 15 over multiple layers as described above, a sufficient cooling effect can be obtained even for a multilayer board of four or more layers. In addition, by appropriately distributing the 9j perforations between layers, the sheet will not be separated into two sheets by forming perforations as in the examples shown in Figures 1 and 2. This also has the effect of facilitating positioning during stacking.
以上の各実施例において、各層の積層前にスルーホール
を設けるとともに、各層の表面に導体を印刷しておくこ
とによって、多層配線基板として用いることが可能であ
る。ただし、スルーホール形成位置や導体印刷位置は冷
媒通路を避ける必要がある。In each of the above embodiments, by providing through holes before laminating each layer and printing conductors on the surface of each layer, it is possible to use it as a multilayer wiring board. However, it is necessary to avoid refrigerant passages at the through-hole forming position and conductor printing position.
なお、本発明は5層以上の多層基板にも適用できるし、
冷媒通路はその中間の3層以上に亘って形成し得ること
は勿論である。Note that the present invention can also be applied to multilayer substrates with five or more layers,
Of course, the refrigerant passage can be formed over three or more intermediate layers.
また、冷媒入口、出口については、基板端面のほか、最
上層または最下層に貫通孔を穿つことにより、基板の表
面または裏面に形成することも可能である。In addition to the end surface of the substrate, the coolant inlet and outlet can also be formed on the front or back surface of the substrate by drilling through holes in the top or bottom layer.
〈発明の効果〉
以上の説明したように、本発明によれば、基板の内部に
冷媒通路が形成されるので、基板上に装着されたIC等
はこの基板を介して強制的に冷却され、PAGやハイブ
リッドIC等の発熱の大きい素子を装着してもこれを充
分に冷却することができる。<Effects of the Invention> As explained above, according to the present invention, since the coolant passage is formed inside the board, the ICs etc. mounted on the board are forcibly cooled through this board. Even if a large heat generating element such as a PAG or hybrid IC is installed, it can be sufficiently cooled.
また、基板外部に放熱器等を設ける必要がないのでコン
パクトで、しかも高密度多層配線にも容易に対処できる
。Furthermore, since there is no need to provide a heat sink or the like outside the board, it is compact and can easily handle high-density multilayer wiring.
更に、従来のセラミックス多層基板と同等の工程で、そ
の積層前に適宜のものに打ち抜き等を施すだけで製造で
き、コストがさほど上がらないという効果もある。Furthermore, it can be manufactured in the same process as conventional ceramic multilayer substrates by simply punching out appropriate parts before laminating them, which has the effect that the cost does not increase significantly.
第1図は本発明実施例の外観図、
第2図はその分解斜視図、
第3図は本発明の他の実施例の外観図、第4図はその分
解斜視図である。
1.2.3・・・シート状セラミックス2a・・・制り
貫き部Fig. 1 is an external view of an embodiment of the present invention, Fig. 2 is an exploded perspective view thereof, Fig. 3 is an external view of another embodiment of the invention, and Fig. 4 is an exploded perspective view thereof. 1.2.3... Sheet-like ceramics 2a... Puncture part
Claims (1)
において、最上層および最下層を除く中間層のうち、少
なくとも1つの層が部分的に刳り貫かれ、この刳り貫き
部が直接もしくは他の層を介して少なくとも2箇所で当
該基板の外方に連通し、全体として入口および出口を備
えた冷媒通路が基板内に形成されていることを特徴とす
る、セラミックス多層基板。In a substrate formed by laminating three or more layers of sheet-like ceramics, at least one layer is partially hollowed out among the intermediate layers excluding the top layer and the bottom layer, and this hollow portion directly or through the other layers. 1. A ceramic multilayer substrate, characterized in that a refrigerant passage is formed in the substrate, communicating with the outside of the substrate at at least two places via the substrate, and having an inlet and an outlet as a whole.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27417388A JPH02121355A (en) | 1988-10-28 | 1988-10-28 | Ceramic multilayer substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27417388A JPH02121355A (en) | 1988-10-28 | 1988-10-28 | Ceramic multilayer substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02121355A true JPH02121355A (en) | 1990-05-09 |
Family
ID=17538054
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP27417388A Pending JPH02121355A (en) | 1988-10-28 | 1988-10-28 | Ceramic multilayer substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02121355A (en) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5575872A (en) * | 1993-09-20 | 1996-11-19 | Fujitsu Limited | Method for forming a ceramic circuit substrate |
JP2002314281A (en) * | 2001-04-16 | 2002-10-25 | Hitachi Ltd | Electric system with cooling water channel |
US6665185B1 (en) * | 2002-10-09 | 2003-12-16 | Ltx Corporation | Apparatus and method for embedded fluid cooling in printed circuit boards |
JP2007258458A (en) * | 2006-03-23 | 2007-10-04 | Toyota Motor Corp | Cooler |
JP2009512215A (en) * | 2005-10-13 | 2009-03-19 | インテル・コーポレーション | Integrated microchannel for 3D through silicon architecture |
JP2009212316A (en) * | 2008-03-05 | 2009-09-17 | Calsonic Kansei Corp | Heat exchanger |
WO2010125814A1 (en) * | 2009-04-28 | 2010-11-04 | 株式会社フジクラ | Device mounting structure and device mounting method |
JP2014053359A (en) * | 2012-09-05 | 2014-03-20 | Hitachi Information & Telecommunication Engineering Ltd | Cooling jacket, and cooling system using the same |
JP2016171343A (en) * | 2011-07-28 | 2016-09-23 | 京セラ株式会社 | Passage member, heat exchanger and electronic component device using the same, and semiconductor manufacturing apparatus |
WO2019107400A1 (en) * | 2017-11-28 | 2019-06-06 | 京セラ株式会社 | Electronic element mounting substrate, electronic device, and electronic module |
-
1988
- 1988-10-28 JP JP27417388A patent/JPH02121355A/en active Pending
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5575872A (en) * | 1993-09-20 | 1996-11-19 | Fujitsu Limited | Method for forming a ceramic circuit substrate |
JP2002314281A (en) * | 2001-04-16 | 2002-10-25 | Hitachi Ltd | Electric system with cooling water channel |
JP4626082B2 (en) * | 2001-04-16 | 2011-02-02 | 株式会社日立製作所 | Electric device with cooling channel |
US6665185B1 (en) * | 2002-10-09 | 2003-12-16 | Ltx Corporation | Apparatus and method for embedded fluid cooling in printed circuit boards |
JP2009512215A (en) * | 2005-10-13 | 2009-03-19 | インテル・コーポレーション | Integrated microchannel for 3D through silicon architecture |
JP2007258458A (en) * | 2006-03-23 | 2007-10-04 | Toyota Motor Corp | Cooler |
JP4699253B2 (en) * | 2006-03-23 | 2011-06-08 | トヨタ自動車株式会社 | Cooler |
JP2009212316A (en) * | 2008-03-05 | 2009-09-17 | Calsonic Kansei Corp | Heat exchanger |
JP4509197B2 (en) * | 2008-03-05 | 2010-07-21 | カルソニックカンセイ株式会社 | Heat exchanger |
WO2010125814A1 (en) * | 2009-04-28 | 2010-11-04 | 株式会社フジクラ | Device mounting structure and device mounting method |
JP4942857B2 (en) * | 2009-04-28 | 2012-05-30 | 株式会社フジクラ | Device mounting structure and device mounting method |
JP2016171343A (en) * | 2011-07-28 | 2016-09-23 | 京セラ株式会社 | Passage member, heat exchanger and electronic component device using the same, and semiconductor manufacturing apparatus |
JP2014053359A (en) * | 2012-09-05 | 2014-03-20 | Hitachi Information & Telecommunication Engineering Ltd | Cooling jacket, and cooling system using the same |
WO2019107400A1 (en) * | 2017-11-28 | 2019-06-06 | 京セラ株式会社 | Electronic element mounting substrate, electronic device, and electronic module |
JPWO2019107400A1 (en) * | 2017-11-28 | 2020-11-19 | 京セラ株式会社 | Electronic element mounting boards, electronic devices and electronic modules |
US11276617B2 (en) | 2017-11-28 | 2022-03-15 | Kyocera Corporation | Electronic device mounting board, electronic package, and electronic module |
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