JPH02121045A - Microprocessor with access protecting function - Google Patents

Abstract

PURPOSE:To easily execute access protecting processing by generating a non maskable interrupt and jumping to an address registered in an NMI (Non Maskable Interrupt) register when a program generates an access contravention. CONSTITUTION:When the title microprocessor starts its memory access cycle, a comparator 7 compares an access address to be sent from an address generator 6 with the contents of an area upper limit register 2, and when the address is <= the contents, the comparator 7 compares the address with the contents of an area lower limit register 3. As the result, when the address is >= a lower limit value indicated in the area lower limit register 3, the comparator 7 sends a signal to indicate the occurrence of an address inhibition contravention to an NMI controller 9. At this time, the non maskable interrupt is generated, memory access is not actually executed, and jumping to the address registered in an NMI register 4 is executed. Thus, access can be easily protected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprocessor, and particularly to access protection processing during memory access.

[Conventional technology]

Conventionally, access protection for microprocessors is based on c
The first method is to protect access by changing the rty operation mode and setting access rights, and the second method is to insert certain kinds of instructions into the program in advance and check the access range. There is.

[Problem to be solved by the invention]

The above-mentioned conventional access protection has the drawback that the first method requires extensive settings for protection, and it is difficult to change the settings once they have been set. on the other hand.

The second method requires the check instruction to be inserted into the program in advance, and has the disadvantage that it has no meaning unless it is inserted at an appropriate position.

[Means to solve the problem]

In order to solve the above-mentioned drawbacks, the microprocessor according to the present invention has a means for setting an access prohibited area using an access protect register in which an address is registered, a means for generating a non-maskable interrupt when an access prohibition violation occurs, and an access protection register that registers an address. The present invention is characterized in that it has an access protection function by means of jumping to an address registered in an access protection register without actually accessing the memory when a prohibition violation occurs.

[For production]

The group consists of an area upper limit register, an area lower limit register, and an NMI register.

When the microprocessor accesses memory, it compares the memory address with the contents of the area upper limit register and the area lower limit register, and if it is within the set area, it is assumed that an access prohibition violation has occurred and the contents of the NM register are set to the program counter. make a copy. In other words, when a program causes an access violation, a non-maskable interrupt is generated and a jump is made to the address registered in the NM register.

〔Example〕

Next, examples of the present invention will be described. FIG. 1 is a conceptual diagram of an embodiment of the present invention.

Access protection register group A PR (Access
Protection RegiStars) 1 is the area upper limit register ULR (Upper Lim1t
definition Register) 2 and area lower limit register LLR (LowerLimit def
initiation Register) 3 and NM Eregister NMR (Non Maskable 1nte)
It consists of six registers: 4 (rruptaddress Register).

When the microprocessor enters a memory access cycle, the comparator 7 first compares the address to be accessed sent from the address generator 6 with the contents of ULR2, and if the address is less than that, the comparator 7 moves on to the next address. Compare with the contents of LLR3. As a result, if the address is greater than or equal to the lower limit indicated by LLR 3, comparator 7 sends a signal to NM controller 9 indicating that an address prohibition violation has occurred. At this time, the NM controller 9 saves the current program counter PC (Program Counter) 5 and flag register to the stack, and then copies the contents of the NMR 4 to the program counter 5.

〔Effect of the invention〕

As explained above, according to the present invention, access protection can be easily performed using a group of access protection registers. Especially in the Fullti Tasks OS.

Since access protection can be performed independently for each task, damage to the entire system can be reduced when a task goes out of control. Furthermore, error recovery can be performed on a task-by-task basis, which has the effect of improving the reliability of the entire system.

Furthermore, when debugging, the access protection register UL
By setting R and LLR to the same value, address breaks can be processed with a simple monitor. This also has the effect of reducing the burden on debugging software.

[Brief explanation of the drawing]

FIG. 1 is a conceptual diagram of an embodiment of the present invention. In the figure, 1 is a group of access protection registers. 2 is an area upper limit register, and 3 is an area lower limit register. 4 is the NM register, and 5 is the program counter. 6 is an address generator, 7 is a comparator, and 9 is an NM controller.

Claims (1)

[Claims] 1. A means for setting an access prohibited area using an access protect register in which an address is registered, a means for generating a non-maskable interrupt when an access prohibition violation occurs, and a means for actually preventing access to memory when the access prohibition violation occurs. A microprocessor having an access protection function, characterized in that the microprocessor includes means for jumping to an address registered in an access protection register.