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JPH02113596A - Printed circuit board - Google Patents

Printed circuit board

Info

Publication number
JPH02113596A
JPH02113596A JP26652588A JP26652588A JPH02113596A JP H02113596 A JPH02113596 A JP H02113596A JP 26652588 A JP26652588 A JP 26652588A JP 26652588 A JP26652588 A JP 26652588A JP H02113596 A JPH02113596 A JP H02113596A
Authority
JP
Japan
Prior art keywords
pads
printed circuit
solder
leads
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26652588A
Other languages
Japanese (ja)
Inventor
Yasuhiro Nonaka
野中 康広
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP26652588A priority Critical patent/JPH02113596A/en
Publication of JPH02113596A publication Critical patent/JPH02113596A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To prevent a solder bridge or a short-circuit between leads from generating by a method wherein blocks for preventing the generation of the solder bridge or the short-circuit between leads are provided between pads. CONSTITUTION:Pads 2 for mounting a semiconductor integrated circuit are provided on a substrate 4, blocks 3 consisting of a solder resist are provided between the pads and lead parts 1 are respectively provided on the pads 2. The solder resist is normally used as a material, which covers conductor patterns on a printed circuit board to insulate them, and is widely used. Thereby, the generation of a solder bridge or a short-circuit between the leads can be prevented.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はプリント回路基板に関し、特にパッド間の半田
ブリッジ或いはリード間ショート防止に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to printed circuit boards, and more particularly to prevention of solder bridges between pads or short circuits between leads.

〔従来の技術〕[Conventional technology]

従来、表面実装をするプリント基板でも、そこに実装す
る半導体集積回路のリードピッチが割合広かった為、パ
ッド間隔も十分あり半田ブリッジやリード間ショートな
どの問題は少なかった。
Conventionally, even in surface-mounted printed circuit boards, the lead pitch of the semiconductor integrated circuits mounted thereon was relatively wide, so the pad spacing was sufficient, and problems such as solder bridges and shorts between leads were rare.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

近年半導体製品の高密度化、小型化によるプリント回路
基板への半導体集積回路の高密度実装化に供ない半導体
集積回路自体が小型化し、リードピッチ、バッドピッチ
リ狭化が進んでいる。例えばvsopのリードピッチは
0.65mm、VQF”Pのリードピッチは0.5順の
狭さになっている。
BACKGROUND ART In recent years, as semiconductor products have become more densely packed and smaller, semiconductor integrated circuits have become more densely packaged on printed circuit boards, and the semiconductor integrated circuits themselves have become smaller, leading to narrower lead pitches and bad pitches. For example, the lead pitch of vsop is 0.65 mm, and the lead pitch of VQF''P is as narrow as 0.5 mm.

このため上述した基板上に半導体集積回路を実装する為
のパッドが設けであるだけの、従来のプリント回路基板
では実装の際半田ブリッジ、リード間シ3−トを起こし
易いという欠点がある。
For this reason, conventional printed circuit boards, which are simply provided with pads for mounting semiconductor integrated circuits on the above-mentioned substrate, have the disadvantage that solder bridges and inter-lead sheets are likely to occur during mounting.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のプリント回路基板はパッドとパッドの間に半田
ブリッジ、リード間ショートを防止するブロックを有す
ることを特徴とする。
The printed circuit board of the present invention is characterized by having a solder bridge between pads and a block for preventing short circuit between leads.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の実施例であり、半導体集積回路を実装
するパッド部分の縦断面図である。
FIG. 1 shows an embodiment of the present invention, and is a longitudinal sectional view of a pad portion on which a semiconductor integrated circuit is mounted.

第1図の構成は以下に示す通りである。The configuration of FIG. 1 is as shown below.

基板:4上に半導体集積回路を実装する為のパッド:2
があり、パッドとパッドの間にはソルダーレジストのブ
ロック:3が設けである。第1図にはパッドの上に模式
的に半導体集積回路のリード部:1も描いておくものと
する。
Pads for mounting semiconductor integrated circuits on substrate: 4: 2
There is a solder resist block 3 between the pads. In FIG. 1, a lead portion 1 of the semiconductor integrated circuit is also schematically drawn on the pad.

ソルダーレジストは通常、プリント回路基板上の導体パ
ターンを覆い、絶縁するのに広く用いられる素材で、半
田ブリッジ防止のブロックをソルダーレジストで構成す
ることにより、安価で出来るという利点がある。
Solder resist is a material that is commonly used to cover and insulate conductor patterns on printed circuit boards, and it has the advantage of being inexpensive and can be used as a solder resist block to prevent solder bridges.

本発明の第2の実施例を第2図に示す。A second embodiment of the invention is shown in FIG.

第2の実施例の構成は、前述の第1の実施例と同様であ
るが、第2の実施例では、前記ブロックをソルダーレジ
ストでなくフォトレジストにより構成する。
The configuration of the second embodiment is similar to that of the first embodiment described above, but in the second embodiment, the blocks are made of photoresist instead of solder resist.

ソルダーレジストは安価である反面、非常に精度を要求
する場合対応しきれないという欠点がある。この第2の
実施例ではマスクによるフォトレジストを使う為、精度
が良く、パッドぎりぎりまでブロックを設けること、或
いは更に微細なパターンでも対応できるという利点があ
る。
Although solder resists are inexpensive, they have the disadvantage that they cannot be used in cases where extremely high precision is required. Since this second embodiment uses a photoresist using a mask, it has the advantage of high accuracy and the ability to provide blocks up to the very edge of the pad, or to accommodate even finer patterns.

〔発明の効果〕〔Effect of the invention〕

従来のプリント回路基板では、パッド間隔が狭くなると
半田ブリッジ或いはリード間ショートを起こし易すかっ
たが、本発明によりこれらを防止することが出来る効果
がある。
In conventional printed circuit boards, when the spacing between pads becomes narrow, solder bridges or short circuits between leads tend to occur, but the present invention has the effect of preventing these problems.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は本発明の実施例で、半導体集積回路
を実装するパッド部分の縦断面図である。
FIGS. 1 and 2 are longitudinal cross-sectional views of a pad portion on which a semiconductor integrated circuit is mounted, according to an embodiment of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 半導体集積回路を表面実装する為の半田パッドを有する
プリント回路基板において、前記半田パッドと半田パッ
ドの間に半田ブリッジを或いはリード間ショートを防ぐ
絶縁体のブロックを設けたことを特徴とするプリント回
路基板。
A printed circuit board having solder pads for surface mounting a semiconductor integrated circuit, characterized in that a solder bridge is provided between the solder pads or an insulating block is provided between the solder pads to prevent short circuit between the leads. substrate.
JP26652588A 1988-10-21 1988-10-21 Printed circuit board Pending JPH02113596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26652588A JPH02113596A (en) 1988-10-21 1988-10-21 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26652588A JPH02113596A (en) 1988-10-21 1988-10-21 Printed circuit board

Publications (1)

Publication Number Publication Date
JPH02113596A true JPH02113596A (en) 1990-04-25

Family

ID=17432101

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26652588A Pending JPH02113596A (en) 1988-10-21 1988-10-21 Printed circuit board

Country Status (1)

Country Link
JP (1) JPH02113596A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04303994A (en) * 1991-03-29 1992-10-27 Shirai Denshi Kogyo Kk Printed wiring board
US5172853A (en) * 1990-11-30 1992-12-22 Siemens Aktiengesellschaft Method for applying solder to printed wiring boards and printed wiring board to which solder has been applied
US5271548A (en) * 1991-08-14 1993-12-21 Siemens Aktiengesellschaft Method for applying solder to and mounting components on printed circuit boards
US5315070A (en) * 1991-12-02 1994-05-24 Siemens Aktiengesellschaft Printed wiring board to which solder has been applied
US7247800B2 (en) * 1998-12-14 2007-07-24 Oki Electric Industry Co., Ltd. Module circuit board for semiconductor device having barriers to isolate I/O terminals from solder

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6336077B2 (en) * 1979-11-21 1988-07-19 Fuiritsupusu Furuuiranpenfuaburiken Nv

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6336077B2 (en) * 1979-11-21 1988-07-19 Fuiritsupusu Furuuiranpenfuaburiken Nv

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5172853A (en) * 1990-11-30 1992-12-22 Siemens Aktiengesellschaft Method for applying solder to printed wiring boards and printed wiring board to which solder has been applied
JPH04303994A (en) * 1991-03-29 1992-10-27 Shirai Denshi Kogyo Kk Printed wiring board
US5271548A (en) * 1991-08-14 1993-12-21 Siemens Aktiengesellschaft Method for applying solder to and mounting components on printed circuit boards
US5315070A (en) * 1991-12-02 1994-05-24 Siemens Aktiengesellschaft Printed wiring board to which solder has been applied
US7247800B2 (en) * 1998-12-14 2007-07-24 Oki Electric Industry Co., Ltd. Module circuit board for semiconductor device having barriers to isolate I/O terminals from solder

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