JPH02100313A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02100313A JPH02100313A JP25413888A JP25413888A JPH02100313A JP H02100313 A JPH02100313 A JP H02100313A JP 25413888 A JP25413888 A JP 25413888A JP 25413888 A JP25413888 A JP 25413888A JP H02100313 A JPH02100313 A JP H02100313A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- semiconductor substrate
- coated
- coating
- uniform film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000000576 coating method Methods 0.000 claims abstract description 10
- 238000005530 etching Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 8
- 238000004528 spin coating Methods 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052760 oxygen Inorganic materials 0.000 abstract description 3
- 239000001301 oxygen Substances 0.000 abstract description 3
- 238000001020 plasma etching Methods 0.000 abstract description 3
- 239000011248 coating agent Substances 0.000 abstract 3
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000002195 soluble material Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Landscapes
- Application Of Or Painting With Fluid Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野〕
この発明は、大規模集積回路(LSI)の製造方法、特
に半導体基板にレジストを塗布むらなく表面をフラット
に塗布することができるレジスト塗布方法に関するもの
である。Detailed Description of the Invention (Industrial Application Field) This invention relates to a method for manufacturing a large-scale integrated circuit (LSI), and in particular a resist coating method that can coat a semiconductor substrate with a resist evenly and on a flat surface. It is related to.
〔従来の技術)
一般に半導体装置の製造において、何層もの工程を必要
とするため各工程に必要なマスクパターンを正確に重ね
て行くアライメント精度が要求される。このアライメン
ト精度を上げるためには、大きな段差がある半導体基板
上でもレジストを、むらなくフラットに塗布することが
必要とされる。従来は、スピナーを用いて必要な膜厚に
対応する回転数でレジストを回転塗布させていた。第3
図は従来段差のある半導体基板上にレジストを塗布した
状況を示す断面図である。図において、(1)は段差の
ある半導体基板、(2)はレジストである。[Prior Art] In general, the manufacture of semiconductor devices requires many layers of processes, so alignment precision is required to accurately overlap mask patterns required for each process. In order to improve this alignment accuracy, it is necessary to apply the resist evenly and flatly even on a semiconductor substrate with large steps. Conventionally, a spinner was used to spin and coat the resist at a rotational speed corresponding to the required film thickness. Third
The figure is a cross-sectional view showing a state in which a resist is conventionally applied on a semiconductor substrate with steps. In the figure, (1) is a semiconductor substrate with a step, and (2) is a resist.
次に製造方法について説明する。半導体基板(1)をス
ピナーに載せ塗布するレジスト(2)の所要の膜厚に応
じて決められた回転数で回転させつつレジスト(2)を
半導体基板(1)の表面に塗布する。Next, the manufacturing method will be explained. The semiconductor substrate (1) is placed on a spinner, and the resist (2) is applied to the surface of the semiconductor substrate (1) while being rotated at a rotation speed determined according to the required film thickness of the resist (2) to be applied.
従来の半導体装置製造のためのレジスト塗布方法は、以
上のような方法で行なわれているので、段差の激しい部
分では、第3図に示すごとくレジストの段差被覆性が悪
くなり、半導体基板表面にフラットにレジストが塗布で
きないという問題点があった。Conventional resist coating methods for manufacturing semiconductor devices are carried out using the method described above. Therefore, in areas with severe level differences, the level difference coverage of the resist deteriorates, as shown in Figure 3, and the surface of the semiconductor substrate is coated. There was a problem that the resist could not be applied flatly.
この発明は上記のような問題点を解消するためになされ
たもので、段差の激しい部分でもレジストの段差被覆性
を向上させ、レジストを表面がフラットに塗布できる半
導体装置の製造方法を得ることを目的とする。This invention was made in order to solve the above-mentioned problems, and aims to provide a method for manufacturing a semiconductor device that can improve the step coverage of the resist even in areas with severe steps and can apply the resist to a flat surface. purpose.
(課題を解決するための手段)
この発明における半導体装置製造のためのレジスト塗布
方法は、半導体基板上の段差部をも充分に被覆し、均一
な膜になるように厚くレジストを回転塗布させ、その後
、必要なj膜厚を得るためにエツチングを行うものであ
る。(Means for Solving the Problems) The resist coating method for manufacturing a semiconductor device according to the present invention includes spin-coating a resist thickly so as to sufficiently cover the stepped portions on the semiconductor substrate and form a uniform film. Thereafter, etching is performed to obtain the required film thickness.
(作用)
この発明における半導体装置を製造するためのレジスト
塗布方法は、半導体基板上の段差をも充分に被覆し、均
一な膜になるように厚くレジストを回転塗布した後、必
要な膜厚にエツチングするので、表面がフラットなレジ
ストを塗布することができる。(Function) The resist coating method for manufacturing a semiconductor device according to the present invention is to spin coat the resist thickly so as to sufficiently cover the steps on the semiconductor substrate and to form a uniform film, and then to apply the resist to the required film thickness. Since it is etched, a resist with a flat surface can be applied.
(実施例)
以下、この発明の一実施例として、レジスト塗布時にス
ピナーを用い、またレジストのエツチング時に酸素プラ
ズマを用いて、半導体基板上にレジスト塗布を行った例
について説明する。第1図は半導体基板上に、レジスト
を塗布した状況を示す断面図、第2図(a) 、(b)
はレジスト塗布方法の工程に従って示した断面図である
。図において、(I)は半導体基板、(2)はレジスト
である。(Example) As an example of the present invention, an example in which a spinner is used during resist application and oxygen plasma is used during resist etching to apply resist onto a semiconductor substrate will be described below. Figure 1 is a cross-sectional view showing the state in which resist is applied on a semiconductor substrate, and Figures 2 (a) and (b).
2A and 2B are cross-sectional views shown according to the steps of a resist coating method. In the figure, (I) is a semiconductor substrate, and (2) is a resist.
次に、第2図に従って、半導体基板(1)上にレジスト
(2)を塗布する方法を説明する。第2図(a)に示し
たように1段差のある半導体基板(1)が充分に被覆さ
れ均一な膜になるように厚くレジスト(2)をスピナー
を用いて回転塗布する。次に第2図(b)に示したよう
に#素プラズマエツチングにより必要なレジスト(2)
の膜厚にする。このように、レジスト(2)を厚く塗I
tiさせ均一・になった膜をエツチングする方法なので
、第1図に示したように段差の大きい半導体基板(1)
上でも表面がフラットにレジスト(2)の塗布ができる
。Next, a method for applying a resist (2) on a semiconductor substrate (1) will be explained according to FIG. As shown in FIG. 2(a), a thick resist (2) is applied by spin coating using a spinner so that the semiconductor substrate (1) having one step difference is sufficiently covered with a uniform film. Next, as shown in FIG. 2(b), the necessary resist (2) is formed by # elementary plasma etching.
Make the film thickness . In this way, apply resist (2) thickly.
Since this is a method of etching a uniform film after etching, it is difficult to etch a semiconductor substrate (1) with large steps as shown in Figure 1.
The resist (2) can be coated evenly on the top surface.
なお、上記実施例は半導体基板(1)上に厚く塗布した
レジスト(2)を、必要な膜厚にするために酸素プラズ
マエツチングを用いたが、濃度の高いアルカリ現像液で
処理するか、存機溶材のウェットエツチングを用いても
、」−記実施例と同様の効果を奏する。In addition, in the above example, oxygen plasma etching was used to make the resist (2) thickly coated on the semiconductor substrate (1) to the required film thickness. Even if wet etching of a meso-soluble material is used, the same effect as in the embodiment described above can be obtained.
(発明の効果)
以上のように、この発明によれば半導体基板上の段差部
をも充分に被覆し、均一な膜になるように厚くレジスト
を回転塗布させた後、必要な膜厚にするためにエツチン
グを行うという方法で半導体基板上にレジストを塗布す
るので、段差部の激しい半導体基板上でも表面がフラッ
トなレジスト膜が得られる効果がある。(Effects of the Invention) As described above, according to the present invention, the step portions on the semiconductor substrate are sufficiently covered, and the resist is spin-coated thickly to form a uniform film, and then the resist is applied to the required film thickness. Since the resist is applied onto the semiconductor substrate by etching, a resist film with a flat surface can be obtained even on a semiconductor substrate with severe steps.
m1図はこの発明の一実施例による半導体基板にレジス
トを塗布した状況を示す断面図、第2図(a) 、 (
b)はこの発明の一実施例によるレジスト塗布方法の工
程に従って示した断面図、第3図は従来の方法でレジス
トを塗布した状況を示す断面図である。図において、(
+)は半導体基板、(2)はレジストである。
なお、図中、同一符号は同一、又は相当部分を示す。
代 理 人 大 岩 増 雄第1図
第2図
第3図Figure m1 is a cross-sectional view showing a state in which a resist is applied to a semiconductor substrate according to an embodiment of the present invention, and Figures 2 (a) and (
b) is a cross-sectional view showing the steps of a resist coating method according to an embodiment of the present invention, and FIG. 3 is a cross-sectional view showing a state in which a resist is applied by a conventional method. In the figure, (
+) is a semiconductor substrate, and (2) is a resist. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Agent Masuo Oiwa Figure 1 Figure 2 Figure 3
Claims (1)
導体基板上の段差部をも充分に被覆し、均一な膜になる
ように厚くレジストをスピナーを用いて回転塗布する第
1の工程と上記半導体基板上に塗布したレジスト膜を必
要な膜厚にエッチングする第2の工程を含む半導体装置
の製造方法。In a resist coating method for manufacturing a semiconductor device, a first step of spin-coating a thick resist using a spinner so as to sufficiently cover the stepped portions on the semiconductor substrate and form a uniform film; A method for manufacturing a semiconductor device, including a second step of etching a resist film coated on the surface to a required thickness.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25413888A JPH02100313A (en) | 1988-10-07 | 1988-10-07 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25413888A JPH02100313A (en) | 1988-10-07 | 1988-10-07 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02100313A true JPH02100313A (en) | 1990-04-12 |
Family
ID=17260748
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP25413888A Pending JPH02100313A (en) | 1988-10-07 | 1988-10-07 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02100313A (en) |
-
1988
- 1988-10-07 JP JP25413888A patent/JPH02100313A/en active Pending
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