JPH0198023A - Conditional subroutine calling system - Google Patents

Abstract

PURPOSE:To extremely decrease the number of steps of a microprogram by qualifying the next address field via an address control field of a conditional subroutine instruction and at the same time keeping the next address unqualified as a return address. CONSTITUTION:When the microinstruction stored in a microinstruction register 2 from a control memory 1 is equal to a conditional subroutine call instruction, the output of a decoder 7 is supplied via a selector 8 and an address field is qualified via the address control field of said call instruction. Then the qualified address field is supplied to a selector 4 as the next jump address. At the same time, the next address received +1 from an address count-up circuit 1 is held by a return address register 6. When the conditional subroutine instruction is processed, the address held by the register 6 is selected by the selector 4 and reset at its original main routine. In such a way, it is not required to call out the subroutines by many instructions and the number of steps of a microprogram can be extremely decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a conditional subroutine calling method applied to a microprogram control device installed in a data processing system such as an electronic computer system.

(Prior Art) In data processing systems such as electronic computer systems, in order to speed up processing by shortening memory access time, a microprogram is stored in a control memory within a CPU, and a group of microinstructions making up this microprogram is used. A microprogram control device that reads and executes each program one by one at high speed is widely used.

When a subroutine call instruction is executed in such a microprogram control device, the address following the storage address of the subroutine call instruction is saved as a return address and branched to the start address of the subroutine.

(Problems to be Solved by the Invention) In the conventional subroutine calling method described above, after the execution of a subroutine is completed, the process returns to the address next to the instruction that called this subroutine.

Therefore, when one of multiple subroutines is selectively called in response to a status signal indicating the result of an operation, etc., in order to satisfy the above address allocation conditions, a conditional branch instruction is added to the normal subroutine call instruction. There is a problem in that the number of steps in the microprogram increases because it is necessary to combine a large number of jump instructions and a large number of jump instructions.

For example, a status signal indicating the calculation result (carry of the calculation unit,
There are 4 types of subroutines A and B depending on the type (zero, overflow, specific bit of register, etc.).

Assuming that one of C and D is called, the arrangement of the microinstructions on the control memory is as shown in FIG.

That is, a conditional branch instruction is stored at address (99) of the control memory, and at the same time, the conditional branch instruction is stored at address (103), (
105), (107), and (109) store subroutine call instructions for calling subroutines D, A, B, and C, and each return address (104
), (106), (108), and (110) store a jump instruction to address (111). Furthermore, addresses (100), (101), and (102) each include a subroutine call instruction storage address (105),
Jump instructions to (107) and (109) are stored.

In this way, when one of multiple subroutines is selectively called in response to a status signal indicating the result of an operation, in addition to multiple subroutine call instructions, conditional branch instructions and numerous jump instructions are required. , there is a problem that the number of steps in the microprogram increases, leading to a decrease in performance.

(Means for Solving the Problems) A conditional subroutine call method according to the present invention includes a conditional subroutine call instruction consisting of a microinstruction including an address control field and a next address field, and a conditional subroutine call instruction that is At execution time, a new next address field is created by modifying the next address field based on the address control field and the status signal, and this is set in the address register as the start address of the subroutine to be called. The control means stores an address obtained by incrementing the storage address as a return address from a called subroutine, and is configured to significantly reduce the number of microprogram steps and improve performance.

Hereinafter, the operation of the present invention will be explained in detail together with examples.

(Embodiment) FIG. 1 is a block diagram showing the configuration of a microprogram control device to which a conditional subroutine calling method according to an embodiment of the present invention is applied, where l is a control memory that stores a microprogram, and 2 is a A microinstruction register that holds microinstructions read from the control memory; 3 an address register that holds an address to be supplied to the control memory 2; 4 a selector that selects an address to be held in the address register 3; An address increment circuit increments the held address; 6 is a return address register that selectively stores the output of the address increment circuit 5 as a return address; 7 is a decoder; and 8 is a selector.

The microinstructions constituting the microprogram stored in the control memory 1 are read out one by one from the storage address specified by the contents of the address register 3, held in the microinstruction register 2, and executed. If the microinstruction to be executed does not involve an address jump, such as a branch, jump, or subroutine call, the address incremented by the address increment circuit 5 becomes the storage address of the next instruction to be executed (the "next address"). ) is set in the address register 3 via the selector 4. On the other hand, if the microinstruction to be executed involves an address jump, the jump destination address is specified in the next address field, and this next address field is set in the address register 3 via the selector 4.

In the case of an instruction in which the jump destination address is unconditionally determined, part of the next address field is supplied directly to the selector 4 via the selector 8. On the other hand, in the case of an instruction in which the jump destination address is conditionally determined, such as a conditional branch instruction or a conditional subroutine call instruction according to the present invention, a part of the next address field in the microinstruction register 2 is stored in the selector 8. It is modified by being replaced with the output of the decoder 7, and this is supplied to the selector 4 as the next address.

The subroutine call instruction according to the present invention is composed of an address control field, a selection control field, and a next address field, as shown by the contents held in the microinstruction register 2 in FIG.

This conditional subroutine call instruction calls four types of subroutines A depending on the status signal indicating the result of operation such as carry, zero, or overflow of the arithmetic unit.

Assume that this is an instruction to selectively call one of B, C, and D.

When this conditional subroutine call instruction is held in the microinstruction register 2 and executed, the function of the decoder 7 is enabled by the selection control field in this instruction. The decoder 7 creates a lower 2-bit address signal to replace a part of the next address field based on the address control field in this conditional subroutine call instruction and status signals such as carry and overflow supplied from the arithmetic unit. and supplies this to the selector 8. The selector 8 is controlled by the execution of the control field in this conditional subroutine call instruction, and replaces the lower two bits of the next address field included in this instruction with the two bits supplied from the decoder 7 and supplies it to the selector 4. .

Furthermore, by executing the selection control field of this conditional subroutine call instruction, the output of the address increment circuit 5 that increments the storage address of this instruction is stored in the return address register 6, and the modified next address is set to the selector. 4 and is set in address register 3.

Therefore, as shown in the microprogram structure in FIG. 2, if the above-mentioned conditional subroutine call instruction is stored at the address (100) of the control memory, the execution of this instruction causes the address (200, (20
1), (202), and (203) are the subroutines ASB and C.

D is called in response to a status signal. Furthermore, by the return instruction executed at the end of the called subroutine, the return address (101) stored in the return address register 6 is set in the address register 3 via the selector 4, and a return to the main routine is performed. .

Above, we have exemplified a configuration in which the lower two bits of the next address field in a conditional subroutine call instruction are replaced according to the set conditions. The configuration can be such that the groups are replaced.

In addition, although we have illustrated a configuration in which some focus groups in the next address field are replaced with bit groups determined according to conditions,
The next address can also be modified by changing some bits in the next address field by logical operations.

(Effects of the Invention) As explained in detail above, the conditional subroutine calling method of the present invention uses a conditional subroutine calling instruction and, upon execution, modifies the next address field based on the address control field and status signal to The control means sets the start address of the subroutine in the address register and stores the address obtained by incrementing the storage address of the subroutine call instruction as the return address from the subroutine.
By executing one instruction, it is possible to selectively call one of multiple subroutines according to the setting conditions, which has the effect of significantly reducing the number of microprogram steps and improving performance compared to conventional methods. It is played.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a microprogram control device applying a conditional subroutine calling method according to an embodiment of the present invention, and FIG. 2 illustrates the above embodiment by arranging microinstructions on the control memory. FIG. 3 is a conceptual diagram for explaining the conventional conditional subroutine calling method by arranging microinstructions on the control memory. 1... Control memory, 2... Micro instruction register,
3...Address register, 4.8...Selector, 5
. . . address increment circuit, 6 . . . return rear address register, 7 . . . decoder.

Claims (1)

[Claims] In a microprogram control device that reads out and executes a group of microinstructions constituting a microprogram one by one from a control memory according to the contents of an address register, the address control field and the storage of the next instruction to be executed are provided. A conditional subroutine call instruction consisting of a microinstruction that includes a next address field that specifies an address, and a new address field that is modified by modifying the next address field based on the address control field and status signal when the conditional subroutine call instruction is executed. Create a next address field and set it in the address register as the start address of the subroutine to be called, and save the address obtained by incrementing the storage address of this conditional subroutine call instruction as the return address from the called subroutine. A conditional subroutine calling method characterized by comprising: a control means for controlling the conditional subroutine;