JPH0186247U - - Google Patents
Info
- Publication number
- JPH0186247U JPH0186247U JP18165287U JP18165287U JPH0186247U JP H0186247 U JPH0186247 U JP H0186247U JP 18165287 U JP18165287 U JP 18165287U JP 18165287 U JP18165287 U JP 18165287U JP H0186247 U JPH0186247 U JP H0186247U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- semiconductor package
- substrate
- protrusion
- sealing lid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 10
- 238000007789 sealing Methods 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 4
- 230000037431 insertion Effects 0.000 claims 1
- 238000003780 insertion Methods 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第1図は本考案による一実施例の半導体用パツ
ケージを示す断面図である。
1…半導体素子、2…基板、3…導体ピン、4
…導体パターン、5…入出力端子、6…封止用キ
ヤツプ、7…ガス流通孔、8…絶縁物。
FIG. 1 is a sectional view showing an embodiment of a semiconductor package according to the present invention. 1... Semiconductor element, 2... Substrate, 3... Conductor pin, 4
...conductor pattern, 5...input/output terminal, 6...sealing cap, 7...gas flow hole, 8...insulator.
Claims (1)
接合して前記半導体素子を気密封止した半導体用
パツケージにおいて、 前記基板上に前記半導体素子と電気的に接続さ
れた突起物を立設するとともに、この突起物を挿
入する孔を前記封止用蓋体に穿設したことを特徴
とする半導体用パツケージ。 (2) 突起物は、基板上に複数本立設されている
ことを特徴とする実用新案登録請求の範囲第1項
記載の半導体用パツケージ。 (3) 突起物挿入孔は、気密封止用のガス流通孔
であることを特徴とする実用新案登録請求の範囲
第1項記載の半導体用パツケージ。[Claims for Utility Model Registration] (1) In a semiconductor package in which a sealing lid is bonded to a substrate on which a semiconductor element is mounted to hermetically seal the semiconductor element, the semiconductor element is electrically connected to the semiconductor element on the substrate. 1. A semiconductor package, characterized in that a protrusion connected to the sealing lid is provided with a protrusion erected therein, and a hole into which the protrusion is inserted is formed in the sealing lid. (2) The semiconductor package according to claim 1, wherein a plurality of protrusions are provided on the substrate. (3) The semiconductor package according to claim 1, wherein the projection insertion hole is a gas flow hole for airtight sealing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18165287U JPH0186247U (en) | 1987-11-28 | 1987-11-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18165287U JPH0186247U (en) | 1987-11-28 | 1987-11-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0186247U true JPH0186247U (en) | 1989-06-07 |
Family
ID=31473130
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18165287U Pending JPH0186247U (en) | 1987-11-28 | 1987-11-28 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0186247U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03113851U (en) * | 1990-03-08 | 1991-11-21 |
-
1987
- 1987-11-28 JP JP18165287U patent/JPH0186247U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03113851U (en) * | 1990-03-08 | 1991-11-21 |
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