JPH0178035U - - Google Patents
Info
- Publication number
- JPH0178035U JPH0178035U JP1987173123U JP17312387U JPH0178035U JP H0178035 U JPH0178035 U JP H0178035U JP 1987173123 U JP1987173123 U JP 1987173123U JP 17312387 U JP17312387 U JP 17312387U JP H0178035 U JPH0178035 U JP H0178035U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- resin layer
- conductive path
- sealing resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims description 5
- 229920005989 resin Polymers 0.000 claims description 5
- 238000007789 sealing Methods 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims 1
- 239000000843 powder Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Description
第１図は本考案の実施例を示す断面図、第２図
は従来例を示す断面図である。
１……混成集積回路基板、２……導電路、３…
…回路素子、４……封止樹脂層、５……樹脂層。
FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional example. 1... Hybrid integrated circuit board, 2... Conductive path, 3...
...Circuit element, 4...Sealing resin layer, 5...Resin layer.
Claims (1)
形成された導電路と前記導電路上に固着された複
数個の回路素子とを具備する混成集積回路におい
て、前記導電路及び前記回路素子を被覆する封止
樹脂層を前記混成集積回路基板上に設け、前記封
止樹脂層上に金属粉末が混入された樹脂層を設け
たことを特徴とする混成集積回路。 In a hybrid integrated circuit comprising a hybrid integrated circuit board, a conductive path formed in a desired shape on the substrate, and a plurality of circuit elements fixed on the conductive path, the conductive path and the circuit element are covered. A hybrid integrated circuit characterized in that a sealing resin layer is provided on the hybrid integrated circuit board, and a resin layer mixed with metal powder is provided on the sealing resin layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987173123U JPH0178035U (en) | 1987-11-12 | 1987-11-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987173123U JPH0178035U (en) | 1987-11-12 | 1987-11-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0178035U true JPH0178035U (en) | 1989-05-25 |
Family
ID=31465059
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987173123U Pending JPH0178035U (en) | 1987-11-12 | 1987-11-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0178035U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004327557A (en) * | 2003-04-22 | 2004-11-18 | Matsushita Electric Works Ltd | Method of manufacturing electronic part and semiconductor device |
-
1987
- 1987-11-12 JP JP1987173123U patent/JPH0178035U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004327557A (en) * | 2003-04-22 | 2004-11-18 | Matsushita Electric Works Ltd | Method of manufacturing electronic part and semiconductor device |