JPH0156580B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency synthesizer receiver using a phase-locked loop (hereinafter referred to as PLL), and in particular is configured to allow fine tuning of the local oscillation frequency.

FIG. 1 shows a block diagram of a frequency synthesizer type radio receiver using a conventionally known PLL. 1 is a high frequency amplifier circuit, 2 is a mixing circuit, 3 is an intermediate frequency amplifier circuit, 4 is a detection circuit, 5 is a low frequency amplifier circuit, and 6 is a speaker. Now, the local oscillation signal input to the mixing circuit 2 is obtained from the PLL. That is, the oscillation output of the stable reference oscillation circuit 10 is frequency-divided by the frequency divider circuit 11 having a constant frequency division ratio, and is input to one input of the phase comparator circuit 12 as a reference frequency signal (the frequency is designated as fr). Become. On the other hand, the oscillation output (its frequency is fv) of the voltage controlled oscillator 13 is divided by a programmable frequency divider circuit 14 whose frequency division ratio N is varied in response to a desired local oscillation frequency, and the phase comparator circuit This is the other input of 12. Phase comparison circuit 12
An output based on the phase difference between the two input signals is fed back to the voltage controlled oscillator 13 via the low-pass filter 15. As is well known, such a PLL has fv=
It becomes locked at N·fr (N is an integer). By varying the frequency division ratio N of the programmable frequency divider circuit 14, a local oscillation frequency fv that is an integral multiple of the reference frequency fr can be obtained. Therefore, the reference frequency fr is generally set to match the minimum broadcast frequency interval. By the way, in the AM broadcast medium wave band, the inter-station frequency is mostly ~KHz,
In some parts of Europe, the frequency is 8KHz or 1KHz, so the reference frequency fr had to be set to 1KHz.

However, if the reference frequency fr is 1KHz, the PLL
The lockup time becomes long, which is a problem especially in automatic search type radio receivers. This also poses a problem when the reference frequency fr is made small so that variations in the characteristics of the intermediate frequency filter can be digitally corrected.

Here, if the reference frequency fr is made smaller, why P.
Let me briefly explain why the lockup time of LL becomes longer. Now, if the gain constants of the voltage-controlled oscillator 13, phase comparison circuit 12, and low-pass filter 15 are Kv, Kp, and KL, respectively, it is known that the natural angular frequency of the PLL is ωn = √... ing. By the way, since N=fv/fr,
When the reference frequency fr is decreased, N increases, the natural angular frequency ωn decreases, and the lockup time becomes longer.

Now, the conventional frequency synthesizer type receiver shown in Fig. 1 has the above-mentioned problems (i.e.,
It was not possible to solve the problem (reducing the change frequency without changing the lockup time). The present invention solves this problem, and its block diagram is shown in FIG. In FIG. 2, circuits with the same functions as those in FIG. 1 are labeled with the same numbers. In the embodiment shown in FIG.
The oscillation frequency of 3′ is fv′, and fv′=N′・
It becomes fr′. The feature of the present invention is that the oscillation output of the voltage controlled oscillator 13' is not directly used as a local oscillation signal, but the frequency fl (fl=fv'/M ) is used as a local oscillation signal, and this signal is applied to the mixing circuit 2 via a low-pass filter 17. The low-pass filter 17 is for removing harmonic noise, and may be a band-pass filter of frequency Fl or the like.

Now, the frequency division ratio N' in the present invention and the oscillation frequency fv' of the voltage controlled oscillator B' are compared to the conventional example M shown in FIG.
Suppose you double it. Then, the reference frequency fr′ is fr′=
fv'/N'=M.fv/M.N=fr, which may be the same as the conventional example. The minimum change frequency of the local oscillation frequency is △fl=△fv'/M=fr'/M=fr/M, which is 1/M times that of the conventional example. Also, the natural angular frequency is ωn′=√
Kv′・Kp・KL/N′=√・・・・
N=ωn, and the lockup time is the same as in the conventional example. That is, in this case, the reference frequency,
The lockup time remains the same as in the conventional example, and the local oscillation frequency can be finely adjusted up to 1/M compared to the conventional example.

According to the present invention described above, the local oscillation frequency can be finely adjusted while other characteristics remain the same as in the conventional example.

[Brief explanation of drawings]

Each of the drawings shows a block diagram of a frequency synthesizer type radio receiver; FIG. 1 shows a conventional example, and FIG. 2 shows an embodiment of the present invention. 10'... Reference oscillation circuit, 12'... Phase comparator circuit, 13'... Voltage controlled oscillator, 14'... Programmable frequency divider circuit, 15', 17... Low pass filter, 16... Frequency divider circuit .

Claims (1)

[Claims] 1 Compare a voltage controlled oscillator, a programmable frequency divider with a division ratio N that divides the oscillation output of this voltage controlled oscillator, and the divided output of this programmable frequency divider and the oscillation output from a reference oscillation circuit, and a phase comparison circuit that derives an output according to the difference between both outputs, and responds to controlling the oscillation output of the voltage controlled oscillator and varying the frequency division ratio N based on the output from the comparison circuit. In a frequency synthesizer type receiver that obtains a local oscillation signal from a phase-locked loop that varies the oscillation output of a voltage-controlled oscillator,
A frequency synthesizer type receiver, characterized in that a frequency divider with a frequency division ratio M is disposed at the output end of the voltage controlled oscillator, and a frequency divided output of the frequency divider is used as a local oscillation signal.