JPH0141077B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention connects a main operation panel and a plurality of terminal devices to each other via signal lines, and centrally controls loads connected to the control terminals by the main operation panel. , and an operating terminal are connected to each other via a signal line, and the operating status of the operating switch of the operating terminal is centrally monitored by the main operation panel, and a control device that responds to the operating status of the operating switch is The present invention relates to a time division multiplex control system for controlling terminal devices.

FIG. 1 is a block diagram showing the overall configuration of the basic time division multiplex control system. Control terminals 3 ₁ , 3 _{2 .} . . are connected thereto, as well as operation terminals 5 ₁ , 5 _{2 .} . . for operating the load 4 like a wall switch. Control terminal 3 ₁ , 3 ₂ ..., operation terminal 5 ₁ ,
Each terminal 3 _{1 , 3} 2 , and 5 is assigned a unique address from the main operation panel 1 to each terminal 3 ₁ , 3 ₂ , and 5
₁ , 5 ₂ ..., the start signal ST, address signal AD, control data signal as shown in Figure 2a.
A signal consisting of a CD and a long pulse signal RP for waiting for return is transmitted in a time-divisional and cyclical manner, and each terminal device 3 ₁ , 3 ₂ ..., 5 ₁ , 5 ₂ ... receives a signal from the main operation panel 1. The signal is constantly read, and when the address signal matches the address assigned to each terminal device 3 ₁ , 3 ₂ ... and 5 ₁ , 5 ₂ ..., the control terminal device 3 ₁ , 3 ₂ ... accompanies the address signal. It reads the control data signal CD and controls the loads 4 connected to the control terminals 3 ₁ , 3 ₂ . . . in accordance with the control data signal CD. Also, during the period of the return standby long pulse signal RP following the control data signal CD, monitoring data such as the load operating status is sent back to the main operation panel 1 as a monitoring data signal from the terminals 3 ₁ , 3 ₂ . ing. In addition, the operation terminal 5
₁ , 5, ₂ ..., when the own address is accessed, the respective operation switches SWa, SWb,
The operating state of SWc is returned to the main operation panel 1 as a monitoring data signal during the period of the return standby long pulse signal RP. The main operation panel 1 monitors the operation status of the loads 4 of the terminals 3 ₁ , 3 _{2 .} . . , 5 ₁ , 5 _{2 .} . . and the operation switches SWa, SWb,
The operation status of SWc is centrally monitored, and in particular _, each operation switch SWa, _{SWb, SWb, SWc of each operation terminal 5 1 ,} 5 ₂ .
Control terminals 3 ₁ and 3 ₂ respectively compatible with SWc
Creates a control data signal for the load 4 of ..., transmits the control data signal when each corresponding control terminal 3 ₁ , 3 ₂ ... is accessed, and controls the load 4 connected to each control switch SWa, SWb. , SWc.

By the way, the monitoring data signals returned from the operating terminals 5 ₁ , 5 ₂ . . . are sent back to the operating switches SWa, SWb,
One bit is assigned to SWc, and during the period of the long pulse signal RP for waiting for return, the signal lines 2 are short-circuited through an appropriate impedance, and if the operation switch is in the on state, the corresponding bit signal is set to, for example, “ A logic value of 1" or a logic value of 0 in the off state is distinguished by pulse width modulation and returned as a monitoring data signal, and a parity bit is provided after the monitoring data signal to check the parity of the monitoring data. Similar to the signal, it is designed to return a pulse width modulated signal with a logic value of "1" or "0".

However, if the operating switches SWa, SWb, and SWc are switches that maintain the operating state, such as inversion switches, the operating terminals 5 ₁ , 5 ₂ are always used.
In order to return monitoring data signals based on the operation switches SWa, SWb, and SWc, whose states are maintained every time the Also, the operation switches SWa, SWb, which are always held are
Since a monitoring data signal indicating the status of SWc is returned each time it is accessed, there is a problem in that the monitoring data signals sent back from each terminal device overlap and cause interference, making it impossible to operate multiple locations. Therefore, in the past, push switches were used for each operation switch SWa, SWb, and SWc.
When the operation terminal at the corresponding address is accessed during operation of SWb, SWc, a monitoring data signal corresponding to the state is returned to the main operation panel 1, and the main operation panel 1
In this step, it is determined whether the operation status of each operation switch SWa, SWb, SWc has changed from the previous access, and the control mode of the corresponding load 4 is changed from on to off or from off to on. A method was used in which the values were changed from time to time. However, as mentioned above, the operation switches SWa, SWb,
When SWc is turned on, a pulse-width modulated signal with a logical value of “1” is transmitted to the operating switch SWa,
If SWb and SWc are off, pulse width modulated signals with a logical value of "0" are transmitted, so if the addresses of the operating terminals 5 ₁ and 5 ₂ are the same, the operating terminals 5 ₁ and 5 ₂ At operation switch SWa,
When SWb and SWc are operated at the same time, for example, in the operating terminal 5 ₁ , the operating switch SWa is turned on, and in the operating terminal 5 ₂ , the operating switch SWb is turned on.
is turned on, each terminal device 5 ₁ ,
The monitoring data signals of 5 ₂ are “1φφ”, “φ1φ”,
The disadvantage is that the signals of each bit overlap and the signal of one logic value masks the signal of the other logic value, or the parity changes, resulting in a temporary loss of control. .

The present invention has been made in view of these drawbacks, and its purpose is to provide a time division multiplex control system that allows load control operations to be performed from multiple locations without malfunction using operating terminals with the same address. It is on offer.

The present invention will be explained below by way of examples. The overall system configuration is the same as that shown in Fig. 1, but each operation switch of the operation terminals 5 ₁ , 5 ₂ .
A push switch is used for SWa, SWb, and SWc, and the monitoring data of each operation switch SWa, SWb, and SWc can be returned only when accessed during the operation, and when the switch is turned on (or turned off). Only the monitoring data signal is sent, and the logical value is “1” whether it is on or off like before.
Alternatively, the "0" signal should not be pulse-width modulated and sent, and its format should be set by changing the period of the long pulse signal RP by controlling the operating switch as shown in Figure 2b.
Periods A, B, depending on the number of SWa, SWb, SWc,
C is set, and periods A, B, and C are assigned to correspond to the operating switches SWa, SWb, and SWc.
When the operation switch SWa is turned on, a monitoring data signal consisting of two pulse signals, a wide pulse and a narrow pulse, is sent to the main operation panel during period A as shown in Figure 2c. 1, and if the operation switch SWb is turned on, the same pulse signal as above is sent back during period B as shown in Figure 2 d, and the operation switch SWb is turned on.
If SWc is turned on, see Figure 2 e.
A pulse signal similar to that described above is returned during period C, so that any operating switch SWa~
If SWc is also not operated, no monitoring data signal is transmitted as shown in FIG. 2f. Therefore, in the main operation panel 1, when the operation terminals 5 ₁ , 5 ₂ . . . detect whether the
Control data is created in response to the operating switches SWa, SWb, and SWc that have been manipulated to control the load of the control terminal device corresponding to the relevant terminal device, and the created control data is transmitted when the relevant control terminal device is accessed. . The control data is created alternately, for example, by turning the load 4 on and off, or turning it off and on each time the monitoring data signal of the corresponding operation switch is turned on.

Now, in the case where the operation terminals 5 ₁ and 5 ₂ shown in FIG.
Suppose that the operation switch SWa in ₁ and the operation switch SWb in the operation terminal ₅₂ are turned on at the same time, and the long pulse signal RP A is output from the operation terminal ₅₁ .
During the period, the monitoring data signal shown in FIG. 2c is sent to the main operation panel 1, and from the operation terminal ₅₂ , the monitoring data signal shown in FIG. It will be sent. At this time, the current mode return signal on the signal _{line 2} becomes a signal as shown in FIG. It is determined that SWa, SWb of the operation switches SWa, SWb, SWc of the address operation terminals 5 ₁ , 5 ₂ have been operated, and these operation terminals 5 ₁ , 5 ₂ are operated.
Create control data for the load 4 corresponding to the load 4 operating switches SWa and SWb connected to the control terminal corresponding to the load 4, and transmit the above control data when the control terminal connected to these loads 4 is accessed. That's what I do. FIG. 2h shows the signal line 2 when the operation switch SWa is turned on on one side of the operation terminals 5 ₁ and 5 ₂ and the operation switch SWc is turned on on the other side.
The above current mode return signal is shown.

In this way, each operation switch SWa, SWb, SWc
Monitoring data signals, which are _{reply signals} corresponding to Unless the operation switches in the same position are operated at the same time, 1,000 steps will not occur between the signals, and even if the operation switches in the same position are operated at the same time, no loss of control will occur due to incorrect parity, etc., and there will be no particular problem. It is.

In the above embodiment, the number of operation switches SWa, SWb, SWc provided in the operation terminals 5 ₁ , 5 ₂ . . . is three, but the number is not particularly limited to this number. It is preferable to set a period corresponding to the number as the period of the long pulse signal RP.

FIG. 3a shows an example of a schematic circuit block of the control terminals 3 ₁ , 3 ₂ . . . , and FIG. 3b shows the operation terminals 5 ₁ , 5 _{2 .}
Examples of schematic circuit blocks are shown, and in these figures, 6 is a diode bridge that full-wave rectifies the signal power sent from the main operation panel 1 via the signal line 2. The output voltage of the power supply circuit 7 is smoothed by a large capacity capacitor provided in the power supply circuit 7, and the output voltage of the terminal logic IC 8 is smoothed by a large capacitor provided in the power supply circuit 7.
Input to the power input terminals Vdd and GND. A waveform shaping circuit 9 shapes the voltage waveform on the signal line 2 and inputs it to the signal input terminal Sg of the terminal logic IC 8. When a time division multiplex transmission signal is sent onto the signal line 2 as shown in FIG. _2a , the terminal logic IC 8 in each terminal device 3 _{1 ,} 3 ₂ . The signal on the signal line 2 is received via the waveform shaping circuit 9, and the data contents of the address signal AD are compared and verified with the outputs of the address setting switches _SW1 to _SW8 . , the control terminals 3 ₁ , 3 ₂ . . . in FIG. 3a.
Control the contents of the control data signal CD at the output terminal D ₁ ~
In addition to outputting to DE, the signals input to monitoring input terminals I ₁ to _{I 5} are parallel-serial converted and output to the return signal output terminal.
This is what is output to RET. Control terminal 3 ₁ ~
For example, the set coil _11d and reset coil 11b of the latching relay 11 are energized according to the output of the terminals _D1 and _D2 among the control output terminals D1 to _D5 of the terminal logic IC 8 of 32 _... It is designed to control the opening and closing of relay contacts. The excitation of the coils 11a and 11b of the latching relay 11 is performed by transistors _Q1 to _Q4 , and the excitation timing is determined by the transistors turned on by the output of the relay drive terminal DRD.
determined by Q ₅ . On the other hand, the emitter output of the phototransistor 12 is applied to, for example, the terminal _I1 among the monitoring input terminals _I1 to _I5 . A power supply voltage from a constant voltage diode 13 is applied to the collector side of this phototransistor 12, so when the phototransistor 12 is conductive, an H level signal is applied to the monitoring input terminal _I1 . It is something. Reference numeral 14 denotes a light emitting diode that constitutes a photocoupler PC together with the phototransistor 12, and a monitoring signal is input to this light emitting diode 14. Therefore, the states of the monitoring input terminals _I1 to _I5 can be determined by turning on and off the transistor _Q6 according to the output of the return output terminal RET during the long pulse sending period from the main operation panel 1.
It is sent back to the main operation panel 1 via the signal line 2 in current mode. On the other hand, when _the operating terminals 5 ₁ , _{5 2} . . . in FIG. Parallel-to-serial conversion of signals and return signal output terminal RET
The control terminals 3 ₁ , 3 2 . . . have basically the same hardware configuration as the control terminals 3 1 , 3 _{2 .} . . except that they do not have load control relays or the like.

The present invention is configured as described above, and the period for returning the monitoring data signal corresponding to the operation of a plurality of operation switches provided on the operation terminal is divided into different periods, and when the operation switch is operated at the time of access. Since multiple operating terminals assigned the same address are connected to the signal line, multiple operating terminals assigned the same address are returned during the period assigned to the operating switch in question. Even if you operate each operation switch on the device, the monitoring data signals do not interfere with each other, so operations can be performed in multiple locations, and the same address can be given to multiple operation terminals. This has the effect that polling time for the entire system can be shortened compared to the case where different addresses are assigned to each location to perform operations at multiple locations.

[Brief explanation of drawings]

FIG. 1 is an overall schematic block diagram of a time division multiplex control system, FIG. 2 is a time chart for explaining the operation of a conventional example and an embodiment of the present invention, and FIGS. 3a and 3b are control terminals used in the present invention, respectively. , is a schematic circuit block diagram of the operation terminal, 1 is the main operation panel, 2
are signal lines, 3 ₁ , 3 ₂ ... are control terminals, 4 is load, 5 ₁ , 5 ₂ ... are operation terminals, AD is address signal, CD is control data signal, RP is long pulse signal, SWa , SWb, and SWc are operation switches.

Claims (1)

[Claims] 1 Connect the main operation panel and multiple terminal devices such as control terminals and operation terminals to each other via a pair of signal lines, and send address signals and control data signals from the main operation panel to each terminal device. and a long pulse signal for the return samurai machine in series are transmitted cyclically for each address, and the control terminal has an address judgment means for comparing the address signal on the signal line with its own address, and an address The operation terminal is equipped with at least a control output means that generates a control output according to the control data signal when the signals match, and the operating terminal has an address determination means for comparing the address signal on the signal line with its own address, and a long length for waiting for return. At least a monitoring signal return means for returning a monitoring data signal of the operation state of the attached operation switch to the main operation panel side as a return current by short-circuiting the signal lines through an appropriate impedance during the period of the pulse signal. Prepare,
Time-division multiplex control in which control data signals corresponding to the state of the operating switch of the operating terminal are transmitted from the main operation panel when accessing a control terminal that is pre-corresponding to the operating switch of the operating terminal. In the system, the timing for returning monitoring data signals corresponding to the operation of multiple operation switches provided on the operation terminal is divided into each type, and is assigned to the operation switch only when the operation switch is operated at the time of access. A time division multiplex control system that connects multiple operation terminals to signal lines to which the same address is assigned and which returns monitoring data signals at specific timings.