JPH01241652A - Device for checking memory - Google Patents

Abstract

PURPOSE:To enable a periodical RAM checking during system operation by writing data for check to a prescribed area in a RAM, reading all data in the RAM to include the data for check and deciding the normality/abnormality of the RAM based on all these data. CONSTITUTION:The area is provided in the RAM storing the data for check. Then, when the system is initialized, the data for check are set based on the storing data in the RAM and simultaneously the set data for check is stored in the prescribed area. When the RAM is checked, all the data in the RAM including the data for check, as well are read and based on all these data, whether the RAM is normal or abnormal is checked. Thus, since the writing operation of the data is not executed at the time of the RAM check, even while the system is operated, the RAM where write protection is loaded can be checked.

Description

DETAILED DESCRIPTION OF THE INVENTION <Field of Industrial Application> The present invention relates to a memory checking device, and particularly to a checking device suitable for periodically checking a RAM while a computer system is operating.

<Conventional technology> In a normal RAM (random access memory) check, multiple types of check data prepared in advance are
The data is written to M, read out, and checked to see if it has been written correctly once or multiple times depending on the processing time.

In such a check method, the data stored in RAM is rewritten to check data, so the memory contents are temporarily erased, so it is safe to erase the memory contents when the power is turned on before system operation. RA of time
It is good for M checking, but if the memory needs to be periodically checked during operation, such as in a 24-hour system, rewriting the memory contents to check data may cause problems. This can cause the system to go down.

Therefore, conventionally, periodic RA during operation of such a system is
The M check method involves first moving important data that you do not want to erase to a register, then writing and reading simple check data to the address where the data was stored, and then returning the data to the original. I was trying to get it back to the address.

<Problems to be Solved by the Invention> However, such conventional checking methods require a write operation of check data, and therefore cannot be used for RAM that is write-protected by hardware, such as constant memory. Unable to check. Furthermore, since the number of registers is small and checks can only be made in byte units for each address, there is a problem in that even if there is a short-circuit failure in the address line, it cannot be detected.

The present invention has been made in view of the above circumstances, and provides a memory checking device with high check accuracy that can perform periodic RAM checks without any trouble during system operation, and can also check write-protected RAM. The purpose is to provide.

<Means for Solving the Problem> For this reason, the present invention, as shown in FIG. 1, reads the data written in the RAM at the time of system initialization and sets the check data based on the data. A check data setting means, a writing means for writing the check data set by the check data setting means into a predetermined area in the RAM, and a RAM including the check data.
Read all data in RAM based on all data.
and a determination means for determining whether it is normal or abnormal.

<Function> In the above configuration, an area for storing check data is provided in the RAM, and when the system is initialized, the R
Check data is set based on the data stored in the AM, and the set check data is stored in the predetermined area.

When checking the RAM, all data in the RAM including check data is read out, and it is checked whether the RAM is normal or not based on all of the data.

<Example> Hereinafter, one embodiment of the present invention will be described based on the drawings.

FIG. 2 is a diagram showing the hardware configuration of an embodiment of the present invention.

In the figure, l is the CPU, 2 is the RAM with hardware write protection, 3 is the input/output interface, 4 is the keyboard for data input, and 5 is, for example, a release button to release the write protection of RAM2. .

The CPU reads the data written in the RAM 2 through the read line B at the time of system initialization, and sets check data based on the data.
Write the set check data to R via line A.
A predetermined area within AM2, for example RA as shown in FIG.
Write to the final address of M2 (address 1023 if it is a 1024-byte RAM), and read all data in RAM2 including check data periodically (for example, every 2 minutes) while the system is running. The normality/abnormality of RAM is checked based on the following.

Therefore, the CPUI corresponds to the checking data setting means, the writing means, and the determining means.

The write line A for writing data from the CPU to the RAM 2 is provided with a light and protection mechanism that connects the CPU and the RAM 2 when a person presses the release button 5. During normal system operation, data cannot be written unless the release button 5 is pressed.

Next, the RAM check operation of this embodiment will be explained based on the flowcharts of FIGS. 4 to 6.

FIG. 4 is a flowchart of checking data setting performed when the system is initialized by turning on the power.

First, in step 1 (indicated by S in the figure and the same applies hereinafter), all data from addresses 0 to 1022 of the RAM 2 are read out via the read line B, and their exclusive OR E0 is calculated.

In step 2, E is replaced with check data E.

In step 3, the check data E1 is stored in the check data storage address 1023 of the RAM 2 via the write line A. In this case, press the release button 5.
to release the write protection and write line A.
Keep it connected.

In this way, check data is set based on the data necessary for system operation stored in RAM2, and R
Store it in AM2, release release button 5, and press R.
The system is operated with AM2 in a write-protected state.

While the system is running, follow the flowchart in Figure 5.
AM2 is checked periodically (for example, every 2 minutes).

In step 11, all data in the RAM 2, including the check data E stored at the address 1023, are read out and the exclusive OR E2 of these data is calculated.

In step 12, it is determined whether E2 is O or not.

Here, if there is no change in the data in RAM2, the exclusive OR of check data E1 and other data E0
Since the relationship between E and E is E,=E, the exclusive OR E2 of both becomes zero. On the other hand, if there is a change in the data in RAM2, E1≠E0, so the exclusive OR of both E2 is 0.
Other than that. Therefore, if E2=0 in step 12 (YES), the process proceeds to step 13 and a normality determination is made. If E2≠0 (No), the process proceeds to step 14, where an abnormality determination is performed, and, for example, an error display is displayed to notify that an abnormality has occurred in the RAM 2.

In this way, only a read operation is required when checking the RAM 2, and it becomes possible to check even a RAM that is write-protected by hardware.

In addition, if a short-circuit failure occurs in the address line, Eo will change unless the data of the short-circuited addresses is the same, so E2 will not become 0 and an abnormality can be detected, improving the accuracy of abnormality detection than before. do.

By the way, regarding the setting of check data, when a large amount of data is input from the keyboard 5, it is done as shown in the flowchart in FIG. It is preferable to carry out the process as shown in the flowchart of FIG.

For example, a case will be described in which 1-byte data is written to address 100.

In step 21, the old data already written at address 100 is read out and set as X.

In step 22, the old check data written at address 1023 is read out and set as P.

In step 23, new data Y is added to address 100.
Write.

In step 24, the three data values X and P are calculated.

Compute the exclusive OR of Y.

In step 25, the above calculation value is checked with data E,
It is stored at address 1023 as .

<Effects of the Invention> As described above, according to the present invention, there is no need to write data when checking the RAM, so it is possible to check the write-protected RAM even when the system is running.

In addition, since abnormalities in the address line can also be detected, RAM
The accuracy of checking can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram explaining the present invention in detail, FIG. 2 is a hardware configuration diagram showing an embodiment of the present invention, FIG. 3 is a diagram showing the configuration of the RAM of the same embodiment, and FIGS. FIG. 6 shows a flowchart of the same embodiment. 1...CPU 2...RAM A...Write line B...Read line

Claims (1)

[Claims] In a check device that checks a RAM during system operation, a check data setting means reads data written in the RAM at the time of system initialization and sets check data based on the data, and the check data A writing means for writing the check data set by the setting means into a predetermined area in the RAM, and reading all the data in the RAM including the check data and determining whether the RAM is normal or abnormal based on all the data. 1. A memory checking device comprising: a determining means.