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JPH01233813A - Variable gain amplifier - Google Patents

Variable gain amplifier

Info

Publication number
JPH01233813A
JPH01233813A JP63061619A JP6161988A JPH01233813A JP H01233813 A JPH01233813 A JP H01233813A JP 63061619 A JP63061619 A JP 63061619A JP 6161988 A JP6161988 A JP 6161988A JP H01233813 A JPH01233813 A JP H01233813A
Authority
JP
Japan
Prior art keywords
current
collector
transistors
differential
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63061619A
Other languages
Japanese (ja)
Inventor
Tomomasa Nakagawara
智賢 中川原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP63061619A priority Critical patent/JPH01233813A/en
Publication of JPH01233813A publication Critical patent/JPH01233813A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To make the output DC level stable by increasing/decreasing differentially the DC compensation current supplied to the collector of a differential amplifier with respect to the increase/decrease in the gain control current supplied to a variable impedance means. CONSTITUTION:A control voltage is applied from a variable DC voltage source between bases of differential transistors(TRs) 16, 17 to vary the collector current of the TRs 16, 17. That is, the total current flowing through the collector of the differential TRs 16, 17 from the current source 20 is constant and when the control current from the collector of the TR 17 is increased, the collector current of the TR 16 is decreased by the DC current being a half the increment. That is, the DC compensation current fed to each emitter of a common base circuit 11 is decreased by a half the increment of the control current. Thus, when the control current is increased to increase the gain, even when the collector current of the differential TRs 1, 2 is going to increase, the DC current flowing to load resistors 5, 6 is kept constant by the decrease in the DC compensation current and the output DC level is made constant.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 2本発明は出力直流レベルが安定で且つ周波数特性も良
好な可変利得増幅器に関する。
Detailed Description of the Invention [Object of the Invention] (Industrial Application Field) 2. The present invention relates to a variable gain amplifier that has a stable output DC level and good frequency characteristics.

(従来の技術) 従来の可変利得増幅器として第7図に示すものが知られ
ている。これは、(IEEE Transaction
B、T、RJ  1972,8月号P158〜162に
記載されている。
(Prior Art) The one shown in FIG. 7 is known as a conventional variable gain amplifier. This is (IEEE Transaction
B, T, RJ 1972, August issue, pages 158-162.

第7図に示す増幅器は、ベース間に入力信号が供給され
るトランジスタ1.2と、その各エミッタと基準電位ラ
インVS間に接続したエミッタ抵抗3.4と、各コレク
タと電圧源ラインVD間に接続した負荷抵抗5.6とで
差動i!幅器を構成し、更にトランジスタ1,2のエミ
ッタ間に共通ベースと共通コレクタを有するトランジス
タ7.8から成る可変インピーダンス回路9を接続し、
この回路9の共通ベースに可変電流源10を接続した構
成となっている。そして、入力信号V inをトランジ
スタ1.2のベースに接続した入力端子a。
The amplifier shown in FIG. 7 includes a transistor 1.2 to which an input signal is supplied between the bases, an emitter resistor 3.4 connected between each of its emitters and a reference potential line VS, and an emitter resistor 3.4 connected between each collector and a voltage source line VD. The differential i! with a load resistor 5.6 connected to A variable impedance circuit 9 is connected between the emitters of the transistors 1 and 2 and is composed of a transistor 7.8 having a common base and a common collector.
A variable current source 10 is connected to a common base of this circuit 9. and an input terminal a that connects the input signal V in to the base of the transistor 1.2.

bに入力し、そのコレクタに接続した出ノJ端子C1d
に出力信号V即を得る。
Output J terminal C1d input to b and connected to its collector
An output signal V is obtained.

上記の増幅器では、可変電流源10の電流量を変化させ
ることにより、可変インピーダンス回路9のインピーダ
ンスを制御し、その結果利得が変化する。従って、エミ
ッタ抵抗3.4、負荷抵抗5.6の値及び可変電流源1
0の電流変化を適宜に設定することにより、所望の利得
変化特性を得ることができる。また、比較的高い周波数
でも良好な特性が1qられるという利点がある。
In the above amplifier, the impedance of the variable impedance circuit 9 is controlled by changing the amount of current of the variable current source 10, and as a result, the gain changes. Therefore, the values of emitter resistance 3.4, load resistance 5.6 and variable current source 1
By appropriately setting the zero current change, desired gain change characteristics can be obtained. Another advantage is that good characteristics can be achieved even at relatively high frequencies.

しかしながら、上記増幅器では、その構成から明らかな
ように可変電流源10の電流量を変化づることにより利
得を制御する為に、負荷抵抗5゜6を流れる直流電流量
が変化し、その結果出力直流電圧が変化するという欠点
を持っている。
However, as is clear from the configuration, in the above amplifier, the gain is controlled by changing the amount of current of the variable current source 10, so the amount of DC current flowing through the load resistor 5.6 changes, and as a result, the output DC voltage It has the disadvantage that it changes.

このように出力直流電圧が変化するということは、他の
回路との直流結合を困難にする。また、他の回路と容量
による交流結合を行った場合、当然に低周波信号の伝送
を困難にし、更にIC化した場合には、容量結合である
と比較的大きな面積のコンデンサが必要となり、チップ
面積の増大を招き、スペース的にもコスト的にも不利ど
なる。
This variation in the output DC voltage makes DC coupling with other circuits difficult. In addition, if AC coupling is performed with other circuits using capacitance, it will naturally make it difficult to transmit low-frequency signals, and if integrated into an IC, capacitive coupling will require a capacitor with a relatively large area. This results in an increase in area, which is disadvantageous in terms of space and cost.

一方、可変電流源10の電流■の変化に対して差動的に
増減する直流補償電流源を設けて負荷抵抗5,6の直流
電流■の変化を補償するように寸れ・ば出力直流レベル
を安定化することが可能であるが、直流補償電流源の出
力インピーダンスを高周波領域にまで充分に高く保つこ
とは困難であり、従って良好な高周波特性が得られない
という問題があった。
On the other hand, if a DC compensation current source is provided that differentially increases or decreases with respect to changes in the current ■ of the variable current source 10, and is dimensioned to compensate for changes in the DC current ■ of the load resistors 5 and 6, the output DC level However, it is difficult to maintain the output impedance of the DC compensated current source sufficiently high even in the high frequency range, and therefore there is a problem that good high frequency characteristics cannot be obtained.

(発明が解決しようとする課題) 上記の如く、従来の回路構成では、利得を変化させた時
に出力直流電圧が変化したり、IC化するのに不向きで
あったり、また良好な高周波特性が得られなかったりす
るという問題があった。
(Problems to be Solved by the Invention) As described above, with the conventional circuit configuration, the output DC voltage changes when the gain is changed, it is not suitable for IC implementation, and it is not possible to obtain good high frequency characteristics. There was a problem that sometimes it was not possible.

そこで、本発明は上記の問題を除去する為のもので、出
力直流電圧が安定であり、広い周波数領域において良好
な特性が得られると共に、IC化に適した可変利得増幅
器を提供することを目的とするものである。
Therefore, the present invention is intended to eliminate the above problems, and aims to provide a variable gain amplifier that has a stable output DC voltage, provides good characteristics over a wide frequency range, and is suitable for IC implementation. That is.

[発明の構成] (課題を解決するための手段) 本発明の可変利得増幅器は、差動対を成す第1、第2の
トランジスタを有し、その各エミッタを第1.第2のエ
ミッタ抵抗を介して基準電位点に接続し、各コレクタを
第1.第2の負荷抵抗を介して電圧源に接続し、ベース
間に入力信号を供給し、コレクタ間に出力信号を得る差
動増幅器と、前記第1.第2のトランジスタのエミッタ
間に設けられ、制aS流にてインピーダンスを可変し前
記差動増幅器の利得を制御する可変インピーダンス手段
と、前記第1.第2のトランジスタの各コレクタと前記
第1.第2の負荷抵抗間に第3.第4のトランジスタを
カスコード接続して構成されるベース接地回路と、前記
可変インピーダンス手段に対し前記制御l電流を供給す
る一方、前記ベース接地回路の各エミッタに対し前記制
御電流と差動的に増減する直流補償電流を供給する電流
制御手段とを具備して構成される。
[Structure of the Invention] (Means for Solving the Problems) A variable gain amplifier of the present invention has first and second transistors forming a differential pair, each emitter of which is connected to the first and second transistors. The respective collectors are connected to the reference potential point via the second emitter resistor. a differential amplifier connected to a voltage source via a second load resistor, supplying an input signal between its bases and obtaining an output signal between its collectors; variable impedance means, which is provided between the emitters of the second transistor and which varies the impedance by controlling the aS current to control the gain of the differential amplifier; each collector of the second transistor and the first . The third load resistor is connected to the second load resistor. a common base circuit configured by cascode-connecting a fourth transistor; and supplying the control current to the variable impedance means, while differentially increasing or decreasing the control current to each emitter of the common base circuit; and current control means for supplying a DC compensation current.

(作用) 本発明においては、可変インピーダンス手段に供給する
利1q制御用電流の増減に対して、差動増幅器のコレク
タに供給される直流補償電流が差動的(相補的)に増減
するので、制御電流が変化しても負荷抵抗を流れる直流
電流は一定に保たれ出力直流レベルの安定化が図れる。
(Function) In the present invention, the DC compensation current supplied to the collector of the differential amplifier differentially (complementarily) increases or decreases in response to increases or decreases in the gain/1q control current supplied to the variable impedance means. Even if the control current changes, the DC current flowing through the load resistance is kept constant, and the output DC level can be stabilized.

また、直流補[流が供給されるベース接地回路の入力イ
ンピーダンスは充分に低いので、ベース接地回路に接続
した直流補償電流源の出力インピーダンスの影響は受け
にくく、高周波に対する特性も良好となる。
Furthermore, since the input impedance of the grounded base circuit to which the DC compensation current is supplied is sufficiently low, it is less affected by the output impedance of the DC compensation current source connected to the grounded base circuit, and the characteristics against high frequencies are also good.

(実施例) 以下、図面に示した実施例に基づいて本発明を説明する
(Example) The present invention will be described below based on the example shown in the drawings.

第1図は本発明の一実施例の可変利得増幅器を示す回路
図である。第7図と同一構成要素には同符号を付して説
明する。
FIG. 1 is a circuit diagram showing a variable gain amplifier according to an embodiment of the present invention. The same components as in FIG. 7 will be described with the same reference numerals.

第7図に示した従来の可変利得増幅器と異なる点は、差
動増幅器を構成する1−ランジスタ1,2の各コレクタ
と負荷抵抗5.6の間にベース接地回路11をカスコー
ド接続にて設ける一方、第7図の可変電流源10に代え
て電流制御回路12を設けたものである。上記ベース接
地回路11は、トランジスタ1,2の各コレクタど負荷
抵抗5゜6間にトランジスタ13.14の各コレクタ・
エミツタ路を接続し、トランジスタ13.14の共通ベ
ースに直流電圧源15を接続して構成される。
The difference from the conventional variable gain amplifier shown in FIG. 7 is that a common base circuit 11 is provided in cascode connection between the collectors of transistors 1 and 2 constituting the differential amplifier and the load resistor 5.6. On the other hand, a current control circuit 12 is provided in place of the variable current source 10 in FIG. The common base circuit 11 has a load resistance of 5°6 between the collectors of transistors 1 and 2, and the collectors of transistors 13 and 14.
The emitter path is connected and the DC voltage source 15 is connected to the common base of the transistors 13 and 14.

上記電流制御回路12は、前記可変電流源10に相当し
た制御電流を可変インピーダンス回路9に供給する機能
と、この制御電流に対して差動的に変化(増減)する直
流補償電流をベース接地回路11の各エミッタに供給す
る機能を有している。
The current control circuit 12 has a function of supplying a control current corresponding to the variable current source 10 to the variable impedance circuit 9, and a grounded base circuit that supplies a DC compensation current that differentially changes (increases or decreases) with respect to this control current. It has a function of supplying to each of the 11 emitters.

そして、入力信@Vanをトランジスタ1.2のベース
に接続した入力端子a、bに入力し、出力信号Vmをト
ランジスタ13.14のコレクタに接続した出力端子c
、dに得る。その他の回路構成は第7図と同様である。
The input signal @Van is input to the input terminals a and b connected to the base of the transistor 1.2, and the output signal Vm is input to the output terminal c connected to the collector of the transistor 13.14.
, get to d. The other circuit configurations are the same as those shown in FIG.

第2図は上記電流制御回路12の一実施例を示すもので
、一方がマルチコレクタから成る差動トランジスタ16
.17のエミッタ間を2つの抵抗18.19で接続し、
その2つの抵抗の接続点に電流120を接続し、差動ト
ランジスタ170ペースに可変直流電圧源21と直流電
圧源22の直列回路を接続し、差動トランジスタ16の
ベースに直流゛電圧′m22を接続している。従って、
差動トランジスタ16.17のベース間に可変直流電圧
源21によって制御゛電圧を加えて、トランジスタ16
.17のコレクタ電流を変化させている。
FIG. 2 shows an embodiment of the current control circuit 12, in which one side is a differential transistor 16 consisting of a multi-collector.
.. Connect the emitters of 17 with two resistors 18 and 19,
A current 120 is connected to the connection point of the two resistors, a series circuit of a variable DC voltage source 21 and a DC voltage source 22 is connected to the differential transistor 170, and a DC voltage 'm22 is connected to the base of the differential transistor 16. Connected. Therefore,
A controlled voltage is applied between the bases of the differential transistors 16 and 17 by the variable DC voltage source 21, so that the transistors 16 and 17
.. 17 collector current is changed.

マルチコレクタの差動トランジスタ16の各々のコレク
タは第1図のベース接地回路11の各々のエミッタに接
続し、他方の差動トランジスタ17のコレクタは可変イ
ンピーダンス回路9へ制御電流を供給するのに使用する
The collectors of each of the multi-collector differential transistors 16 are connected to the emitters of each of the common base circuits 11 of FIG. do.

第2図の回路においては、電流源20から差動トランジ
スタ16.17の各コレクタを通して流れる全電流は一
定であり、差動トランジスタ17のコレクタからのi、
lJ III直流電流加するとその増加分の半分の直流
電流分だけ差動トランジスタ16の各コレクタ電流が減
少することになる。即ち、ベース接地回路11の各々の
エミッタに供給される直流補償電流は制御電流の増加分
の半分だけ減少する。従って、利得を上げるべく制御電
流を増加した時、差動トランジスタ1.2のコレクタ電
流が増加しようとしても直流補償電流の減少によって負
荷抵抗5.6を流れる直流電流は一定に保たれ、出力直
流レベルは一定になる。また、利得を下げるべく制御1
1電流を減少させた時、差動トランジスタ1.2のコレ
クタ電流が減少しようとしても直流補償電流の増加によ
って負荷抵抗5,6を流れる直流電流は一定に保たれ、
出力直流レベルは一定になる。
In the circuit of FIG. 2, the total current flowing from current source 20 through each collector of differential transistors 16, 17 is constant;
When the lJ III DC current is added, each collector current of the differential transistor 16 decreases by half of the DC current increase. That is, the DC compensation current supplied to each emitter of the common base circuit 11 is reduced by half the increase in control current. Therefore, when the control current is increased to increase the gain, even if the collector current of the differential transistor 1.2 tries to increase, the DC current flowing through the load resistor 5.6 is kept constant due to the decrease in the DC compensation current, and the output DC The level remains constant. Also, in order to lower the gain, control 1
1, even if the collector current of the differential transistor 1.2 attempts to decrease, the DC current flowing through the load resistors 5 and 6 is kept constant due to the increase in the DC compensation current.
The output DC level remains constant.

以上の実施例によれば、負荷抵抗5.6を流れる直流電
流は一定に保たれるので、出力直流レベルの安定化が図
れる。また、直流シIJ I11回路12の直流補償電
流源端子はインピーダンスが充分に低いベース接地回路
11のエミッタに接続しているので、増幅器は直流補償
電流源の出力インピーダンスの影響を受けにくく、高い
周波数まで良好な利IJ特性が得られる。
According to the above embodiment, since the DC current flowing through the load resistor 5.6 is kept constant, the output DC level can be stabilized. In addition, since the DC compensation current source terminal of the DC IJ I11 circuit 12 is connected to the emitter of the common base circuit 11 whose impedance is sufficiently low, the amplifier is not easily affected by the output impedance of the DC compensation current source, and can be used at high frequencies. Good gain IJ characteristics can be obtained up to

第3図は上記電流制御回路12の他の実施例を示すもの
で、第2図と異なる点はPNPトランジスタ16.17
をNPNトランジスタ23.24に変更し、トランジス
タ23.24の各コレクタに電流源25,26.27を
接続した点である。
FIG. 3 shows another embodiment of the current control circuit 12, and the difference from FIG. 2 is that PNP transistors 16, 17
is changed to NPN transistors 23, 24, and current sources 25, 26, 27 are connected to the respective collectors of transistors 23, 24.

但し、トランジスタ24はマルチコレクタのトランジス
タである。そして、電流源25からトランジスタ23の
コレクタ電流を引算した出力を可変インピーダンス回路
9への制御゛電流とし、電流源26.27からトランジ
スタ24の各コレクタ電流を引算した出力をベース接地
回路11のエミッタへの直流補償電流としている。
However, the transistor 24 is a multi-collector transistor. Then, the output obtained by subtracting the collector current of the transistor 23 from the current source 25 is used as a control current to the variable impedance circuit 9, and the output obtained by subtracting each collector current of the transistor 24 from the current source 26 and 27 is used as the control current for the common base circuit 11. This is the DC compensation current to the emitter.

第4図は上記ベース接地回路11の他の実施例を示すも
ので、電圧源ラインVDと基準電位虚聞に電流源28.
ダイオード29.直流電圧源15を直列に接続し、電流
源28とダイオード29の接続点をトランジスタ13.
14の共通ベースに接続しである。この時は、トランジ
スタ13,14のベース・エミッタ間電圧とダイオード
29の順方向電圧降下がほぼ等しいので、トランジスタ
13.14のエミッタ電圧は直流電圧源15の電圧にほ
ぼ等しい電圧とみなすことができる。このように、トラ
ンジスタ13.14のエミッタ電圧が略一定とみなせる
場合には、第3図に示した電流制御回路12の電流源2
5.26.27を抵抗30.31.32に置換えて第5
図に示す回路構成とすることができる。
FIG. 4 shows another embodiment of the base grounding circuit 11, in which the voltage source line VD and the reference potential are connected to the current source 28.
Diode 29. A DC voltage source 15 is connected in series, and a connection point between a current source 28 and a diode 29 is connected to a transistor 13.
14 common bases. At this time, since the base-emitter voltage of the transistors 13 and 14 and the forward voltage drop of the diode 29 are approximately equal, the emitter voltage of the transistors 13 and 14 can be considered to be approximately equal to the voltage of the DC voltage source 15. . In this way, if the emitter voltages of the transistors 13 and 14 can be considered to be approximately constant, the current source 2 of the current control circuit 12 shown in FIG.
5.26.27 is replaced with resistor 30.31.32 and the fifth
The circuit configuration shown in the figure can be used.

第6図は本発明の他の実施例を示Jもので、第1図と異
なる点は可変インピーダンス回路9をNPNt−ランジ
スタフ、8に代えてPNPトランジスタ33.34で構
成した点にある。この場合、′上流制御回路12から可
変インピーダンス回路9への出力レベルは所定の変更を
行うことはいうまでもない。
FIG. 6 shows another embodiment of the present invention, which differs from FIG. 1 in that the variable impedance circuit 9 is constructed with PNP transistors 33 and 34 instead of NPNt-Langistaph 8. In this case, it goes without saying that the output level from the upstream control circuit 12 to the variable impedance circuit 9 is changed in a predetermined manner.

尚、上記可変インピーダンス回路9はトランジスタ7.
8の代りにそれぞれダイオードを用いて構成してもよく
、或はトランジスタ7.8をダイオード接続した構成ど
してもよい。
Note that the variable impedance circuit 9 includes a transistor 7.
8 may be replaced by a diode, or the transistors 7 and 8 may be diode-connected.

[発明の効果] 以上述べたように本発明によれば、利得制御を行っても
出力直流レベルが安定であり、広い周波数に亘って良好
な特性が得られ、IC化に適した可変利得増幅器を実現
することができる。
[Effects of the Invention] As described above, according to the present invention, the output DC level is stable even when gain control is performed, good characteristics are obtained over a wide frequency range, and the variable gain amplifier is suitable for IC implementation. can be realized.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の可変利得増幅器を示す回路
図、第2図は第1図の電流制御回路の一実施例を示す回
路図、第3図は第1図の電流制御回路の伯の実施例を示
す回路図、第4図は第1図のベース接地回路の他の実施
例を示ず回路図、第5図は第1図の電流制御回路の他の
実施例を示す回路図、第6図は本発明の他の実施例を示
す回路図1よ、第7図は従来の可変利得増幅器を示す回
路図である。 1.2.7.8.13.14・・・トランジスタ、3.
4,5.6・・・抵抗、 9・・・可変インピーダンス回路、 11・・・ベース接地回路、12・・・電流制御回路、
15・・・電圧源、VD・・・電圧源ライン、S・・・
基準電位点ライン、a・・・入力端子、第5図 第6図
Fig. 1 is a circuit diagram showing a variable gain amplifier according to an embodiment of the present invention, Fig. 2 is a circuit diagram showing an embodiment of the current control circuit of Fig. 1, and Fig. 3 is a circuit diagram showing an embodiment of the current control circuit of Fig. 1. 4 is a circuit diagram showing another embodiment of the base grounding circuit in FIG. 1, and FIG. 5 is a circuit diagram showing another embodiment of the current control circuit in FIG. 1. FIG. 6 is a circuit diagram 1 showing another embodiment of the present invention, and FIG. 7 is a circuit diagram showing a conventional variable gain amplifier. 1.2.7.8.13.14...transistor, 3.
4,5.6...Resistor, 9...Variable impedance circuit, 11...Base grounding circuit, 12...Current control circuit,
15... Voltage source, VD... Voltage source line, S...
Reference potential point line, a... Input terminal, Fig. 5 Fig. 6

Claims (1)

【特許請求の範囲】 差動対を、成す第1、第2のトランジスタを有し、その
各エミッタを第1、第2のエミッタ抵抗を介して基準電
位点に接続し、各コレクタを第1、第2の負荷抵抗を介
して電圧源に接続し、ベース間に入力信号を供給し、コ
レクタ間に出力信号を得る差動増幅器と、 前記第1、第2のトランジスタのエミッタ間に設けられ
、制御電流にてインピーダンスを可変し前記差動増幅器
の利得を制御する可変インピーダンス手段と、 前記第1、第2のトランジスタの各コレクタと前記第1
、第2の負荷抵抗間に第3、第4のトランジスタをカス
コード接続して構成されるベース接地回路と、 前記可変インピーダンス手段に対し前記制御電流を供給
する一方、前記ベース接地回路の各エミッタに対し前記
制御電流と差動的に増減する直流補償電流を供給する電
流制御手段とを具備したことを特徴とする可変利得増幅
器。
[Claims] It has first and second transistors forming a differential pair, each emitter of which is connected to a reference potential point via a first and second emitter resistor, and each collector of which is connected to a reference potential point via a first and second emitter resistor. , a differential amplifier connected to a voltage source via a second load resistor, supplying an input signal between the bases and obtaining an output signal between the collectors; and a differential amplifier provided between the emitters of the first and second transistors. , variable impedance means for controlling the gain of the differential amplifier by varying impedance with a control current; collectors of the first and second transistors;
, a common base circuit configured by connecting third and fourth transistors in cascode between a second load resistor; and supplying the control current to the variable impedance means, while supplying the control current to each emitter of the common base circuit. A variable gain amplifier characterized in that it comprises current control means for supplying a DC compensation current that increases or decreases differentially with the control current.
JP63061619A 1988-03-14 1988-03-14 Variable gain amplifier Pending JPH01233813A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63061619A JPH01233813A (en) 1988-03-14 1988-03-14 Variable gain amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63061619A JPH01233813A (en) 1988-03-14 1988-03-14 Variable gain amplifier

Publications (1)

Publication Number Publication Date
JPH01233813A true JPH01233813A (en) 1989-09-19

Family

ID=13176372

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63061619A Pending JPH01233813A (en) 1988-03-14 1988-03-14 Variable gain amplifier

Country Status (1)

Country Link
JP (1) JPH01233813A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004077666A1 (en) * 2003-01-20 2004-09-10 Nec Corporation Gain variable voltage/current conversion circuit and filter circuit using the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6052099A (en) * 1983-08-31 1985-03-23 日本電気ホームエレクトロニクス株式会社 Automatically mounting device of part
JPS6352762A (en) * 1986-04-09 1988-03-05 Apollo Seiko Kk Solidering method for alignment terminal part and its automatic soldering device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6052099A (en) * 1983-08-31 1985-03-23 日本電気ホームエレクトロニクス株式会社 Automatically mounting device of part
JPS6352762A (en) * 1986-04-09 1988-03-05 Apollo Seiko Kk Solidering method for alignment terminal part and its automatic soldering device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004077666A1 (en) * 2003-01-20 2004-09-10 Nec Corporation Gain variable voltage/current conversion circuit and filter circuit using the same

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